Patents by Inventor Po-Kai Huang
Po-Kai Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250151109Abstract: This disclosure describes systems, methods, and devices related to enhanced channel access. A device may send a Multi-User Request to Send (MU-RTS) frame on a basic service set (BSS) primary channel to an overlapping basic service set (OBSS). The device may receive a Clear to Send (CTS) frame in response to the MU-RTS frame on the BSS primary channel. The device may initiate a switch to a non-primary channel access (NPCA) primary channel upon detection of a physical (PHY) preamble. The device may maintain NPCA operation on the NPCA primary channel until a network allocation vector (NAV) expires. The device may announce a location and bandwidth of the NPCA primary channel to associated stations (STAs).Type: ApplicationFiled: January 7, 2025Publication date: May 8, 2025Inventors: Minyoung PARK, Laurent CARIOU, Danny ALEXANDER, Dibakar DAS, Dmitry AKHMETOV, Po-Kai HUANG, Juan FANG
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Publication number: 20250149463Abstract: Methods, systems, and devices for top die back-side marking for memory systems are described. One or more alignment marks may be added to the back-side of a top memory die in a multi-layer memory device and used to align a position of the top memory die relative to a position of a memory die below the top memory die. The alignment marks may be formed on the top memory die during the manufacturing process of the multi-layer memory device. Operations for forming the alignment marks are described using various semiconductor fabrication techniques. Operations are also disclosed for using the alignment marks to modify placement of the top memory die to reduce the alignment offset in the manufacturing process of subsequent memory dies.Type: ApplicationFiled: October 28, 2024Publication date: May 8, 2025Inventors: Po Chien Li, Yu Kai Kuo, Yi Wen Chen, Ming Wei Tsai, Chien Nan Fan, Chun Ming Huang, Angelo Oria Espina, Chun Jen Chang
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Publication number: 20250132859Abstract: An ultra-high reliability station (UHR STA) requests that medium access control (MAC) header protection padding be included in an MAC Protocol Data Unit (MPDU). A protected control frame may be received from the UHR AP comprising an MPDU that includes a MAC header protection padding field. The MAC header protection padding field may comprise padding to allow for additional time for the processing circuitry to compute the MIC before sending the ACK. For multi-link operations (MLOs) when MAC header protection padding is used, each link may be configured with an independent replay counter and a different key is used for the protected control frame and a protected MAC header in each link. The independent replay counter in each link is reset to zero when the key is derived or rekeyed and set to a packet or sequence number (PN or SN) of the protected control frame or protected MAC header when the MIC is verified.Type: ApplicationFiled: December 27, 2024Publication date: April 24, 2025Inventors: Po-Kai Huang, Danny Alexander, Danny Ben-Ari, Oded Liron, Ido Ouzieli, Ilan Peer, Johannes Berg
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Publication number: 20250132858Abstract: This disclosure describes systems, methods, and devices related to using padding bits for protecting trigger frames, block acknowledgement request frames, and block acknowledgement frames in Wi-Fi. A device may generate padding bits of a trigger frame, a block acknowledgment request frame, or a block acknowledgement frame; generate one or more fields signaling that the padding bits are present in the trigger frame, the block acknowledgement request frame, or the block acknowledgement frame; and cause to send the trigger frame, the block acknowledgement request frame, or the block acknowledgement frame to one or more STAs, the trigger frame, the block acknowledgement request frame, or the block acknowledgement frame including the one or more fields and the padding bits.Type: ApplicationFiled: December 24, 2024Publication date: April 24, 2025Inventors: Po-Kai HUANG, Laurent CARIOU, Danny ALEXANDER
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Patent number: 12283630Abstract: Epitaxial source/drain structures for enhancing performance of multigate devices, such as fin-like field-effect transistors (FETs) or gate-all-around (GAA) FETs, and methods of fabricating the epitaxial source/drain structures, are disclosed herein. An exemplary device includes a dielectric substrate. The device further includes a channel layer, a gate disposed over the channel layer, and an epitaxial source/drain structure disposed adjacent to the channel layer. The channel layer, the gate, and the epitaxial source/drain structure are disposed over the dielectric substrate. The epitaxial source/drain structure includes an inner portion having a first dopant concentration and an outer portion having a second dopant concentration that is less than the first dopant concentration. The inner portion physically contacts the dielectric substrate, and the outer portion is disposed between the inner portion and the channel layer. In some embodiments, the outer portion physically contacts the dielectric substrate.Type: GrantFiled: November 29, 2023Date of Patent: April 22, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chen-Ming Lee, I-Wen Wu, Po-Yu Huang, Fu-Kai Yang, Mei-Yun Wang
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Publication number: 20250126482Abstract: This disclosure describes systems, methods, and devices related to KEK frame encryption. A device may identify, within a received authentication frame, a capability bit in a Robust Security Network Extension Element (RSNXE) indicating peer device support for Key Encryption Key (KEK) derivation during an authentication frame exchange. The device may derive the KEK during the authentication frame exchange based on mutual support for KEK derivation and derivation of a Pairwise Transient Key Security Association (PTKSA) during the exchange. The device may use a cryptographic key protection process for deriving the KEK. The device may encrypt a portion of the authentication frame using the derived KEK.Type: ApplicationFiled: December 27, 2024Publication date: April 17, 2025Inventors: Po-Kai HUANG, Ilan PEER, Emily H. QI, Ido OUZIELI
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Publication number: 20250126661Abstract: This disclosure outlines systems, methods, and devices for roaming data restriction. A device receives a transition request frame from a non-access point multi-link device (non-AP MLD), detailing capabilities and operational parameters for establishing links as a target access point multi-link device (target AP MLD). It then sends a transition response frame to the non-AP MLD, including metadata for context transfer, such as authentication parameters, replay counters, reordering buffer states, and transmission sequence numbers. During the transition, the device communicates with the non-AP MLD as the target AP MLD, receiving forwarded data context from a current access point multi-link device (current AP MLD). It manages data transfer operations by forwarding uplink data from the current AP MLD to the non-AP MLD and transmitting downlink data directly to the non-AP MLD.Type: ApplicationFiled: December 26, 2024Publication date: April 17, 2025Inventors: Po-Kai HUANG, Daniel F. BRAVO, Laurent CARIOU, Ido OUZIELI
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Patent number: 12277379Abstract: A method (of generating a layout diagram of a wire routing arrangement in a multi-patterning context having multiple masks, the layout diagram being stored on a non-transitory computer-readable medium) includes: placing, relative to a given one of the masks, a given cut pattern at a first candidate location over a corresponding portion of a given conductive pattern in a metallization layer; determining whether the first candidate location results in a group of cut patterns which violates a design rule; and temporarily preventing placement of the given cut pattern in the metallization layer at the first candidate location until a correction is made which avoids violating the design rule.Type: GrantFiled: August 10, 2023Date of Patent: April 15, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Fong-Yuan Chang, Chin-Chou Liu, Hui-Zhong Zhuang, Meng-Kai Hsu, Pin-Dai Sue, Po-Hsiang Huang, Yi-Kan Cheng, Chi-Yu Lu, Jung-Chou Tsai
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Publication number: 20250119733Abstract: This disclosure describes systems, methods, and devices related to using encrypted 802.11 association. A device may identify a beacon received from an access point (AP), the beacon including an indication of an authentication and key manager (AKM); transmit, to the AP, an 802.11 authentication request including an indication of parameters associated with the AKM; identify an 802.11 authentication response received from the AP based on the 802.11 authentication request, the 802.11 authentication response including a message integrity check (MIC) using a key confirmation key (KCK) and an indication that the parameters have been selected by the AP; transmit, to the AP, an 802.11 association request encrypted by a security key based on an authenticator address of the AP; and identify an 802.11 association response received from the AP based on the 802.11 association request, the 802.11 association response encrypted by the security key.Type: ApplicationFiled: December 17, 2024Publication date: April 10, 2025Applicant: Intel CorporationInventors: Po-Kai HUANG, Ilan PEER, Johannes BERG, Ido OUZIELI, Elad OREN, Emily QI
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Publication number: 20250120122Abstract: One aspect of the present disclosure pertains to a semiconductor device. The semiconductor device includes a semiconductor substrate and a transistor formed over the semiconductor substrate. The transistor includes a first source/drain (S/D) feature, a second S/D feature, a channel region interposed between the first and second S/D features, and a gate stack engaging the channel region. The semiconductor device includes a first S/D contact landing on a top surface of the first S/D feature, a second S/D contact landing on a top surface of the second S/D feature, and a dielectric plug penetrating through the semiconductor substrate and landing on a bottom surface of the first S/D feature. The dielectric plug spans a width equal to or smaller than a width of the first S/D feature.Type: ApplicationFiled: October 5, 2023Publication date: April 10, 2025Inventors: Chen-Ming Lee, Shih-Chieh Wu, Po-Yu Huang, I-Wen Wu, Fu-Kai Yang, Mei-Yun Wang
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Publication number: 20250119773Abstract: This disclosure describes systems, methods, and devices related to high throughput (HT) control information. A device may determine a frame comprising HT control information. The device may determine to extend a size of the HT control information. The device may cause to generate a management or data frame for sending to a first station device of one or more station devices, the management or data frame comprising extended high throughput (HT) control information, define a new control identification (ID) associated with the extended HT control information, and cause to send the management or data frame to the first station device.Type: ApplicationFiled: November 4, 2024Publication date: April 10, 2025Applicant: INTEL CORPORATIONInventors: Po-Kai Huang, Daniel F. Bravo, Danny Alexander, Arik Klein, Danny Ben-Ari, Laurent Cariou, Robert Stacey
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Patent number: 12273964Abstract: This disclosure describes systems, methods, and devices related to multi-link operation. A device may configure a single N×N transmit (TX)/receive (RX) radio to a plurality of 1×1 TX/RX radios, where N is a positive integer. The device may monitor a first channel of a plurality of channels to determine its availability. The device may monitor a second channel of the plurality of channels to determine its availability. The device may identify a first control frame received from an access point (AP) multi-link device (MLD) on the second channel. The device may cause to send a second control frame to the AP MLD on the second channel. The device may configure back to a single N×N TX/RX radio to receive a data frame.Type: GrantFiled: March 13, 2023Date of Patent: April 8, 2025Assignee: Intel CorporationInventors: Minyoung Park, Po-Kai Huang, Thomas J. Kenney, Daniel Bravo, Ehud Reshef, Laurent Cariou, Dibakar Das, Dmitry Akhmetov
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Patent number: 12266606Abstract: Semiconductor device and the manufacturing method thereof are disclosed. An exemplary semiconductor device comprises a dielectric layer formed over a power rail; a bottom semiconductor layer formed over the dielectric layer; a backside spacer formed along a sidewall of the bottom semiconductor layer; a conductive feature contacting a sidewall of the dielectric layer and a sidewall of the backside spacer; channel semiconductor layers over the bottom semiconductor layer, wherein the channel semiconductor layers are stacked up and separated from each other; a metal gate structure wrapping each of the channel semiconductor layers; and an epitaxial source/drain (S/D) feature contacting a sidewall of each of the channel semiconductor layers, wherein the epitaxial S/D feature contacts the conductive feature, and the conductive feature contacts the power rail.Type: GrantFiled: July 20, 2023Date of Patent: April 1, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Po-Yu Huang, Chia-Hsien Yao, Fu-Kai Yang, Mei-Yun Wang
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Patent number: 12266703Abstract: An interconnect fabrication method is disclosed herein that utilizes a disposable etch stop hard mask over a gate structure during source/drain contact formation and replaces the disposable etch stop hard mask with a dielectric feature (in some embodiments, dielectric layers having a lower dielectric constant than a dielectric constant of dielectric layers of the disposable etch stop hard mask) before gate contact formation. An exemplary device includes a contact etch stop layer (CESL) having a first sidewall CESL portion and a second sidewall CESL portion separated by a spacing and a dielectric feature disposed over a gate structure, where the dielectric feature and the gate structure fill the spacing between the first sidewall CESL portion and the second sidewall CESL portion. The dielectric feature includes a bulk dielectric over a dielectric liner. The dielectric liner separates the bulk dielectric from the gate structure and the CESL.Type: GrantFiled: December 9, 2021Date of Patent: April 1, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Shih-Che Lin, Po-Yu Huang, I-Wen Wu, Chen-Ming Lee, Chia-Hsien Yao, Chao-Hsun Wang, Fu-Kai Yang, Mei-Yun Wang
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Patent number: 12262226Abstract: Methods, apparatuses, and computer readable media for communicating elements between multi-link devices are disclosed. Apparatuses of a multi-link device (MLD) are disclosed, where the apparatuses comprise processing circuitry configured to encode a management frame, the management frame comprising a link information field, the link information field indicating a first link of the MLD for which management information is applicable and configure a non-access point (AP) of the MLD or a station (STA) of the MUD to transmit the management frame on a second link of the MLD. The processing circuitry is further configured to decode a second management frame, the second management frame comprising a second link information field, the second link information field indicating a second link of the MLD for which second management information is applicable.Type: GrantFiled: October 25, 2021Date of Patent: March 25, 2025Assignee: Intel CorporationInventors: Po-Kai Huang, Daniel F. Bravo, Laurent Cariou
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Patent number: 12262243Abstract: This disclosure describes systems, methods, and devices related to traffic indications for multi-link devices (MLDs). A device may generate a first traffic indication map (TIM) with a first bitmap including a first indication that traffic is to be sent by a first access point (AP) device of the MLD to a first non-AP device of a second MLD using a first communication link. The device may generate a second TIM with a second bitmap including a second indication that no traffic is to be sent by a second AP device of the MLD to a second non-AP device of the second MLD using a second communication link. The device may send, using the first communication link, the beacon, the beacon including the first TIM and the second TIM. The device may send, using the first communication link, a data frame to the first non-AP device of the second MLD.Type: GrantFiled: December 30, 2023Date of Patent: March 25, 2025Assignee: Intel CorporationInventors: Alexander Min, Laurent Cariou, Minyoung Park, Po-Kai Huang
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Publication number: 20250088364Abstract: This disclosure outlines enhanced privacy in wireless networks. A device recognizes frames indicating a first PMKID or PMKR0Name, and then mirrors these identifiers in response frames. Post-authentication, it recalculates a second PMKID or PMKR0Name using a hash function upon PTKSA establishment. This new information is then shared across the network's APs or MLDs. The device can also decide to stop using the first PMKID or PMKR0Name to maintain network security.Type: ApplicationFiled: August 23, 2024Publication date: March 13, 2025Inventors: Po-Kai HUANG, Ido OUZIELI, Johannes BERG, Robert STACEY, Ilan PEER
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Publication number: 20250081266Abstract: This disclosure describes systems, methods, and devices related to multi-link device (MLD) data continuity. An MLD device may set up one or more links with a station multi-link device (STA MLD), wherein the STA MLD comprises one or more logical entities defining separate station devices. The MLD device may transmit a data packet associated with a traffic identifier (TID) to the STA MLD. The MLD device may determine that the data packet was not received by the STA MLD. The MLD device may retransmit the data packet to the STA MLD. The MLD device may increment a retransmit counter every time the data packet is retransmitted. The MLD device may refrain from transmitting a second data packet until the data packet is dropped or successfully received by the STA MLD.Type: ApplicationFiled: October 11, 2024Publication date: March 6, 2025Applicant: INTEL CORPORATIONInventors: Po-Kai HUANG, Daniel BRAVO, Ofer SCHREIBER, Arik KLEIN, Laurent CARIOU, Robert STACEY
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Publication number: 20250081523Abstract: A semiconductor die and the method of forming the same are provided. The semiconductor die includes a first interconnect structure, a second interconnect structure including a conductive feature, and a device layer between the first interconnect structure and the second interconnect structure. The device layer includes a semiconductor fin, a first gate structure on the semiconductor fin, a source/drain region adjacent the first gate structure, and a shared contact extending through the semiconductor fin to be electrically connected to the source/drain region and the first gate structure. The conductive feature contacts the shared contact.Type: ApplicationFiled: August 29, 2023Publication date: March 6, 2025Inventors: Chen-Ming Lee, Shih-Chieh Wu, Po-Yu Huang, I-Wen Wu, Fu-Kai Yang, Mei-Yun Wang
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Publication number: 20250070500Abstract: A cable assembly, configured to be mounted to a circuit board having a first conductive pad and a second conductive pad, includes a first cable, a second cable and a support member. The first cable includes a first core, a first insulator and a first shielding layer. The second cable includes a second core, a second insulator and a second shielding layer. The first core and the second core are configured to be in contact with the first conductive pad and the second conductive pad. The support member includes a support portion. The support portion is configured to support the first insulator and the second insulator. The connection portion is in contact with the first shielding layer and the second shielding layer. A cable connector having the cable assembly is also disclosed.Type: ApplicationFiled: April 29, 2024Publication date: February 27, 2025Applicant: Luxshare Precision Industry Company LimitedInventors: Cheng-Kai LIAO, Wei WANG, Minquan YU, Po-Chang HUANG, Ming-Yu HO