Patents by Inventor Po-Shen Lin

Po-Shen Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10970860
    Abstract: A character-tracking system is provided. The system includes a plurality of cameras, a first computing server, a second computing server, and a third computing server. The cameras are configured to capture scene images of a scene with different shooting ranges. The first computing server performs body tracking on a body region in the scene image to generate character data. The third computation server obtains a body region block from each scene image according to the character data for facial recognition to obtain user identity. The first computing server further performs person re-identification on different body regions to link the body regions with its person tag belonging to the same user. The first computing server further represents the linked body regions and their person tags with a corresponding user identity.
    Type: Grant
    Filed: February 14, 2020
    Date of Patent: April 6, 2021
    Assignee: WISTRON CORP.
    Inventors: Po-Shen Lin, Shih-Wei Wang, Yi-Yun Hsieh
  • Publication number: 20210075071
    Abstract: A battery cell module of the present invention includes: a plurality of battery assemblies, each having several battery cells; a flame-retardant unit, covered on an external surface of each of the battery cells; a first bracket, having a first fixation plate in grid pattern, the first fixation plate having a plurality of first containing slots corresponding to the plurality of the battery assemblies; a second bracket, connected with the first bracket and having a second fixation plate in grid pattern, the second fixation plate having a plurality of second containing slots corresponding to the plurality of the first containing slots; wherein an end of each of the battery cells is mounted in each of the plurality of the first containing slots, the other end of each of the battery cells is mounted in each of the plurality of the second containing slots.
    Type: Application
    Filed: December 11, 2019
    Publication date: March 11, 2021
    Inventors: PING-YU LEE, TSAI-FU LIN, MING-CHUN CHANG, PO-SHEN CHEN, TA-CHANG YANG, MIN-YU WU
  • Publication number: 20210013160
    Abstract: Structures and formation methods of a chip package are provided. The chip package includes a substrate and a semiconductor die over the substrate. The chip package also includes a lid covering a top surface of the semiconductor die. The lid has a first support structure and a second support structure, and the first support structure and the second support structure are positioned at respective corner portions of the substrate. An opening penetrates through the lid to expose a space containing the semiconductor die, and the lid has a side edge extending from an edge of the first support structure to an edge of the second support structure.
    Type: Application
    Filed: September 28, 2020
    Publication date: January 14, 2021
    Inventors: Shu-Shen YEH, Chin-Hua WANG, Kuang-Chun LEE, Po-Yao LIN, Shyue-Ter LEU, Shin-Puu JENG
  • Patent number: 10890612
    Abstract: An insulation resistance measuring device for detecting insulation resistance of an electric vehicle comprises a battery system, a measuring unit, a control unit and a calculation unit. The measuring unit comprises a circuit module comprises a plurality of resistances connected between a positive side and a negative side of the battery system, a first switch, a second switch, and a voltage detecting unit. The first switch is connected between the circuit module and a ground side. The second switch is connected between the circuit module and the negative side. The voltage detecting unit is arranged at a connecting node of the resistances of the circuit module. The control unit is configured to control the first switch and the second switch to turn on or turn off. The calculation unit is configured to calculate a high potential insulation resistance and a low potential insulation resistance of the electric vehicle.
    Type: Grant
    Filed: December 10, 2018
    Date of Patent: January 12, 2021
    Assignee: Foxlink Automotive Technology (Kunshan) Co., Ltd.
    Inventors: Pao Hung Lin, Po Shen Chen, Kuo Ho Cheng, Ming Chun Chang, Tsai Fu Lin
  • Publication number: 20200357714
    Abstract: A device includes a substrate with a die over the substrate. A molding compound surrounds the die and includes a structural interface formed along a peripheral region of the molding compound.
    Type: Application
    Filed: July 27, 2020
    Publication date: November 12, 2020
    Inventors: Shu-Shen Yeh, Po-Yao Lin, Shyue-Ter Leu, Shin-Puu Jeng, Chih-Kung Huang, Tsung-Ming Yeh
  • Patent number: 10814556
    Abstract: An additive manufacturing apparatus includes a main system and a cleaning transportation system separated from the main system. The main system includes an additive manufacturing module. The additive manufacturing module includes an additive manufacturing chamber. The additive manufacturing chamber includes a powder discharging openings and a vibration unit. The powder discharging openings are formed at a lower portion of the additive manufacturing chamber, and the powders in the additive manufacturing chamber are discharged down via gravitation. The vibrational unit is for vibrating the powders so as to accelerate downward powder discharging via vibration of the vibrational unit. The present application solves the conventional problems of excessive consumed energy, large required installation and operational space, inconvenience of powder removing and swirled raised powder haze in the environment.
    Type: Grant
    Filed: October 21, 2018
    Date of Patent: October 27, 2020
    Assignee: National Chung-Shan Institute of Science and Technology
    Inventors: Chung-Chun Huang, Chih-Peng Chen, Po-Shen Lin, Yu-Ching Tseng
  • Patent number: 10797006
    Abstract: Structures and formation methods of a chip package are provided. The chip package includes a substrate and a semiconductor die over the substrate. The chip package also includes a lid covering a top surface of the semiconductor die. The lid has multiple support structures, and the support structures are positioned at respective corner portions of the substrate. Multiple openings penetrate through the lid to expose a space containing the semiconductor die.
    Type: Grant
    Filed: November 27, 2018
    Date of Patent: October 6, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
    Inventors: Shu-Shen Yeh, Chin-Hua Wang, Kuang-Chun Lee, Po-Yao Lin, Shyue-Ter Leu, Shin-Puu Jeng
  • Patent number: 10780504
    Abstract: A powder recycling system includes a supply tank, a continuous loss-in-weight module, a pneumatic module, a transfer channel, a recycle module, and a refilling tank. The supply tank accommodates recycling powder. The continuous loss-in-weight module includes a storage tank receiving the recycling powder from the supply tank and a rotary output pipe connected to the storage tank to output the recycling powder. The continuous loss-in-weight module controls the mass flow rate of the output of the recycling powder according to the weight change of the storage tank. The pneumatic module enables the recycling powder to float and move in the transfer channel. The recycle module is connected to the transfer channel to receive the recycling powder, sieves the recycling powder, provides virgin powder, and mixes the virgin powder with the recycling powder. The refilling tank is connected to the recycle module to receive the recycling powder and the virgin powder.
    Type: Grant
    Filed: November 17, 2017
    Date of Patent: September 22, 2020
    Assignee: NATIONAL CHUNG-SHAN INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Yi-Lun Xiao, Li-Tsung Sheng, Shu-San Hsiau, Kuo-Kuang Jen, Chih-Peng Chen, Po-Shen Lin, Chung-Chun Huang
  • Publication number: 20200286878
    Abstract: A method of forming a semiconductor device package includes the following steps. A redistribution structure is formed on a carrier. A plurality of second semiconductor devices are disposed on the redistribution structure. At least one warpage adjusting component is disposed on at least one of the second semiconductor devices. A first semiconductor device is disposed on the redistribution structure. An encapsulating material is formed on the redistribution structure to encapsulate the first semiconductor device, the second semiconductor devices and the warpage adjusting component. The carrier is removed to reveal a bottom surface of the redistribution structure. A plurality of electrical terminals are formed on the bottom surface of the redistribution structure.
    Type: Application
    Filed: May 27, 2020
    Publication date: September 10, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Po-Yao Lin, Cheng-Yi Hong, Feng-Cheng Hsu, Shuo-Mao Chen, Shin-Puu Jeng, Shu-Shen Yeh, Kuang-Chun Lee
  • Patent number: 10727147
    Abstract: A device includes a substrate with a die over the substrate. A molding compound surrounds the die and includes a structural interface formed along a peripheral region of the molding compound.
    Type: Grant
    Filed: October 22, 2018
    Date of Patent: July 28, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shu-Shen Yeh, Po-Yao Lin, Shyue-Ter Leu, Shin-Puu Jeng, Chih-Kung Huang, Tsung-Ming Yeh
  • Patent number: 10714463
    Abstract: A method of forming a semiconductor device package includes the following steps. A redistribution structure is formed on a carrier. A plurality of second semiconductor devices are disposed on the redistribution structure. At least one warpage adjusting component is disposed on at least one of the second semiconductor devices. A first semiconductor device is disposed on the redistribution structure. An encapsulating material is formed on the redistribution structure to encapsulate the first semiconductor device, the second semiconductor devices and the warpage adjusting component. The carrier is removed to reveal a bottom surface of the redistribution structure. A plurality of electrical terminals are formed on the bottom surface of the redistribution structure.
    Type: Grant
    Filed: November 24, 2019
    Date of Patent: July 14, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Po-Yao Lin, Cheng-Yi Hong, Feng-Cheng Hsu, Shuo-Mao Chen, Shin-Puu Jeng, Shu-Shen Yeh, Kuang-Chun Lee
  • Patent number: 10704726
    Abstract: The curved flow channel with built-in lattice structure provided by the present application is configured with the lattice structure disposed at the outer inside wall of the curved section away from a center of curvature of the curved section. Through geometry and distribution design of the lattice structure, flow rate and flow direction of fluid impacting the lattice structure can be altered, which achieves the purpose of flow rate redistribution in the curved flow channel and produces a downstream flow field with uniform distribution.
    Type: Grant
    Filed: October 24, 2018
    Date of Patent: July 7, 2020
    Assignee: National Chung-Shan Institute of Science and Technology
    Inventors: Po-Shen Lin, Chih-Peng Chen, Kuo-Kuang Jen, Yu-Ching Tseng
  • Publication number: 20200098739
    Abstract: A method of forming a semiconductor device package includes the following steps. A redistribution structure is formed on a carrier. A plurality of second semiconductor devices are disposed on the redistribution structure. At least one warpage adjusting component is disposed on at least one of the second semiconductor devices. A first semiconductor device is disposed on the redistribution structure. An encapsulating material is formed on the redistribution structure to encapsulate the first semiconductor device, the second semiconductor devices and the warpage adjusting component. The carrier is removed to reveal a bottom surface of the redistribution structure. A plurality of electrical terminals are formed on the bottom surface of the redistribution structure.
    Type: Application
    Filed: November 24, 2019
    Publication date: March 26, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Po-Yao Lin, Cheng-Yi Hong, Feng-Cheng Hsu, Shuo-Mao Chen, Shin-Puu Jeng, Shu-Shen Yeh, Kuang-Chun Lee
  • Publication number: 20200063476
    Abstract: A synchronous hinge module includes a first axle, a second axle, a third axle, a fourth axle, at least one central frame, at least two connecting bases, a plurality of first baffle plates, at least two side frames, and a plurality of second baffle plates. The at least one central frame is disposed around the first axle and the second axle. The at least two connecting bases are engaged with two opposite ends of the at least one central frame respectively. The plurality of first baffle plates is respectively disposed around the first axle, the third axle and the second axle, the fourth axle. Each of the first baffle plates extends outside each of the at least two connecting bases and the at least one central frame.
    Type: Application
    Filed: August 20, 2019
    Publication date: February 27, 2020
    Applicant: COMPAL ELECTRONICS, INC.
    Inventors: Che-Hsien Lin, Tsai-Ta Teng, Che-Hsien Chu, Hung-Jui Lin, Chun-An Shen, Ko-Yen Lu, Po-Hsiang Hu
  • Publication number: 20200058571
    Abstract: A semiconductor package is provided. The semiconductor package includes a package substrate. The semiconductor package further includes a first chip and a second chip mounted on the package substrate. The thickness of the first chip is different from that of the second chip. In addition, the semiconductor package includes a heat spreader attached on top of the first chip and top of the second chip. A first portion of the heat spreader over the first chip and a second portion of the heat spreader over the second chip have the same thickness.
    Type: Application
    Filed: February 14, 2019
    Publication date: February 20, 2020
    Inventors: Chin-Hua WANG, Po-Yao LIN, Feng-Cheng HSU, Shin-Puu JENG, Wen-Yi LIN, Shu-Shen YEH
  • Publication number: 20200018786
    Abstract: An insulation resistance measuring device for detecting insulation resistance of an electric vehicle comprising a battery system, a measuring unit, a control unit and a calculation unit. The measuring unit comprises a circuit module, a first switch, a second switch and a voltage detecting unit. The circuit module comprises a plurality of resistances, which connected between a positive side and a negative side of the battery system. The first switch is connected between the circuit module and a ground side. The second switch is connected between the circuit module and the negative side. The voltage detecting unit is arranged at a connecting node of the resistances of the circuit module. The control unit is configured to control the first switch and the second switch to turn on or turn off. The calculation unit is configured to calculate a high potential insulation resistance and a low potential insulation resistance of the electric vehicle.
    Type: Application
    Filed: December 10, 2018
    Publication date: January 16, 2020
    Inventors: Pao Hung Lin, Po Shen Chen, Kuo Ho Cheng, Ming Chun Chang, Tsai Fu Lin
  • Patent number: 10504880
    Abstract: A method of forming a semiconductor device package includes the following steps. A redistribution structure is formed on a carrier. A plurality of second semiconductor devices are disposed on the redistribution structure. At least one warpage adjusting component is disposed on at least one of the second semiconductor devices. A first semiconductor device is disposed on the redistribution structure. An encapsulating material is formed on the redistribution structure to encapsulate the first semiconductor device, the second semiconductor devices and the warpage adjusting component. The carrier is removed to reveal a bottom surface of the redistribution structure. A plurality of electrical terminals are formed on the bottom surface of the redistribution structure.
    Type: Grant
    Filed: April 29, 2019
    Date of Patent: December 10, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Po-Yao Lin, Cheng-Yi Hong, Feng-Cheng Hsu, Shuo-Mao Chen, Shin-Puu Jeng, Shu-Shen Yeh, Kuang-Chun Lee
  • Publication number: 20190252363
    Abstract: A method of forming a semiconductor device package includes the following steps. A redistribution structure is formed on a carrier. A plurality of second semiconductor devices are disposed on the redistribution structure. At least one warpage adjusting component is disposed on at least one of the second semiconductor devices. A first semiconductor device is disposed on the redistribution structure. An encapsulating material is formed on the redistribution structure to encapsulate the first semiconductor device, the second semiconductor devices and the warpage adjusting component. The carrier is removed to reveal a bottom surface of the redistribution structure. A plurality of electrical terminals are formed on the bottom surface of the redistribution structure.
    Type: Application
    Filed: April 29, 2019
    Publication date: August 15, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Po-Yao Lin, Cheng-Yi Hong, Feng-Cheng Hsu, Shuo-Mao Chen, Shin-Puu Jeng, Shu-Shen Yeh, Kuang-Chun Lee
  • Publication number: 20190186669
    Abstract: The curved flow channel with built-in lattice structure provided by the present application is configured with the lattice structure disposed at the outer inside wall of the curved section away from a center of curvature of the curved section. Through geometry and distribution design of the lattice structure, flow rate and flow direction of fluid impacting the lattice structure can be altered, which achieves the purpose of flow rate redistribution in the curved flow channel and produces a downstream flow field with uniform distribution.
    Type: Application
    Filed: October 24, 2018
    Publication date: June 20, 2019
    Inventors: Po-Shen Lin, Chih-Peng Chen, Kuo-Kuang Jen, Yu-Ching Tseng
  • Publication number: 20190160751
    Abstract: The present application provides not only a heating device for additive manufacturing but also a heating module and a manufacturing apparatus utilizing the heating device. The heating device utilizes a rotational reflective cover to modulate a heating direction of a heating source, which expands an area correspondingly irradiated by the heating source and enhances uniformity of heating. Besides, the heating modules can be coupled and controlled by a controlling subsystem so as to respectively irradiate different areas with ranges at least partially intersecting each other, which also improves heating uniformity for heating a large area.
    Type: Application
    Filed: October 24, 2018
    Publication date: May 30, 2019
    Inventors: Chung-Chun Huang, Chih-Peng Chen, Po-Shen Lin