Abstract: A micro light-emitting diode (LED) display panel including a substrate, a first micro LED, a first light-shielding wall, a second micro LED, and a second light-shielding wall is provided. The substrate includes a plurality of pixel regions arranged in an array. The first micro LED is disposed on one of the pixel regions of the substrate. The first light-shielding wall is disposed on the substrate and located beside the first micro LED. The second micro LED is disposed on the one of the pixel regions of the substrate and located beside the first micro LED. The second light-shielding wall is disposed on the substrate and located beside the second micro LED. A light wavelength of the first micro LED is different from a light wavelength of the second micro LED. A height of the first light-shielding wall is smaller than a height of the second light-shielding wall.

Abstract: A ribonucleic acid test panel and a ribonucleic acid test device. The ribonucleic acid test device includes a control unit and a ribonucleic acid test panel. The ribonucleic acid test panel includes a substrate, multiple sensation electrode layers electrically connected with the control unit, at least one primer layer and multiple electrode wiring layers. The multiple sensation electrode layers are disposed on a first surface of the substrate. The at least one primer layer is disposed on the multiple sensation electrode layers and insulated from each other. The multiple electrode wiring layers are electrically connected with the multiple sensation electrode layers and the control unit. By means of the design of the ribonucleic acid test device, the test time is shortened and the cost is lowered.

Abstract: Compute engine circuitry configured to represent a spin network mapping of a graph representing a combinatorial optimization problem includes a plurality of ring oscillator cells, each of which includes a ring oscillator having an oscillator output, at least one coupling block, and a read block. Each coupling block connects the ring oscillator of the cell to the ring oscillator of one of a plurality of neighboring cells to form a coupled ring oscillator. The read block generates a state output for each coupled ring oscillator that indicates whether the coupled ring oscillator is in one of a same-phase state, in which the connected ring oscillators oscillate in phase with each other, and an opposite-phase state, in which the connected ring oscillators oscillate in an opposite phase from each other. A controller is configured to output a total energy of the mapping based on the state outputs.

Abstract: An apparatus for tire pressure monitoring comprises a case, a gas nozzle unit movably connected to the outside of the case, and a structure for tire pressure monitoring which is received in a receiving space in the case. The structure for tire pressure monitoring comprises a main body, a signal processing unit, a sensing unit connected to the signal processing unit, and a power unit to provide power. The main body has a first part and a second part. The first part is disposed on a top side of the second part; the first and the second parts are not on the same plane. The signal processing unit and the sensing unit are disposed on one side of the first part and on the top side of the second part, respectively. The power unit is disposed on a bottom side of the second part.

Abstract: An apparatus for tire pressure monitoring comprises a case, a gas nozzle unit movably connected to the outside of the case, and a structure for tire pressure monitoring which is received in a receiving space in the case. The structure for tire pressure monitoring comprises a main body, a signal processing unit, a sensing unit connected to the signal processing unit, and a power unit to provide power. The main body has a first part and a second part. The first part is disposed on a top side of the second part; the first and the second parts are not on the same plane. The signal processing unit and the sensing unit are disposed on one side of the first part and on the top side of the second part, respectively. The power unit is disposed on a bottom side of the second part.

Abstract: A multi-band antenna structure includes a substrate having a first wiring area located on one side surface thereof. The first wiring area has a first metal trace, a second metal trace and a connecting portion formed therein. The first and the second metal trace are respectively in an elongated spiral pattern; and the connecting portion is electrically connected at two opposite ends to the first and the second metal trace. The multi-band antenna structure can be directly integrated into electrical circuits on a circuit board to provide the advantages of reduced manufacturing cost and capable of transmitting or receiving multiple bands of signals.

Abstract: A time-based decision feedback equalizer (TB-DFE) circuit may include a voltage-to-time converter configured to convert a communication signal into a time-based signal. A timing of when an edge of the time-based signal occurs is indicative of a voltage level of the communication signal. The circuit may include a plurality of delay circuits arranged to process the time-based signal in series to generate a delay data signal. The delay circuits may adjust the timing of when the edge of the time-based signal occurs, and a corresponding time delay introduced by each of the delay circuits may be based on a respective weighting factor applied to one or more samples of an output digital signal previously generated by the TB-DFE circuit. A phase detector may compare a timing of an edge of the delay data signal with a reference clock signal and generate the output digital signal based on the comparison.

Abstract: A multi-band antenna structure includes a substrate having a first wiring area located on one side surface thereof. The first wiring area has a first metal trace, a second metal trace and a connecting portion formed therein. The first and the second metal trace are respectively in an elongated spiral pattern; and the connecting portion is electrically connected at two opposite ends to the first and the second metal trace. The multi-band antenna structure can be directly integrated into electrical circuits on a circuit board to provide the advantages of reduced manufacturing cost and capable of transmitting or receiving multiple bands of signals.

Abstract: A time-based decision feedback equalizer (TB-DFE) circuit may include a voltage-to-time converter configured to convert a communication signal into a time-based signal. A timing of when an edge of the time-based signal occurs is indicative of a voltage level of the communication signal. The circuit may include a plurality of delay circuits arranged to process the time-based signal in series to generate a delay data signal. The delay circuits may adjust the timing of when the edge of the time-based signal occurs, and a corresponding time delay introduced by each of the delay circuits may be based on a respective weighting factor applied to one or more samples of an output digital signal previously generated by the TB-DFE circuit. A phase detector may compare a timing of an edge of the delay data signal with a reference clock signal and generate the output digital signal based on the comparison.

Abstract: A specific multi-band antenna impedance matching circuit and a tire-pressure monitoring device using same are disclosed. The antenna impedance matching circuit includes at least one first, one second and one third inductance unit and at least one first, one second and one third capacitance unit. The first capacitance unit is connected at a first end to first ends of the first and the second inductance unit and at a second end to a ground; the second inductance unit and the second capacitance unit are connected in series; the third inductance unit and the third capacitance unit are connected in parallel; and the third inductance unit is connected at a first end to a first end of the second capacitance unit and at a second end to the ground.

Abstract: A common-mode filter includes a first transmission line, a second transmission line, a first wiring layer, a second wiring layer and a third wiring layer. The first wiring layer includes a first conductive capacitor plate, in which at least partial first transmission line is in the first wiring layer, and electrically coupled with the first conductive capacitor plate. The second wiring layer includes a second conductive plate and a first inductor, and the second conductive capacitor plate is electrically coupled with the first inductor. The third wiring layer includes a third conductive capacitor plate, in which at least partial second transmission line is in the second wiring layer, and electrically coupled with the third conductive capacitor plate. The first conductive capacitor plate at least partial faces the second conductive capacitor plate, and the second conductive capacitor plate at least partial faces the third conductive capacitor plate.

Abstract: A common-mode filter includes a first transmission line, a second transmission line, a first wiring layer, a second wiring layer and a third wiring layer. The first wiring layer includes a first conductive capacitor plate, in which at least partial first transmission line is in the first wiring layer, and electrically coupled with the first conductive capacitor plate. The second wiring layer includes a second conductive plate and a first inductor, and the second conductive capacitor plate is electrically coupled with the first inductor. The third wiring layer includes a third conductive capacitor plate, in which at least partial second transmission line is in the second wiring layer, and electrically coupled with the third conductive capacitor plate. The first conductive capacitor plate at least partial faces the second conductive capacitor plate, and the second conductive capacitor plate at least partial faces the third conductive capacitor plate.

Abstract: Circuit with flat electromagnetic band gap resonance structure, includes a plurality of flat units formed at a conductor layer; each flat unit spirally revolves inward from a first end to an internal point following a rotation direction, and spirally revolves outward from the internal point to a second end following an opposite rotation direction. Each flat unit is connected to a ground plane by a conductive stand (e.g., a via) at a connection point, for suppressing noise resonances at certain frequencies, and the frequencies are related to a stub length of each flat unit, and the stub length is related to a route length from the connection point to an end.

Abstract: Circuit with flat electromagnetic band gap resonance structure, includes a plurality of flat units formed at a conductor layer; each flat unit spirally revolves inward from a first end to an internal point following a rotation direction, and spirally revolves outward from the internal point to a second end following an opposite rotation direction. Each flat unit is connected to a ground plane by a conductive stand (e.g., a via) at a connection point, for suppressing noise resonances at certain frequencies, and the frequencies are related to a stub length of each flat unit, and the stub length is related to a route length from the connection point to an end.

Abstract: A delay line structure includes a flat spiral delay line and two grounding guard traces. The flat spiral delay line is disposed in the layout layer in a manner of extending from an input end, bending clockwise inward until reaching a U-turn part, continuously extending and bending counterclockwise outward to an out put end so as to form two coupling areas, which are spiral and have an opening respectively. The two grounding guard traces are disposed in the layout layer in a manner of extending from the openings respectively toward the coupling areas, having an interval between the grounding guard traces and the flat spiral delay line, wherein the grounding guard traces close to the openings of the coupling areas are electrically connected to the grounding circuit through a via respectively.

Abstract: A delay line structure includes a serpentine delay line, a first grounding guard trace and a second grounding guard trace. The serpentine delay line is disposed in a layout layer of a substrate in a manner of extending from an input end to an out put end in serpentine so as to form at least a first coupling area having a first opening toward a first direction and at least a second coupling area having a second opening toward a direction opposite to the first direction. The first grounding guard trace is disposed in the layout layer in a manner of extending from the first opening toward the first coupling area and an end of the first grounding guard trace close to the first opening is electrically connected to the grounding circuit through a first via.

Abstract: A delay line structure includes a flat spiral delay line and two grounding guard traces. The flat spiral delay line is disposed in the layout layer in a manner of extending from an input end, bending clockwise inward until reaching a U-turn part, continuously extending and bending counterclockwise outward to an out put end so as to form two coupling areas, which are spiral and have an opening respectively. The two grounding guard traces are disposed in the layout layer in a manner of extending from the openings respectively toward the coupling areas, having an interval between the grounding guard traces and the flat spiral delay line, wherein the grounding guard traces close to the openings of the coupling areas are electrically connected to the grounding circuit through a via respectively.