Abstract: Among other things, one or more techniques and/or systems are provided for shielding a signal pin. A signal pin, such as a signal pin within a probe card used to test electronic devices, such as integrated circuits, is shielded from interference signals, which are emitted from other signal pins within the probe card. Shielding the signal pin mitigates cross-talk issues and/or impendence control issues associated with signals that are carried by the signal pin. In one example, one or more shield pins are arranged with respect to the signal pin according to a shield configuration. For example, the shield configuration comprises a plane of signal pins, a substantially regular layout of signal pins, or a polygonal layout of signal pins, etc. In this way, one or more shield pins inhibit unintended interactions or effects that otherwise occur among two or more signal pins.

Abstract: In some embodiments, a probe card includes a PCB, a substrate, a pair of probes, a capacitive device and a first part. The PCB includes a pair of conductive paths through a first surface and a second surface of the PCB. The substrate includes a pair of conductive paths through a first surface and a second surface of the substrate. The conductive paths of the substrate and the corresponding conductive paths of the PCB are coupled between the first surface of the substrate and the second surface of the PCB. The probes and the corresponding conductive paths of the substrate are coupled beyond the second surface of the substrate. The capacitive device is coupled between a first conductive path and a second conductive path through the PCB, the substrate and the probes. The first part is configured beyond the second surface of the PCB, and holds the capacitive device.

Abstract: Some embodiments relate to an integrated circuit. The integrated circuit includes an inductive or capacitive wireless communication structure located on a die region of the integrated circuit. This wireless communication structure is configured to wirelessly receive a test stimulus vector to test circuitry on the die region. The integrated circuit also includes a landing region having a size and location suitable to allow a conductive needle or conductive probe to come into direct physical and electrical contact with the landing region. The landing region provides a DC power supply to the circuitry on the die region while the test stimulus vector is wirelessly received.

Abstract: Among other things, one or more techniques and/or systems are provided for shielding a signal pin. A signal pin, such as a signal pin within a probe card used to test electronic devices, such as integrated circuits, is shielded from interference signals, which are emitted from other signal pins within the probe card. Shielding the signal pin mitigates cross-talk issues and/or impendence control issues associated with signals that are carried by the signal pin. In one example, one or more shield pins are arranged with respect to the signal pin according to a shield configuration. For example, the shield configuration comprises a plane of signal pins, a substantially regular layout of signal pins, or a polygonal layout of signal pins, etc. In this way, one or more shield pins inhibit unintended interactions or effects that otherwise occur among two or more signal pins.

Abstract: Some embodiments relate to an integrated circuit. The integrated circuit includes an inductive or capacitive wireless communication structure located on a die region of the integrated circuit. This wireless communication structure is configured to wirelessly receive a test stimulus vector to test circuitry on the die region. The integrated circuit also includes a landing region having a size and location suitable to allow a conductive needle or conductive probe to come into direct physical and electrical contact with the landing region. The landing region provides a DC power supply to the circuitry on the die region while the test stimulus vector is wirelessly received.