Abstract: An apparatus includes a graphics pipeline and a pixel data reordering module. The graphics pipeline is configured to generate a plurality pieces of pixel data of a frame. The plurality pieces of pixel data of the frame are associated with a first order in which the plurality pieces of pixel data of the frame are to be provided to a display panel having an array of pixels. Each piece of pixel data of the frame corresponds to one pixel of the array of pixels. The array of pixels are divided into a plurality of groups of pixels. The pixel data reordering module is configured to cause the plurality pieces of pixel data of the frame to be obtained by the display panel in a second order. The second order is determined based on at least a manner in which the array of pixels are divided into the groups of pixels.

Abstract: A pixel circuit includes a capacitor, a light emitting control transistors, a driving transistor, and multiple light emitting transistors. The light emitting control transistor includes a gate electrode coupled to a light emitting control signal, a source electrode coupled to a supply voltage, and a drain electrode. The driving transistor includes a gate electrode coupled to the capacitor, a source electrode coupled to the drain electrode of the light emitting control transistor, and a drain electrode. Each light emitting transistor includes a gate electrode coupled to a respective light emitting signal, a source electrode coupled to the drain electrode of the driving transistor, and a drain electrode coupled to a respective light emitting element. Each light emitting signal turns on the respective light emitting transistor during a respective light emitting period within a frame period to cause the respective light emitting element to emit a light.