Abstract: The present invention relates to a single pot process for the preparation of metal picolinates useful as dietary supplement from alpha picoline, said process comprising hydrosulphonation of alpha picoline with sulphuric acid; heating the reaction mixture thus obtained between the range of 150° to 210 ° C. followed by oxidation with any suitable oxidizing agent to obtain alpha picolinic acid sulphate, and treating the thus obtained alpha picolinic acid sulphate with a metal salt solution to obtain corresponding metal picolinate.

Abstract: The present invention relates to a single pot process for the preparation of metal picolinates useful as dietary supplement from alpha picoline, said process comprising hydrosulphonation of alpha picoline with sulphuric acid; heating the reaction mixture thus obtained between the range of 150° to 210° C. followed by oxidation with any suitable oxidizing agent to obtain alpha picolinic acid sulphate, and treating the thus obtained alpha picolinic acid sulphate with a metal salt solution to obtain corresponding metal picolinate.

Abstract: Operators and plant computer programs used to operate a complex process facility are aided in managing the process during transitions by a computer-based apparatus. The apparatus incorporates a knowledge base and methods for identifying modes and transitions during plant operation. At frequent intervals, measured values of the process variables are used to evaluate the current state of the process and its sections and subsections. The identified state of the plant is broadcast to different clients of this application. The apparatus monitors the plant for the normal execution of the transition. It also identifies the current task being performed in the process and sends this message to different sections of the plant. The results are displayed on a visual display device and can also be sent to other plant computer programs for guidance during the transition.

Abstract: The present invention relates to a method, system and computer program product for clustering data points and its application to text summarization, customer profiling for web personalization and product cataloging.

Abstract: The present invention relates to a method, system and computer program product for enabling the remote authentication of fingerprints over an insecure network using a client-server architecture by generation of a set of random queries relating to fingerprint patterns based on stored fingerprint data at the server, to which the client responds based on the observed fingerprint patterns, followed by the issuing of a randomly generates set of challenges pertaining to geometrical relationships between the fingerprint patterns for which confirm responses are received by their server, the final authentication being determined by the proportion of correct responses by the client to said challenges.

Abstract: The present invention provides a method and system for providing improved understandability of received speech characterized in that it includes:

Abstract: A methodology of highly interactive intra-object relevance feedback is used to retrieve multimedia data from a database. The query object could consist of one or more images, images derived from video, a video sequence, or an audio clip. The query is adjusted using the information fed-back by the user about the relevance of previously extracted part(s) from the object itself, such that the adjusted query is a better approximation to the user's perception. The information fed-back by the user during intra-query modification is used for intra-object learning of the user's perception. The refined query is subsequently used for inter-object relevance feedback where data is retrieved from the database based on parameters learnt by intra-query object feedback mechanism, and the user provides feedback by ranking the retrieved objects in order of their relevance to him or her.

Abstract: A method for data embedding in a digital image under the constraint of a pre-specified upper bound value on the amount of change in the value of a property associated with the image. For compression tolerant data hiding in digital images, a property is selected in which the required information can be embedded. The property should be such that the value obtained from the property before and after a lossy compression does not change by a significant amount, and the change should be bounded. The property should be such that a property value as obtained from the image will not vary due to compression, but only due to malicious tampering. The value obtained from the property is stored so that the image can be verified. The complete image is considered in deciding whether to increase or decrease the property value in a particular region.

Abstract: An information handling system includes a base, a disc rotatably attached to the base, and an actuator assembly movably attached to the base the actuator assembly. An actuator assembly has an opening at the pivot therein. An actuator arm attached to the main body, and a voice coil motor is positioned within the opening of the actuator assembly. The voice coil motor also includes at least two magnets attached to the main body of the actuator arm. The magnets are arranged as a Halbach array. The voice coil motor is positioned within the opening of the actuator assembly, and near one end of the actuator assembly and at least one load spring and transducer are positioned at the other end of the actuator assembly.

Abstract: A high intensity discharge (HID) lamp driving circuit. The HID lamp driving circuit includes a first pair of switching devices connected to a high frequency resonant filter, and a second pair of switching devices connected to a ripple reducing filter. A HID lamp is connected between the first pair of switching devices and second pair of switching devices, with a dc power supply being connected to the first pair of switching devices and the second pair of switching devices. The first pair of switching devices and the second pair of switching devices are connected to a common ground with the dc power supply. The lamp driving circuit operates in a half bridge topology during a start-up operation mode of the lamp, and operates in a full-bridge topology during a steady-state operation mode of the lamp. The HID lamp driving circuit is operated in an active zero current switching scheme.

Abstract: The present invention relates to an improved, efficient and enantio-selective process for the synthesis of (4R, 6S)-4-hydroxy-6-hydroxymethyl tetrahydropyran-2-one, employing the Sharpless asymmetric dihydroxylation and regiospecific nucleophilic hydride opening of the cyclic sulfite/sulfate as the key steps. The invention also resides in the intermediates used in the process.

Abstract: A crossbar is implemented within multimedia facilities of a processor to perform vector permute operations, in which the bytes of a source operand are reordered in the target output. The crossbar is then reused for other instructions requiring multiplexing or shifting operations, particularly those in which the size of additional multiplexers or the size and delay of a barrel shifter is significant. A wide shift operation, for example, may be performed with one cycle latency by the crossbar and one additional layer of multiplexers or a small barrel shifter. The crossbar facility thus gets reused with improved performance of the instructions now sharing the crossbar and a reduction in the total area required by a multimedia facility within a processor.

Abstract: The data processing system loads three input operands, including two input vectors and a control vector, into vector registers and performs a permutation of the two input vectors as specified by the control vector, and further stores the result of the operation as the output operand in an output register. The control vector consists of sixteen indices, each uniquely identifying a single byte of input data in either of the input registers, and can be specified in the operational code or be the result of a computation previously performed within the vector registers. The control vector is specified by calculating the offset of a selected vector element of the input vector relative to a base address of the input vector and loading each element with an index equal to the relative offset. Alternatively, the generation of the alignment vector is made by performing a look-up within a look-up table.

Abstract: A crossbar is implemented within multimedia facilities of a processor to perform vector permute operations, in which the bytes of a source operand are reordered in the target output. The crossbar is then reused for other instructions requiring multiplexing or shifting operations, particularly those in which the size of additional multiplexers or the size and delay of a barrel shifter is significant. A wide shift operation, for example, may be performed with one cycle latency by the crossbar and one additional layer of multiplexers or a small barrel shifter. The crossbar facility thus gets reused with improved performance of the instructions now sharing the crossbar and a reduction in the total area required by a multimedia facility within a processor.

Abstract: The invention relates to a method of using a “bounds” comparator scheme and to a “bounds” comparator circuit. The method of using this scheme or comparator circuit allows a quick and easy test to characterize, utilizing a single floating-point bounds comparison function, the location of a point with respect to pre-defined end- points. The single floating-point bounds comparison function represents an additional instruction to be incorporated within computer instruction set architectures when performing trivial acceptance testing during the generation of three-dimensional images or graphics.

Abstract: A method and system is disclosed which summarizes the results of a classical single-instruction multiple-data SIMD predicate comparison operation, signaling whether all comparisons resulted in a false result or true result, and placing that status into a separate status register, such as the Power PC Condition Register. The method and system utilizes first and second status bits to support the signaling whether all element comparisons resulted in true or false. The first status bit is set when all element comparisons resulted in false (i.e. a NOR of all predicate comparison results), and the second status bit is set when all element comparisons resulted in true (i.e. an AND of all predicate comparison results). This capability allows control flow using conditional branching on the event when all comparison results are false or when all comparison results are true.

Abstract: A verification system for still images that embeds a watermark so that no visual artifacts are created in the images and thus maintains the visual quality of the image. The algorithm embeds information in an uncompressed image so as to later detect the alteration of the image, as well as the location of the alteration. The embedding of information into a source image is based on a defined mapping process. An image plane consists of macroblocks, which are themselves comprised of microblocks. A code is embedded corresponding to the value of this image property in each macroblock. The specific sequence of microblocks used for embedding this information in the watermarking image plane is a unique function of this property for the corresponding set of microblocks in the indexing image plane. This information can be later decoded from the stamped image. The watermark is embedded by combining the pixel values of the image with the watermark. The watermark is altered if the image is altered.

Abstract: An improved CRC generation mechanism for generating a CRC value of relevant data in a digital data stream is disclosed wherein relevant data in the data stream is identified and partitioned into a plurality of intervals. A CRC value is determined for each interval by partitioning the interval into a plurality of chunks, loading from persistent storage a table of CRC values for a range of chunks, determining a CRC value for each of the chunks with parallel table lookup operations on the table, and combining the CRC values for the chunks. The CRC values for each of the intervals is combined to generate the CRC for the relevant data. The parallel table look operation is preferably a vector permute instruction that is executed by a SIMD-style vector unit.

Abstract: A vector multiplication mechanism is provided that partitions vector multiplication operation into even and odd paths. In an odd path, odd data elements of first and second source vectors are selected, and multiplication operation is performed between each of the selected odd data elements of the first source vector and corresponding one of the selected odd data elements of the second source vector. In an even path, even data elements of the source vectors are selected, and multiplication operation is performed between each of the selected even data elements of the first source vector and corresponding one of the selected even data elements of the second source vector. Elements of resultant data of the two paths are merged together in a merge operation. The vector multiplication mechanism of the present invention preferably uses a single general-purpose register to store the resultant data of the odd path and the even path.

Abstract: A data processing system includes a data processor (10) coupled to a memory system having a first memory, such as an L1 data cache (16), arranged with a second memory (such as an L2 cache) at a lower hierarchical level. The data processor (10) prefetches data elements of a vector into the first memory prior to processing such data elements. If a requested data element is not present in the first memory, a load request is issued to the second memory and to lower levels of the memory hierarchy until the requested data element is finally retrieved and stored in the first memory. The data processor (10) continues to prefetch subsequent data elements of the vector by considering the length of the data element and the stride of the vector. In one embodiment, the data processor (10) prefetches the vector into the first memory in response to a single data stream touch load (DST) instruction (100).