Patents by Inventor Pramod Kumar
Pramod Kumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250014621Abstract: Described herein is a memory bit-cell that results in lower leakage and higher sensing margin. In at least one embodiment, a memory bit-cell comprises a plurality of capacitors, wherein an individual capacitor is coupled to a node and an individual plate-line. In at least one embodiment, memory bit-cell comprises a first transistor coupled to the node. In at least one embodiment, memory bit-cell comprises a second transistor coupled in series with the first transistor, wherein the second transistor is coupled to a bit-line, wherein the first transistor or the second transistor is controllable by a word-line, and wherein the word-line is parallel to the individual plate-line.Type: ApplicationFiled: September 17, 2024Publication date: January 9, 2025Applicant: Kepler Computing Inc.Inventors: Rajeev Kumar Dokania, Mustansir Yunus Mukadam, Erik Unterborn, Pramod Kolar, Amrita Mathuriya, Debo Olaosebikan, Tanay Gosavi, Noriyuki Sato, Sasikanth Manipatruni
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Patent number: 12188434Abstract: Supersonic jet engine includes a housing and an exhaust nozzle. Spike extends outwardly from the housing. Plurality of fans are arranged in an axial direction within the housing, each of the plurality of fans includes a plurality of fan blades. Plurality of turbines are included, and each of the plurality of turbines having a plurality of turbine blades and being arranged and coupled to a respective one of the fans in a radial direction. Plurality of radial compressors are located radially from the each of the plurality of turbines and are operable to drivingly rotate the respective turbine, which in turn rotates the respective fan. Plurality of electric motors are included, and each of the plurality of electric motors are coupled to a respective one of the plurality of radial compressors and drivingly rotating the respective radial compressor.Type: GrantFiled: August 31, 2022Date of Patent: January 7, 2025Assignee: SiriNor ASInventors: Pramod Vaditya, Anil Kumar Kommagalla Veldi, Abhijeet Inamdar, Lars-Erik Robertsen
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Publication number: 20250002458Abstract: The present disclosure is directed to salt forms of nicorandil derivatives, pharmaceutical compositions thereof, and methods of using the salt forms and pharmaceutical compositions for treating diseases or conditions.Type: ApplicationFiled: May 23, 2024Publication date: January 2, 2025Inventors: Pramod Kumar GUPTA, Shalabh GUPTA
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Publication number: 20250004228Abstract: The present disclosure provides an optical fiber ribbon (10) comprising a plurality of optical fibers (11) with coating of superabsorbent material (C). The coating (C) is applied selectively on bonded regions (13) or unbonded regions (14) of the ribbon (10). The ribbon (10) provides for reduced diameter, higher packing density, and reduced micro-bending losses. Optical fiber cable (20) comprising optical fiber ribbon (10) is also provided in the present disclosure.Type: ApplicationFiled: April 11, 2024Publication date: January 2, 2025Applicant: HFCL LimitedInventors: Atul Kumar, Pramod Agarwal, Peter Weimann, Sarthak Adrawal
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Patent number: 12184840Abstract: This invention predicts that intra mode prediction is more effective for the macroblocks where motion estimation in inter mode prediction fails. This failure is indicated by a large value of the inter mode SAD. This invention performs intra mode prediction for only macro blocks have larger inter mode SADs. The definition of a large inter mode SAD differs for different content. This invention compares the inter mode SAD of a current macroblock with an adaptive threshold. This adaptive threshold depends on the average and variance of the SADs of the previous predicted frame. An adaptive threshold is calculated for each new predictive frame.Type: GrantFiled: July 27, 2022Date of Patent: December 31, 2024Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Soyeb Nagori, Manu Mathew, Pramod Kumar Swami
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Publication number: 20240408270Abstract: An implant imaging system (200) is disclosed. The implant imaging system 200 may be provided on a joint implant made of polymer. The implant imaging system (200) includes one or more metal plates (212) including at least one bone contacting surface ‘B’. The metal plates (212) are disposed on a joint implant. Further, the bone contacting surface ‘B’ metal plates (212) are coated with one or more coatings of osteoconductive material. The presence of osteoconductive material increases the rate of osteointegration of the joint implant.Type: ApplicationFiled: February 24, 2022Publication date: December 12, 2024Applicant: MERIL HEALTHCARE PVT. LTDInventors: PRAMOD KUMAR MINOCHA, DEVESHKUMAR MAHENDRALAL KOTHWALA, ARPIT PRADIPKUMAR DAVE
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Patent number: 12155381Abstract: A radio frequency (RF) device is described. The RF device includes a switch field effect transistor (FET), having a source region, a drain region, a body region, and a gate region. The RF device also includes a dynamic bias control circuit. The dynamic bias control circuit includes a first transistor coupled to the gate region of the switch FET by a gate resistor. The dynamic bias control circuit also includes a second transistor coupled to the first transistor and coupled to the body region of the switch FET by a body resistor. The dynamic bias control circuit further includes a capacitor coupled to the body region of the switch FET by the body resistor, and the gate region of the switch FET, by the gate resistor.Type: GrantFiled: February 1, 2023Date of Patent: November 26, 2024Assignee: QUALCOMM INCORPORATEDInventors: Ravi Pramod Kumar Vedula, Abhijeet Paul, Hyunchul Jung
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Publication number: 20240379143Abstract: Described herein is a memory bit-cell that results in lower leakage and higher sensing margin. In at least one embodiment, a memory bit-cell comprises a plurality of capacitors, wherein an individual capacitor is coupled to a node and an individual plate-line. In at least one embodiment, memory bit-cell comprises a first transistor coupled to the node. In at least one embodiment, memory bit-cell comprises a second transistor coupled in series with the first transistor, wherein the second transistor is coupled to a bit-line, wherein the first transistor or the second transistor is controllable by a word-line, and wherein the word-line is parallel to the individual plate-line.Type: ApplicationFiled: July 23, 2024Publication date: November 14, 2024Applicant: Kepler Computing Inc.Inventors: Rajeev Kumar Dokania, Mustansir Yunus Mukadam, Erik Unterborn, Pramod Kolar, Amrita Mathuriya, Debo Olaosebikan, Tanay Gosavi, Noriyuki Sato, Sasikanth Manipatruni
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Publication number: 20240379144Abstract: Described herein is a memory bit-cell that results in lower leakage and higher sensing margin. In at least one embodiment, a memory bit-cell comprises a plurality of capacitors, wherein an individual capacitor is coupled to a node and an individual plate-line. In at least one embodiment, memory bit-cell comprises a first transistor coupled to the node. In at least one embodiment, memory bit-cell comprises a second transistor coupled in series with the first transistor, wherein the second transistor is coupled to a bit-line, wherein the first transistor or the second transistor is controllable by a word-line, and wherein the word-line is parallel to the individual plate-line.Type: ApplicationFiled: July 23, 2024Publication date: November 14, 2024Applicant: Kepler Computing Inc.Inventors: Rajeev Kumar Dokania, Mustansir Yunus Mukadam, Erik Unterborn, Pramod Kolar, Amrita Mathuriya, Debo Olaosebikan, Tanay Gosavi, Noriyuki Sato, Sasikanth Manipatruni
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Patent number: 12124715Abstract: Disclosed are various embodiments for improving resiliency and performance of clustered memory. A computing device can acquire a chunk of byte-addressable memory from a cluster memory host. The computing device can then identify an active set of allocated memory pages and an inactive set of allocated memory pages for a process executing on the computing device. Next, the computing device can store the active set of allocated memory pages for the process in the memory of the computing device. Finally, the computing device can store the inactive set of allocated memory pages for the process in the chunk of byte-addressable memory of the cluster memory host.Type: GrantFiled: May 24, 2023Date of Patent: October 22, 2024Assignee: VMware LLCInventors: Marcos K. Aguilera, Keerthi Kumar, Pramod Kumar, Pratap Subrahmanyam, Sairam Veeraswamy, Rajesh Venkatasubramanian
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Patent number: 12123253Abstract: A configurable door system includes a first and second door panel, an astragal, and a frame. The frame defines a first axis and is configured to pivotally support the door panels in a first configuration of the door system and in a second configuration of the door system. The first door panel is disposed to one side of the second door panel along the first axis within the frame in both the first and second configurations. The door system, in the first configuration, includes the astragal fixed to the first door panel and releasably attaches the first door panel to the frame, and the second door panel is releasably secured to the astragal. The door system, in the second configuration, includes the astragal fixed to the second door panel and releasably attaches the second door panel to the frame, and the first door panel is releasably secured to the astragal.Type: GrantFiled: October 27, 2022Date of Patent: October 22, 2024Inventors: Andres Ortega, Pramod Kumar, Garrick Beat, Jacob Chan
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Publication number: 20240321729Abstract: Disclosed is an integrated circuit (IC) with an inductor formed from redistribution layers (RDLs). An airgap is provided in an interlayer dielectric (ILD) under the bottom most RDL that makes up the inductor. In this way, an inductor with high Q value is achieved. Also, inductor isolation is improved. Thus, circuits may be placed under the inductor resulting is a smaller die.Type: ApplicationFiled: March 20, 2023Publication date: September 26, 2024Inventors: Abhijeet PAUL, Ravi Pramod Kumar VEDULA, Yufei WU
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Publication number: 20240318554Abstract: The present disclosure relates to an engine (100) including a cylinder (102) that is filled with carbon dioxide. A first piston (104) is slidably configured inside the cylinder (102) and being configured to form a first cylinder (108) with a first end (130) of the cylinder (102). A second piston (106) is slidably configured inside the cylinder (102) and being configured to form a second cylinder (110) with a second end (132) of the cylinder (102). A heater (112) is circumferentially disposed around the first cylinder (108) and the first piston (104) is configured to expand a hot carbon dioxide received inside the first cylinder (108) from the heater (112). A cooler (116) is circumferentially disposed around the second cylinder (110) and second piston (104) is configured to compress a cold carbon dioxide received inside the second cylinder (110) from the cooler (116).Type: ApplicationFiled: December 28, 2021Publication date: September 26, 2024Inventors: Pramod KUMAR, Siddhant KARMARKAR, Vijay BIRADAR
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Patent number: 12086064Abstract: An apparatus includes first CPU and second CPU cores, a L1 cache subsystem coupled to the first CPU core and comprising a L1 controller, and a L2 cache subsystem coupled to the L1 cache subsystem and to the second CPU core. The L2 cache subsystem includes a L2 memory and a L2 controller configured to operate in an aliased mode in response to a value in a memory map control register being asserted. In the aliased mode, the L2 controller receives a first request from the first CPU core directed to a virtual address in the L2 memory, receives a second request from the second CPU core directed to the virtual address in the L2 memory, directs the first request to a physical address A in the L2 memory, and directs the second request to a physical address B in the L2 memory.Type: GrantFiled: June 22, 2022Date of Patent: September 10, 2024Assignee: Texas Instruments IncorporatedInventors: Abhijeet Ashok Chachad, Timothy David Anderson, Pramod Kumar Swami, Naveen Bhoria, David Matthew Thompson, Neelima Muralidharan
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Patent number: 12088637Abstract: A system and a method to facilitate sharing media resources of a computing device with a data device integrated with the system are described for enabling a network based communication with a remote device. The system receives a device information pertaining to available computing devices through a discovery manager. The system selects the computing device from the available computing devices. The system enables to initiate a communication between the data device and the remote device. Upon initiation of the communication, the system receives communication data from the computing device, wherein the communication data are obtained using the shared resources of the computing device. The system transmits the received communication data to the remote device for facilitating the network based communication with the remote device.Type: GrantFiled: March 30, 2022Date of Patent: September 10, 2024Assignee: JIO PLATFORMS LIMITEDInventors: Pramod Belekare Nagaraja Sathya, Bharathkumar Reddy Mallepalli, Anurag Somani, Venkata Subrahmanyam Gajavalli, Keshav Kumar Halli Mysore Kishor Kumar
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Patent number: 12086469Abstract: Disclosed are various embodiments for improving the resiliency and performance for clustered memory. A computing device can mark a page of the memory as being reclaimed. The computing device can then set the page of the memory as read-only. Next, the computing device can submit a write request for the contents of the page to individual ones of a plurality of memory hosts. Subsequently, the computing device can receive individual confirmations of a successful write of the page from the individual ones of the plurality of memory hosts. Then, the computing device can mark the page as free in response to receipt of the individual confirmations of the successful write from the individual ones of the plurality of memory hosts.Type: GrantFiled: May 5, 2023Date of Patent: September 10, 2024Assignee: VMware LLCInventors: Marcos K. Aguilera, Keerthi Kumar, Pramod Kumar, Pratap Subrahmanyam, Sairam Veeraswamy, Rajesh Venkatasubramanian
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Publication number: 20240271375Abstract: Composite decks increase bridge strength and stiffness. Prestressed composite open web steel girder has added advantage of high strength cable support. Results of typical 125 m span bridges having heights of 9.0 m, 10.0 m and 12.5 m, and another 50.0 m span and 2.5 m height are given. Member stresses and bridge deflections during erection remained safe. Average steel off take for the 125 m bridge is 2.65 t/m and for the 50 m span bridge it is 1.77 t/m for limiting live load deflection of Span/800. Its reserve strength is 3.2 times service condition live load. The girders are panel wise workshop fabricated, assembled at site, jacked up or crane lifted to secure over bearings. Connection of the cross members, and onsite deck casting in parts with stage wise bottom chord prestressing is carried out. Short to long span bridges for single or multiple lanes in road, rail, metro rail, and coastal link projects are feasible.Type: ApplicationFiled: August 25, 2023Publication date: August 15, 2024Inventor: Pramod Kumar Singh
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Publication number: 20240271589Abstract: Supersonic jet engine includes a housing and an exhaust nozzle. Spike extends outwardly from the housing. Plurality of fans are arranged in an axial direction within the housing, each of the plurality of fans includes a plurality of fan blades. Plurality of turbines are included, and each of the plurality of turbines having a plurality of turbine blades and being arranged and coupled to a respective one of the fans in a radial direction. Plurality of radial compressors are located radially from the each of the plurality of turbines and are operable to drivingly rotate the respective turbine, which in turn rotates the respective fan. Plurality of electric motors are included, and each of the plurality of electric motors are coupled to a respective one of the plurality of radial compressors and drivingly rotating the respective radial compressor.Type: ApplicationFiled: August 31, 2022Publication date: August 15, 2024Inventors: Pramod VADITYA, Anil Kumar Kommagalla VELDI, Abhijeet INAMDAR, Lars-Erik ROBERTSEN
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Publication number: 20240257854Abstract: Described herein is a memory bit-cell that results in lower leakage and higher sensing margin. In at least one embodiment, a memory bit-cell comprises a plurality of capacitors, wherein an individual capacitor is coupled to a node and an individual plate-line. In at least one embodiment, memory bit-cell comprises a first transistor coupled to the node. In at least one embodiment, memory bit-cell comprises a second transistor coupled in series with the first transistor, wherein the second transistor is coupled to a bit-line, wherein the first transistor or the second transistor is controllable by a word-line, and wherein the word-line is parallel to the individual plate-line.Type: ApplicationFiled: January 30, 2023Publication date: August 1, 2024Applicant: Kepler Computing Inc.Inventors: Rajeev Kumar Dokania, Mustansir Yunus Mukadam, Erik Unterborn, Pramod Kolar, Amrita Mathuriya, Debo Olaosebikan, Tanay Gosavi, Noriyuki Sato, Sasikanth Manipatruni
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Publication number: 20240253027Abstract: The present invention provides a novel, cost-effective and simple synthetic process for preparing a nano ZSM-5 catalyst which is further utilized in fluid catalytic cracking of feedstock oil containing organic compounds. The nano-ZSM-5 catalyst shows higher selectivity towards olefines and low selectivity towards LCO and bottoms.Type: ApplicationFiled: March 30, 2023Publication date: August 1, 2024Inventors: Narasimharao KANNA, Suresh Kumar B, Hemant MISHRA, Pramod KUMAR