Patents by Inventor Prashant R. Chandra

Prashant R. Chandra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8700821
    Abstract: A device, method, and system are disclosed. In one embodiment the device includes a router to transmit data packets between multiple host controllers and one or more peripheral devices. The router can receive a data packet from a host controller and transmit the data packet to a peripheral device across a data transmission path. The peripheral device is coupled to the first data transmission path through a first universal multi-transport medium (UMTM) connector. The connector includes an optical coupling capable of transporting the first data packet within an optical signal and an electrical coupling capable of transporting the first data packet within an electrical signal.
    Type: Grant
    Filed: August 22, 2008
    Date of Patent: April 15, 2014
    Assignee: Intel Corporation
    Inventors: Prashant R. Chandra, Ajay V. Bhatt, Kevin Kahn, Steve McGowan
  • Publication number: 20130163474
    Abstract: Described are embodiments of methods, apparatuses, and systems for multi-protocol tunneling across a multi-protocol I/O interconnect of computer apparatus. A method for configuring a multi-protocol I/O interconnect may include identifying a plurality of switches of a switching fabric of a multi-protocol I/O interconnect, and configuring a path from a port of a first switch of the plurality of switches to a port of a second switch of the plurality of switches. Packets of a first protocol and packets of a second protocol, different from the first protocol, may be simultaneously routed over the path. Other embodiments may be described and claimed.
    Type: Application
    Filed: December 27, 2011
    Publication date: June 27, 2013
    Inventors: Prashant R. Chandra, Kevin C. Kahn
  • Publication number: 20130163617
    Abstract: Described are embodiments of methods, apparatuses, and systems for time synchronization of a multi-protocol I/O interconnect of computer apparatus. A method for synchronizing time across the multi-protocol I/O interconnect may include providing a first local time of a first switch of a switching fabric of a multi-protocol interconnect to a second switch of the switching fabric, and adjusting a second local time of the second switch to the first local time. Other embodiments may be described and claimed.
    Type: Application
    Filed: December 27, 2011
    Publication date: June 27, 2013
    Inventors: Prashant R. Chandra, Vladimir Yudovich, Eran Galil, Efraim Kugman
  • Publication number: 20130166813
    Abstract: Described are embodiments of methods, apparatuses, and systems for multi-protocol tunneling across a multi-protocol I/O interconnect of computer apparatus. A method for managing flow across the multi-protocol I/O interconnect may include providing, by a first port of a switching fabric of a multi-protocol interconnect to a second port of the switching fabric, a first credit grant packet and a second credit grant packet as indications of unoccupied space of a buffer associated with a path between the first port and a second port, and simultaneously routing a first data packet of a first protocol and a second data packet of a second protocol, different from the first protocol, on the path from the second port to the first port based at least in part on receipt by the second port of the first and second credit grant packets. Other embodiments may be described and claimed.
    Type: Application
    Filed: December 27, 2011
    Publication date: June 27, 2013
    Inventors: Prashant R. Chandra, Kevin C. Kahn
  • Publication number: 20130166798
    Abstract: Described are embodiments of methods, apparatuses, and systems for multi-protocol tunneling across a multi-protocol I/O interconnect of computer apparatus. A method for multi-protocol tunneling may include establishing a first communication path between ports of a switching fabric of a multi-protocol interconnect of a computer apparatus in response to a peripheral device being connected to the computer apparatus, establishing a second communication path between the switching fabric and a protocol-specific controller, and routing, by the multi-protocol interconnect, packets of a protocol of the peripheral device from the peripheral device to the protocol-specific controller over the first and second communication paths. Other embodiments may be described and claimed.
    Type: Application
    Filed: December 27, 2011
    Publication date: June 27, 2013
    Inventors: Prashant R. Chandra, Kevin C. Kahn, Eran Galil, Efraim Kugman, Naama Zolotov, Vladimir Yudovich, Yoni Dishon, Elli Bagelman
  • Publication number: 20130163605
    Abstract: Described are embodiments of methods, apparatuses, and systems for multi-protocol tunneling across a multi-protocol I/O interconnect of computer apparatus. A multi-protocol I/O interconnect may include a switching fabric operatively coupled to a first protocol-specific controller and a second protocol-specific controller, and may be configured to simultaneously route packets of the first protocol to the first protocol-specific controller and packets of the second protocol to the second protocol-specific controller. Other embodiments may be described and claimed.
    Type: Application
    Filed: December 27, 2011
    Publication date: June 27, 2013
    Inventors: Prashant R. Chandra, Kevin C. Kahn
  • Patent number: 8407367
    Abstract: A system, device, and method are disclosed. In one embodiment the system includes a first host controller that utilizes a first protocol. The system also includes a second host controller that utilizes a second protocol. The system also includes a unified connector port. Finally, the system includes a router that is coupled to the first host controller, the second host controller, and the unified connector port. The router is functionally capable of encapsulating a physical layer packet from the first host controller into a first unified connector protocol frame and then transmits the new first frame to the unified connector port. The router is also capable of encapsulating a physical layer packet that it receives from the second host controller into a second unified connector protocol frame and then transmits the second frame to the unified connector port. The first and second protocols are not the same protocol.
    Type: Grant
    Filed: December 26, 2007
    Date of Patent: March 26, 2013
    Assignee: Intel Corporation
    Inventors: Prashant R. Chandra, Ajay V. Bhatt
  • Patent number: 8087024
    Abstract: In general, in one aspect, the disclosure describes a processor that includes an instruction store to store instructions of at least a portion of at least one program and multiple engines coupled to the shared instruction store. The engines provide multiple execution threads and include an instruction cache to cache a subset of the at least the portion of the at least one program from the instruction store, with different respective portions of the engine's instruction cache being allocated to different respective ones of the engine threads.
    Type: Grant
    Filed: November 18, 2008
    Date of Patent: December 27, 2011
    Assignee: Intel Corporation
    Inventors: Sridhar Lakshmanamurthy, Wilson Y. Liao, Prashant R. Chandra, Jeen-Yuan Miin, Yim Pun
  • Patent number: 7991293
    Abstract: A system, device, and method are disclosed. In one embodiment the system includes an optical link and a peripheral device optically coupled to the optical link. The system also includes a host controller, such as a graphics, network, or I/O controller. The system also includes a unified optical connector port, which is optically coupled to the optical link and electrically coupled to the first host controller. The port has a wavelength allocation unit that can allocate an optical wavelength for an optical signal that is utilized to communicate with the peripheral device. The port also includes an electrical-to-optical transmission unit capable of converting an electrical signal, received from the host controller, to the optical signal that was allocated at the first optical wavelength. The electrical-to-optical transmission unit is also capable of transmitting one or more data packets within the first optical signal to the peripheral device across the optical link.
    Type: Grant
    Filed: December 27, 2007
    Date of Patent: August 2, 2011
    Assignee: Intel Corporation
    Inventor: Prashant R. Chandra
  • Patent number: 7929536
    Abstract: A method according to one embodiment may include storing data in a send buffer. A transmission header may be created, in which the transmission header may include a pointer to the data in the send buffer. Packets may be transmitted, in which the packets include the transmission header and the data linked to the transmission header by the pointer, wherein the packets are transmitted without copying the data to create the packets. Of course, many alternatives, variations and modifications are possible without materially departing from this embodiment.
    Type: Grant
    Filed: December 28, 2006
    Date of Patent: April 19, 2011
    Assignee: Intel Corporation
    Inventors: Alok Kumar, Eswar Eduri, Prashant R. Chandra, Uday R Naik
  • Patent number: 7730501
    Abstract: Techniques for parallel processing of events within multiple event contexts include dynamically binding an event context to an execution context in response to receiving an event by storing arriving events into a global event queue and storing events from the global event queue in per-execution context event queues are described. The techniques associate event queues with the execution contexts to temporarily store the events for a duration of the binding and thus dynamically bind the events received on a per-event basis in the context queues.
    Type: Grant
    Filed: November 19, 2003
    Date of Patent: June 1, 2010
    Assignee: Intel Corporation
    Inventors: Alok Kumar, Prashant R. Chandra
  • Publication number: 20100049885
    Abstract: A device, method, and system are disclosed. In one embodiment the device includes a router to transmit data packets between multiple host controllers and one or more peripheral devices. The router can receive a data packet from a host controller and transmit the data packet to a peripheral device across a data transmission path. The peripheral device is coupled to the first data transmission path through a first universal multi-transport medium (UMTM) connector. The connector includes an optical coupling capable of transporting the first data packet within an optical signal and an electrical coupling capable of transporting the first data packet within an electrical signal.
    Type: Application
    Filed: August 22, 2008
    Publication date: February 25, 2010
    Inventors: Prashant R. Chandra, Ajay V. Bhatt, Kevin Kahn, Steve McGowan
  • Publication number: 20090169214
    Abstract: A system, device, and method are disclosed. In one embodiment the system includes an optical link and a peripheral device optically coupled to the optical link. The system also includes a host controller, such as a graphics, network, or I/O controller. The system also includes a unified optical connector port, which is optically coupled to the optical link and electrically coupled to the first host controller. The port has a wavelength allocation unit that can allocate an optical wavelength for an optical signal that is utilized to communicate with the peripheral device. The port also includes an electrical-to-optical transmission unit capable of converting an electrical signal, received from the host controller, to the optical signal that was allocated at the first optical wavelength. The electrical-to-optical transmission unit is also capable of transmitting one or more data packets within the first optical signal to the peripheral device across the optical link.
    Type: Application
    Filed: December 27, 2007
    Publication date: July 2, 2009
    Inventor: Prashant R. Chandra
  • Publication number: 20090172185
    Abstract: A system, device, and method are disclosed. In one embodiment the system includes a first host controller that utilizes a first protocol. The system also includes a second host controller that utilizes a second protocol. The system also includes a unified connector port. Finally, the system includes a router that is coupled to the first host controller, the second host controller, and the unified connector port. The router is functionally capable of encapsulating a physical layer packet from the first host controller into a first unified connector protocol frame and then transmits the new first frame to the unified connector port. The router is also capable of encapsulating a physical layer packet that it receives from the second host controller into a second unified connector protocol frame and then transmits the second frame to the unified connector port. The first and second protocols are not the same protocol.
    Type: Application
    Filed: December 26, 2007
    Publication date: July 2, 2009
    Inventors: Prashant R. Chandra, Ajay V. Bhatt
  • Patent number: 7536692
    Abstract: In general, in one aspect, the disclosure describes a processor that includes an instruction store to store instructions of at least a portion of at least one program and multiple engines coupled to the shared instruction store. The engines provide multiple execution threads and include an instruction cache to cache a subset of the at least the portion of the at least one program from the instruction store, with different respective portions of the engine's instruction cache being allocated to different respective ones of the engine threads.
    Type: Grant
    Filed: November 6, 2003
    Date of Patent: May 19, 2009
    Assignee: Intel Corporation
    Inventors: Sridhar Lakshmanamurthy, Wilson Y. Liao, Prashant R. Chandra, Jeen-Yuan Miin, Yim Pun
  • Patent number: 7525958
    Abstract: A method and apparatus for two-stage packet classification. In the first stage, which may be implemented in software, a packet is classified on the basis of the packet's network path and, perhaps, its protocol. In the second stage, which may be implemented in hardware, the packet is classified on the basis of one or more transport level fields of the packet. An apparatus of two-stage packet classification may include a processing system for first stage code execution, a classification circuit for performing the second stage of classification, and a memory to store a number of bins, each bin including one or more rules.
    Type: Grant
    Filed: April 8, 2004
    Date of Patent: April 28, 2009
    Assignee: Intel Corporation
    Inventors: Alok Kumar, Michael E. Kounavis, Raj Yavatkar, Prashant R Chandra, Sridhar Lakshmanamurthy, Chen-Chi Kuo, Harrick M. Vin
  • Publication number: 20090089546
    Abstract: In general, in one aspect, the disclosure describes a processor that includes an instruction store to store instructions of at least a portion of at least one program and multiple engines coupled to the shared instruction store. The engines provide multiple execution threads and include an instruction cache to cache a subset of the at least the portion of the at least one program from the instruction store, with different respective portions of the engine's instruction cache being allocated to different respective ones of the engine threads.
    Type: Application
    Filed: November 18, 2008
    Publication date: April 2, 2009
    Applicant: Intel Corporation
    Inventors: Sridhar Lakshmanamurthy, Wilson Y. Liao, Prashant R. Chandra, Jeen-Yuan Miin, Yim Pun
  • Patent number: 7433364
    Abstract: Techniques for optimizing queuing performance include passing, from a ring having M slots, one or more enqueue requests and one or more dequeue requests to a queue manager, and determining whether the ring is full, and if the ring is full, sending only an enqueue request to the queue manager when one of the M slots is next available, otherwise, sending both an enqueue request and a dequeue request to the queue manager.
    Type: Grant
    Filed: December 24, 2003
    Date of Patent: October 7, 2008
    Assignee: Intel Corporation
    Inventors: Prashant R. Chandra, Uday Naik, Alok Kumar, Ameya S. Varde, David A. Romano
  • Publication number: 20080062991
    Abstract: A method according to one embodiment may include storing data in a send buffer. A transmission header may be created, in which the transmission header may include a pointer to the data in the send buffer. Packets may be transmitted, in which the packets include the transmission header and the data linked to the transmission header by the pointer, wherein the packets are transmitted without copying the data to create the packets. Of course, many alternatives, variations and modifications are possible without materially departing from this embodiment.
    Type: Application
    Filed: December 28, 2006
    Publication date: March 13, 2008
    Applicant: INTEL CORPORATION
    Inventors: Alok Kumar, Eswar Eduri, Prashant R. Chandra, Uday R. Naik
  • Patent number: 7336675
    Abstract: A method and apparatus to receive a plurality of packet from an inflow of a single packet flow. In response to receiving the plurality of packets, a plurality of packet pointers is enqueued into multiple physical queues. Each of the plurality of packet pointers designates one of the plurality of packets from the single packet flow. The plurality of packet pointers are dequeued from the multiple physical queues to transmit the plurality of packets along an outflow of the single packet flow.
    Type: Grant
    Filed: December 22, 2003
    Date of Patent: February 26, 2008
    Assignee: Intel Corporation
    Inventors: Uday R. Naik, Prashant R. Chandra, Alok Kumar, Ameya S. Varde