Patents by Inventor Prashant Raghu
Prashant Raghu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8349687Abstract: A transistor gate forming method includes forming a metal layer within a line opening and forming a fill layer within the opening over the metal layer. The fill layer is substantially selectively etchable with respect to the metal layer. A transistor structure includes a line opening, a dielectric layer within the opening, a metal layer over the dielectric layer within the opening, and a fill layer over the metal layer within the opening. The metal layer/fill layer combination exhibits less intrinsic less than would otherwise exist if the fill layer were replaced by an increased thickness of the metal layer. The inventions apply at least to 3-D transistor structures.Type: GrantFiled: December 23, 2010Date of Patent: January 8, 2013Assignee: Micron Technology, Inc.Inventors: Sanh D. Tang, Gordon A. Haller, Prashant Raghu, Ravi Iyer
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Publication number: 20120322266Abstract: The invention includes methods in which silicon is removed from titanium-containing container structures with an etching composition having a phosphorus-and-oxygen-containing compound therein. The etching composition can, for example, include one or both of ammonium hydroxide and tetra-methyl ammonium hydroxide. The invention also includes methods in which titanium-containing whiskers are removed from between titanium-containing capacitor electrodes. Such removal can be, for example, accomplished with an etch utilizing one or more of hydrofluoric acid, ammonium fluoride, nitric acid and hydrogen peroxide.Type: ApplicationFiled: August 23, 2012Publication date: December 20, 2012Applicant: Micron Technology, Inc.Inventor: Prashant Raghu
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Publication number: 20120314171Abstract: In one or more embodiments, display devices having electrolessly plated conductors and methods are disclosed. One such embodiment is directed to a method of forming a reflective pixel array for a display device, including forming a plurality of conductive pads, each of the conductive pads corresponding to a reflective pixel, and electrolessly plating each of the conductive pads with a reflective conductor.Type: ApplicationFiled: June 8, 2011Publication date: December 13, 2012Inventors: Anurag Jindal, Kunal Parekh, Prashant Raghu, Nicolai Petrov, Mark Meldrim
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Publication number: 20120306059Abstract: Methods and etchant compositions for wet etching to selectively remove a hafnium aluminum oxide (HfAlOx) material relative to silicon oxide (SiOx) are provided.Type: ApplicationFiled: August 14, 2012Publication date: December 6, 2012Applicant: MICRON TECHNOLOGY, INC.Inventors: Prashant Raghu, Yi Yang
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Publication number: 20120298158Abstract: Several embodiments of cleaning systems using polyelectrolyte and various associated methods for cleaning microelectronic substrates are disclosed herein. One embodiment is directed to a system that has a substrate support for holding the microelectronic substrate, a dispenser positioned above the substrate support and facing a surface of the microelectronic substrate, a reservoir in fluid communication with the dispenser via a conduit, and a washing solution contained in the reservoir. The washing solution includes a polyelectrolyte.Type: ApplicationFiled: August 8, 2012Publication date: November 29, 2012Applicant: MICRON TECHNOLOGY, INC.Inventors: Joseph N. Greeley, Nishant Sinha, Lukasz Hupka, Timothy A. Quick, Prashant Raghu
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Publication number: 20120276725Abstract: Methods of selectively forming a metal-doped chalcogenide material comprise exposing a chalcogenide material to a transition metal solution, and incorporating transition metal of the transition solution into the chalcogenide material without substantially incorporating the transition metal into an adjacent material. The chalcogenide material is not silver selenide. Another method comprises forming a chalcogenide material adjacent to and in contact with an insulative material, exposing the chalcogenide material and the insulative material to a transition metal solution, and diffusing transition metal of the transition metal solution into the chalcogenide material while substantially no transition metal diffuses into the insulative material.Type: ApplicationFiled: April 26, 2011Publication date: November 1, 2012Applicant: MICRON TECHNOLOGY, INC.Inventors: Jerome A. Imonigie, Prashant Raghu, Theodore M. Taylor, Scott E. Sills
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Patent number: 8283258Abstract: Methods and etchant compositions for wet etching to selectively remove a hafnium aluminum oxide (HfAlOx) material relative to silicon oxide (SiOx) are provided.Type: GrantFiled: August 16, 2007Date of Patent: October 9, 2012Assignee: Micron Technology, Inc.Inventors: Prashant Raghu, Yi Yang
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Patent number: 8273261Abstract: The invention includes methods in which silicon is removed from titanium-containing container structures with an etching composition having a phosphorus-and-oxygen-containing compound therein. The etching composition can, for example, include one or both of ammonium hydroxide and tetra-methyl ammonium hydroxide. The invention also includes methods in which titanium-containing whiskers are removed from between titanium-containing capacitor electrodes. Such removal can be, for example, accomplished with an etch utilizing one or more of hydrofluoric acid, ammonium fluoride, nitric acid and hydrogen peroxide.Type: GrantFiled: March 30, 2010Date of Patent: September 25, 2012Assignee: Micron Technology, Inc.Inventor: Prashant Raghu
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Patent number: 8252119Abstract: Several embodiments of cleaning systems using polyelectrolyte and various associated methods for cleaning microelectronic substrates are disclosed herein. One embodiment is directed to a system that has a substrate support for holding the microelectronic substrate, a dispenser positioned above the substrate support and facing a surface of the microelectronic substrate, a reservoir in fluid communication with the dispenser via a conduit, and a washing solution contained in the reservoir. The washing solution includes a polyelectrolyte.Type: GrantFiled: August 20, 2008Date of Patent: August 28, 2012Assignee: Micron Technology, Inc.Inventors: Joseph N. Greeley, Nishant Sinha, Lukasz Hupka, Timothy A. Quick, Prashant Raghu
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Method of forming capacitors, and methods of utilizing silicon dioxide-containing masking structures
Patent number: 8183157Abstract: Some embodiments include methods of forming capacitors. Storage nodes are formed within a material. The storage nodes have sidewalls along the material. Some of the material is removed to expose portions of the sidewalls. The exposed portions of the sidewalls are coated with a substance that isn't wetted by water. Additional material is removed to expose uncoated regions of the sidewalls. The substance is removed, and then capacitor dielectric material is formed along the sidewalls of the storage nodes. Capacitor electrode material is then formed over the capacitor dielectric material. Some embodiments include methods of utilizing a silicon dioxide-containing masking structure in which the silicon dioxide of the masking structure is coated with a substance that isn't wetted by water.Type: GrantFiled: February 22, 2011Date of Patent: May 22, 2012Assignee: Micron Technology, Inc.Inventors: Naraji B Rana, Nishant Sinha, Prashant Raghu, Jim J. Hofmann, Neil Joseph Greeley -
Patent number: 8026148Abstract: Some embodiments include methods of forming capacitors. Storage nodes are formed within a material. The storage nodes have sidewalls along the material. Some of the material is removed to expose portions of the sidewalls. The exposed portions of the sidewalls are coated with a substance that isn't wetted by water. Additional material is removed to expose uncoated regions of the sidewalls. The substance is removed, and then capacitor dielectric material is formed along the sidewalls of the storage nodes. Capacitor electrode material is then formed over the capacitor dielectric material. Some embodiments include methods of utilizing a silicon dioxide-containing masking structure in which the silicon dioxide of the masking structure is coated with a substance that isn't wetted by water.Type: GrantFiled: January 12, 2011Date of Patent: September 27, 2011Assignee: Micron Technology, Inc.Inventors: Niraj B. Rana, Nishant Sinha, Prashant Raghu, Jim J. Hofmann, Neil Joseph Greeley
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Method of Forming Capacitors, and Methods of Utilizing Silicon Dioxide-Containing Masking Structures
Publication number: 20110143543Abstract: Some embodiments include methods of forming capacitors. Storage nodes are formed within a material. The storage nodes have sidewalls along the material. Some of the material is removed to expose portions of the sidewalls. The exposed portions of the sidewalls are coated with a substance that isn't wetted by water. Additional material is removed to expose uncoated regions of the sidewalls. The substance is removed, and then capacitor dielectric material is formed along the sidewalls of the storage nodes. Capacitor electrode material is then formed over the capacitor dielectric material. Some embodiments include methods of utilizing a silicon dioxide-containing masking structure in which the silicon dioxide of the masking structure is coated with a substance that isn't wetted by water.Type: ApplicationFiled: February 22, 2011Publication date: June 16, 2011Applicant: Micro Technology Inc.Inventors: NIRAJ RANA, Nishant Sinha, Prashant Raghu, Jim Hofmann, Neil Greeley -
Publication number: 20110111597Abstract: Some embodiments include methods of forming capacitors. Storage nodes are formed within a material. The storage nodes have sidewalls along the material. Some of the material is removed to expose portions of the sidewalls. The exposed portions of the sidewalls are coated with a substance that isn't wetted by water. Additional material is removed to expose uncoated regions of the sidewalls. The substance is removed, and then capacitor dielectric material is formed along the sidewalls of the storage nodes. Capacitor electrode material is then formed over the capacitor dielectric material. Some embodiments include methods of utilizing a silicon dioxide-containing masking structure in which the silicon dioxide of the masking structure is coated with a substance that isn't wetted by water.Type: ApplicationFiled: January 12, 2011Publication date: May 12, 2011Applicant: MICRON TECHNOLOGY, INC.Inventors: Niraj Rana, Nishant Sinha, Prashant Raghu, Jim Hofmann, Neil Greeley
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Publication number: 20110092062Abstract: A transistor gate forming method includes forming a metal layer within a line opening and forming a fill layer within the opening over the metal layer. The fill layer is substantially selectively etchable with respect to the metal layer. A transistor structure includes a line opening, a dielectric layer within the opening, a metal layer over the dielectric layer within the opening, and a fill layer over the metal layer within the opening. The metal layer/fill layer combination exhibits less intrinsic less than would otherwise exist if the fill layer were replaced by an increased thickness of the metal layer. The inventions apply at least to 3-D transistor structures.Type: ApplicationFiled: December 23, 2010Publication date: April 21, 2011Applicant: Micron Technology, Inc.Inventors: Sanh D. Tang, Gordon A. Haller, Prashant Raghu, Ravi Iyer
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Patent number: 7902081Abstract: A method of etching polysilicon includes exposing a substrate comprising polysilicon to a solution comprising water, HF, and at least one of a conductive metal nitride, Pt, and Au under conditions effective to etch polysilicon from the substrate. In one embodiment, a substrate first region comprising polysilicon and a substrate second region comprising at least one of a conductive metal nitride, Pt, and Au is exposed to a solution comprising water and HF. The solution is devoid of any detectable conductive metal nitride, Pt, and Au prior to the exposing. At least some of the at least one are etched into the solution upon the exposing. Then, polysilicon is etched from the first region at a faster rate than any etch rate of the first region polysilicon prior to the etching of the at least some of the conductive metal nitride, Pt, and Au.Type: GrantFiled: October 11, 2006Date of Patent: March 8, 2011Assignee: Micron Technology, Inc.Inventors: Prashant Raghu, Vishwanath Bhat, Niraj Rana
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Patent number: 7892937Abstract: Some embodiments include methods of forming capacitors. Storage nodes are formed within a material. The storage nodes have sidewalls along the material. Some of the material is removed to expose portions of the sidewalls. The exposed portions of the sidewalls are coated with a substance that isn't wetted by water. Additional material is removed to expose uncoated regions of the sidewalls. The substance is removed, and then capacitor dielectric material is formed along the sidewalls of the storage nodes. Capacitor electrode material is then formed over the capacitor dielectric material. Some embodiments include methods of utilizing a silicon dioxide-containing masking structure in which the silicon dioxide of the masking structure is coated with a substance that isn't wetted by water.Type: GrantFiled: October 16, 2008Date of Patent: February 22, 2011Assignee: Micron Technology, Inc.Inventors: Niraj Rana, Nishant Sinha, Prashant Raghu, Jim Hofmann, Neil Greeley
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Patent number: 7867845Abstract: A transistor gate forming method includes forming a metal layer within a line opening and forming a fill layer within the opening over the metal layer. The fill layer is substantially selectively etchable with respect to the metal layer. A transistor structure includes a line opening, a dielectric layer within the opening, a metal layer over the dielectric layer within the opening, and a fill layer over the metal layer within the opening. The metal layer/fill layer combination exhibits less intrinsic less than would otherwise exist if the fill layer were replaced by an increased thickness of the metal layer. The inventions apply at least to 3-D transistor structures.Type: GrantFiled: September 1, 2005Date of Patent: January 11, 2011Assignee: Micron Technology, Inc.Inventors: Sanh D. Tang, Gordon A. Haller, Prashant Raghu, Ravi Iyer
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Publication number: 20100190344Abstract: The invention includes methods in which silicon is removed from titanium-containing container structures with an etching composition having a phosphorus-and-oxygen-containing compound therein. The etching composition can, for example, include one or both of ammonium hydroxide and tetra-methyl ammonium hydroxide. The invention also includes methods in which titanium-containing whiskers are removed from between titanium-containing capacitor electrodes. Such removal can be, for example, accomplished with an etch utilizing one or more of hydrofluoric acid, ammonium fluoride, nitric acid and hydrogen peroxide.Type: ApplicationFiled: March 30, 2010Publication date: July 29, 2010Applicant: MICRON TECHNOLOGY, INC.Inventor: Prashant Raghu
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Patent number: 7713813Abstract: The invention includes methods in which silicon is removed from titanium-containing container structures with an etching composition having a phosphorus-and-oxygen-containing compound therein. The etching composition can, for example, include one or both of ammonium hydroxide and tetra-methyl ammonium hydroxide. The invention also includes methods in which titanium-containing whiskers are removed from between titanium-containing capacitor electrodes. Such removal can be, for example, accomplished with an etch utilizing one or more of hydrofluoric acid, ammonium fluoride, nitric acid and hydrogen peroxide.Type: GrantFiled: August 31, 2005Date of Patent: May 11, 2010Assignee: Micron Technology, Inc.Inventor: Prashant Raghu
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Publication number: 20100099232Abstract: Some embodiments include methods of forming capacitors. Storage nodes are formed within a material. The storage nodes have sidewalls along the material. Some of the material is removed to expose portions of the sidewalls. The exposed portions of the sidewalls are coated with a substance that isn't wetted by water. Additional material is removed to expose uncoated regions of the sidewalls. The substance is removed, and then capacitor dielectric material is formed along the sidewalls of the storage nodes. Capacitor electrode material is then formed over the capacitor dielectric material. Some embodiments include methods of utilizing a silicon dioxide-containing masking structure in which the silicon dioxide of the masking structure is coated with a substance that isn't wetted by water.Type: ApplicationFiled: October 16, 2008Publication date: April 22, 2010Inventors: Niraj Rana, Nishant Sinha, Prashant Raghu, Jim Hofmann, Neil Greeley