Patents by Inventor Prashant Raghu

Prashant Raghu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100043824
    Abstract: Several embodiments of cleaning systems using polyelectrolyte and various associated methods for cleaning microelectronic substrates are disclosed herein. One embodiment is directed to a system that has a substrate support for holding the microelectronic substrate, a dispenser positioned above the substrate support and facing a surface of the microelectronic substrate, a reservoir in fluid communication with the dispenser via a conduit, and a washing solution contained in the reservoir. The washing solution includes a polyelectrolyte.
    Type: Application
    Filed: August 20, 2008
    Publication date: February 25, 2010
    Applicant: Micron Technology, Inc.
    Inventors: Joseph N. Greeley, Nishant Sinha, Lukasz Hupka, Timothy A. Quick, Prashant Raghu
  • Patent number: 7659560
    Abstract: A transistor gate forming method includes forming a metal layer within a line opening and forming a fill layer within the opening over the metal layer. The fill layer is substantially selectively etchable with respect to the metal layer. A transistor structure includes a line opening, a dielectric layer within the opening, a metal layer over the dielectric layer within the opening, and a fill layer over the metal layer within the opening. The metal layer/fill layer combination exhibits less intrinsic less than would otherwise exist if the fill layer were replaced by an increased thickness of the metal layer. The inventions apply at least to 3-D transistor structures.
    Type: Grant
    Filed: March 8, 2007
    Date of Patent: February 9, 2010
    Assignee: Micron Technology, Inc.
    Inventors: Sanh D. Tang, Gordon A. Haller, Prashant Raghu, Ravi Iyer
  • Patent number: 7629266
    Abstract: The invention includes an etchant composition containing isopropyl alcohol and one or more of HF, NH4F and tetramethyl ammonium fluoride (TMAF). The invention encompasses a method of processing a substrate. A substrate is provided which has a first material containing at least one of polysilicon, monocrystalline silicon and amorphous silicon, and a second material. The substrate is exposed to an etch composition which comprises isopropyl alcohol and at least one of HF, NH4F and TMAF. The invention includes a method of processing a semiconductor construction including providing a construction which has a capacitor electrode material and an oxide material along at least a portion of the capacitor electrode material. At least some of the oxide material is removed by isotropic etching utilizing an etchant composition comprising isopropyl alcohol.
    Type: Grant
    Filed: March 1, 2007
    Date of Patent: December 8, 2009
    Assignee: Micron Technology, Inc.
    Inventors: Janos Fucsko, Grady S. Waldo, Joseph Wiggins, Prashant Raghu
  • Publication number: 20090047790
    Abstract: Methods and etchant compositions for wet etching to selectively remove a hafnium aluminum oxide (HfAlOx) material relative to silicon oxide (SiOx) are provided.
    Type: Application
    Filed: August 16, 2007
    Publication date: February 19, 2009
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Prashant Raghu, Yi Yang
  • Patent number: 7491650
    Abstract: The invention includes an etchant composition containing isopropyl alcohol and one or more of HF, NH4F and tetramethyl ammonium fluoride (TMAF). The invention encompasses a method of processing a substrate. A substrate is provided which has a first material containing at least one of polysilicon, monocrystalline silicon and amorphous silicon, and a second material. The substrate is exposed to an etch composition which comprises isopropyl alcohol and at least one of HF, NH4F and TMAF. The invention includes a method of processing a semiconductor construction including providing a construction which has a capacitor electrode material and an oxide material along at least a portion of the capacitor electrode material. At least some of the oxide material is removed by isotropic etching utilizing an etchant composition comprising isopropyl alcohol.
    Type: Grant
    Filed: July 27, 2005
    Date of Patent: February 17, 2009
    Assignee: Micron Technology, Inc.
    Inventors: Janos Fucsko, Grady S. Waldo, Joseph Wiggins, Prashant Raghu
  • Publication number: 20080246124
    Abstract: A method is disclosed which includes forming an opening in an insulating material, performing a plasma process to introduce nitrogen into a portion of the insulating material to thereby form a nitrogen-containing region at least on an inner surface of the opening, and, after forming the nitrogen-containing region, performing an etching process through the opening. A device is disclosed which includes an insulating material comprising a nitrogen-enhanced region that is proximate an opening that extends through the insulating material and a conductive structure positioned within the opening.
    Type: Application
    Filed: April 4, 2007
    Publication date: October 9, 2008
    Inventors: James Mathew, Prashant Raghu, Jaydeb Goswami
  • Patent number: 7371333
    Abstract: The invention includes methods of etching nickel silicide and cobalt silicide, and methods of forming conductive lines. In one implementation, a substrate comprising nickel silicide is exposed to a fluid comprising H3PO4 and H2O at a temperature of at least 50° C. and at a pressure from 350 Torr to 1100 Torr effective to etch nickel silicide from the substrate. In one implementation, at least one of nickel silicide or cobalt silicide is exposed to a fluid comprising H2SO4, H2O2, H2O, and HF at a temperature of at least 50° C. and at a pressure from 350 Torr to 1100 Torr effective to etch the at least one of nickel silicide or cobalt silicide from the substrate.
    Type: Grant
    Filed: June 7, 2005
    Date of Patent: May 13, 2008
    Assignee: Micron Technology, Inc.
    Inventor: Prashant Raghu
  • Publication number: 20080090416
    Abstract: A method of etching polysilicon includes exposing a substrate comprising polysilicon to a solution comprising water, HF, and at least one of a conductive metal nitride, Pt, and Au under conditions effective to etch polysilicon from the substrate. In one embodiment, a substrate first region comprising polysilicon and a substrate second region comprising at least one of a conductive metal nitride, Pt, and Au is exposed to a solution comprising water and HF. The solution is devoid of any detectable conductive metal nitride, Pt, and Au prior to the exposing. At least some of the at least one are etched into the solution upon the exposing. Then, polysilicon is etched from the first region at a faster rate than any etch rate of the first region polysilicon prior to the etching of the at least some of the conductive metal nitride, Pt, and Au.
    Type: Application
    Filed: October 11, 2006
    Publication date: April 17, 2008
    Inventors: Prashant Raghu, Vishwanath Bhat, Niraj Rana
  • Publication number: 20070262048
    Abstract: Etch solutions for selectively etching doped oxide materials in the presence of silicon nitride, titanium nitride, and silicon materials, and methods utilizing the etch solutions, for example, in the construction of container capacitor constructions are provided. The etch solutions are formulated as a mixture of hydrofluoric acid and an organic acid having a dielectric constant less than water, optionally with an inorganic acid, and a pH of 1 or less.
    Type: Application
    Filed: July 30, 2007
    Publication date: November 15, 2007
    Inventors: Niraj Rana, Prashant Raghu, Kevin Torek
  • Publication number: 20070207622
    Abstract: Etch solutions for selectively etching doped oxide materials in the presence of silicon nitride, titanium nitride, and silicon materials, and methods utilizing the etch solutions, for example, in the construction of container capacitor constructions are provided. The etch solutions are formulated as a mixture of hydrofluoric acid and an organic acid having a dielectric constant less than water, optionally with an inorganic acid, and a pH of 1 or less.
    Type: Application
    Filed: February 23, 2006
    Publication date: September 6, 2007
    Applicant: Micron Technology, Inc.
    Inventors: Niraj Rana, Prashant Raghu, Kevin Torek
  • Publication number: 20070166920
    Abstract: A transistor gate forming method includes forming a metal layer within a line opening and forming a fill layer within the opening over the metal layer. The fill layer is substantially selectively etchable with respect to the metal layer. A transistor structure includes a line opening, a dielectric layer within the opening, a metal layer over the dielectric layer within the opening, and a fill layer over the metal layer within the opening. The metal layer/fill layer combination exhibits less intrinsic less than would otherwise exist if the fill layer were replaced by an increased thickness of the metal layer. The inventions apply at least to 3-D transistor structures.
    Type: Application
    Filed: March 8, 2007
    Publication date: July 19, 2007
    Inventors: Sanh Tang, Gordon Haller, Prashant Raghu, Ravi Iyer
  • Publication number: 20070145009
    Abstract: The invention includes an etchant composition containing isopropyl alcohol and one or more of HF, NH4F and tetramethyl ammonium fluoride (TMAF). The invention encompasses a method of processing a substrate. A substrate is provided which has a first material containing at least one of polysilicon, monocrystalline silicon and amorphous silicon, and a second material. The substrate is exposed to an etch composition which comprises isopropyl alcohol and at least one of HF, NH4F and TMAF. The invention includes a method of processing a semiconductor construction including providing a construction which has a capacitor electrode material and an oxide material along at least a portion of the capacitor electrode material. At least some of the oxide material is removed by isotropic etching utilizing an etchant composition comprising isopropyl alcohol.
    Type: Application
    Filed: March 1, 2007
    Publication date: June 28, 2007
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Janos Fucsko, Grady Waldo, Joseph Wiggins, Prashant Raghu
  • Publication number: 20070048976
    Abstract: The invention includes methods in which silicon is removed from titanium-containing container structures with an etching composition having a phosphorus-and-oxygen-containing compound therein. The etching composition can, for example, include one or both of ammonium hydroxide and tetra-methyl ammonium hydroxide. The invention also includes methods in which titanium-containing whiskers are removed from between titanium-containing capacitor electrodes. Such removal can be, for example, accomplished with an etch utilizing one or more of hydrofluoric acid, ammonium fluoride, nitric acid and hydrogen peroxide.
    Type: Application
    Filed: August 31, 2005
    Publication date: March 1, 2007
    Inventor: Prashant Raghu
  • Publication number: 20070048941
    Abstract: A transistor gate forming method includes forming a metal layer within a line opening and forming a fill layer within the opening over the metal layer. The fill layer is substantially selectively etchable with respect to the metal layer. A transistor structure includes a line opening, a dielectric layer within the opening, a metal layer over the dielectric layer within the opening, and a fill layer over the metal layer within the opening. The metal layer/fill layer combination exhibits less intrinsic less than would otherwise exist if the fill layer were replaced by an increased thickness of the metal layer. The inventions apply at least to 3-D transistor structures.
    Type: Application
    Filed: September 1, 2005
    Publication date: March 1, 2007
    Inventors: Sanh Tang, Gordon Haller, Prashant Raghu, Ravi Iyer
  • Publication number: 20070023396
    Abstract: The invention includes an etchant composition containing isopropyl alcohol and one or more of HF, NH4F and tetramethyl ammonium fluoride (TMAF). The invention encompasses a method of processing a substrate. A substrate is provided which has a first material containing at least one of polysilicon, monocrystalline silicon and amorphous silicon, and a second material. The substrate is exposed to an etch composition which comprises isopropyl alcohol and at least one of HF, NH4F and TMAF. The invention includes a method of processing a semiconductor construction including providing a construction which has a capacitor electrode material and an oxide material along at least a portion of the capacitor electrode material. At least some of the oxide material is removed by isotropic etching utilizing an etchant composition comprising isopropyl alcohol.
    Type: Application
    Filed: July 27, 2005
    Publication date: February 1, 2007
    Inventors: Janos Fucsko, Grady Waldo, Joseph Wiggins, Prashant Raghu
  • Publication number: 20060276048
    Abstract: The invention includes methods of etching nickel silicide and cobalt silicide, and methods of forming conductive lines. In one implementation, a substrate comprising nickel silicide is exposed to a fluid comprising H3PO4 and H2O at a temperature of at least 50° C. and at a pressure from 350 Torr to 1100 Torr effective to etch nickel silicide from the substrate. In one implementation, at least one of nickel silicide or cobalt silicide is exposed to a fluid comprising H2SO4, H2O2, H2O, and HF at a temperature of at least 50° C. and at a pressure from 350 Torr to 1100 Torr effective to etch the at least one of nickel silicide or cobalt silicide from the substrate.
    Type: Application
    Filed: June 7, 2005
    Publication date: December 7, 2006
    Inventor: Prashant Raghu