Patents by Inventor Prem Nath

Prem Nath has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180175234
    Abstract: A process of forming an array of monolithically integrated thin film photovoltaic cells from a stack of thin film layers formed on an insulating substrate includes forming at least one cell isolation scribe in the stack of thin film layers. A second electrical contact layer isolation scribe is formed for each cell isolation scribe adjacent to a respective cell isolation scribe. A via scribe is formed in the stack of thin film layers between each cell isolation scribe and its respective second electrical contact layer isolation scribe. Insulating ink is disposed in each cell isolation scribe, and conductive ink is disposed in each via scribe to form a via. Conductive ink is also disposed along the top surface of the stack of thin film layers to form at least one conductive grid.
    Type: Application
    Filed: February 15, 2018
    Publication date: June 21, 2018
    Inventors: Mohan S. Misra, Prem Nath, Venugopala R. Basava
  • Patent number: 9929306
    Abstract: A process of forming an array of monolithic ally integrated thin film photo voltaic cells from a stack of thin film layers formed on an insulating substrate includes forming at least one cell isolation scribe in the stack of thin film layers. A second electrical contact layer isolation scribe is formed for each cell isolation scribe adjacent to a respective cell isolation scribe. A via scribe is formed in the stack of thin film layers between each cell isolation scribe and its respective second electrical contact layer isolation scribe. Insulating ink is disposed in each cell isolation scribe, and conductive ink is disposed in each via scribe to form a via. Conductive ink is also disposed along the top surface of the stack of thin film layers to form at least one conductive grid.
    Type: Grant
    Filed: April 14, 2014
    Date of Patent: March 27, 2018
    Assignee: Ascent Solar Technologies, Inc.
    Inventors: Mohan S. Misra, Prem Nath, Venugopala R. Basava
  • Patent number: 9640706
    Abstract: A multi-junction photovoltaic cell includes a substrate and a back contact layer formed on the substrate. A low bandgap Group IB-IIIB-VIB2 material solar absorber layer is formed on the back contact layer. A heterojunction partner layer is formed on the low bandgap solar absorber layer, to help form the bottom cell junction, and the heterojunction partner layer includes at least one layer of a high resistivity material having a resistivity of at least 100 ohms-centimeter. The high resistivity material has the formula (Zn and/or Mg)(S, Se, O, and/or OH). A conductive interconnect layer is formed above the heterojunction partner layer, and at least one additional single-junction photovoltaic cell is formed on the conductive interconnect layer, as a top cell. The top cell may have an amorphous Silicon or p-type Cadmium Selenide solar absorber layer. Cadmium Selenide may be converted from n-type to p-type with a chloride doping process.
    Type: Grant
    Filed: April 25, 2016
    Date of Patent: May 2, 2017
    Assignee: ASCENT SOLAR TECHNOLOGIES, INC
    Inventors: Lawrence M. Woods, Rosine M. Ribelin, Prem Nath
  • Publication number: 20170062648
    Abstract: A multi-junction photovoltaic cell includes a substrate and a back contact layer formed on the substrate. A low bandgap Group IB-IIIB-VIB2 material solar absorber layer is formed on the back contact layer. A heterojunction partner layer is formed on the low bandgap solar absorber layer, to help form the bottom cell junction, and the heterojunction partner layer includes at least one layer of a high resistivity material having a resistivity of at least 100 ohms-centimeter. The high resistivity material has the formula (Zn and/or Mg)(S, Se, O, and/or OH). A conductive interconnect layer is formed above the heterojunction partner layer, and at least one additional single-junction photovoltaic cell is formed on the conductive interconnect layer, as a top cell. The top cell may have an amorphous Silicon or p-type Cadmium Selenide solar absorber layer. Cadmium Selenide may be converted from n-type to p-type with a chloride doping process.
    Type: Application
    Filed: April 25, 2016
    Publication date: March 2, 2017
    Inventors: Lawrence M. Woods, Rosine M. Ribelin, Prem Nath
  • Patent number: 9349905
    Abstract: A multi-junction photovoltaic cell includes a substrate and a back contact layer formed on the substrate. A low bandgap Group IB-IIIB-VIB2 material solar absorber layer is formed on the back contact layer. A heterojunction partner layer is formed on the low bandgap solar absorber layer, to help form the bottom cell junction, and the heterojunction partner layer includes at least one layer of a high resistivity material having a resistivity of at least 100 ohms-centimeter. The high resistivity material has the formula (Zn and/or Mg)(S, Se, O, and/or OH). A conductive interconnect layer is formed above the heterojunction partner layer, and at least one additional single-junction photovoltaic cell is formed on the conductive interconnect layer, as a top cell. The top cell may have an amorphous Silicon or p-type Cadmium Selenide solar absorber layer. Cadmium Selenide may be converted from n-type to p-type with a chloride doping process.
    Type: Grant
    Filed: December 9, 2013
    Date of Patent: May 24, 2016
    Assignee: ASCENT SOLAR TECHNOLOGIES, INC.
    Inventors: Lawrence M. Woods, Rosine M. Ribelin, Prem Nath
  • Publication number: 20140227823
    Abstract: A process of forming an array of monolithic ally integrated thin film photo voltaic cells from a stack of thin film layers formed on an insulating substrate includes forming at least one cell isolation scribe in the stack of thin film layers. A second electrical contact layer isolation scribe is formed for each cell isolation scribe adjacent to a respective cell isolation scribe. A via scribe is formed in the stack of thin film layers between each cell isolation scribe and its respective second electrical contact layer isolation scribe. Insulating ink is disposed in each cell isolation scribe, and conductive ink is disposed in each via scribe to form a via. Conductive ink is also disposed along the top surface of the stack of thin film layers to form at least one conductive grid.
    Type: Application
    Filed: April 14, 2014
    Publication date: August 14, 2014
    Applicant: Ascent Solar Technologies, Inc.
    Inventors: Mohan S. Misra, Prem Nath, Venugopala R. Basava
  • Patent number: 8716591
    Abstract: A process of forming an array of monolithically integrated thin film photovoltaic cells from a stack of thin film layers formed on an insulating substrate includes forming at least one cell isolation scribe in the stack of thin film layers. A second electrical contact layer isolation scribe is formed for each cell isolation scribe adjacent to a respective cell isolation scribe. A via scribe is formed in the stack of thin film layers between each cell isolation scribe and its respective second electrical contact layer isolation scribe. Insulating ink is disposed in each cell isolation scribe, and conductive ink is disposed in each via scribe to form a via. Conductive ink is also disposed along the top surface of the stack of thin film layers to form at least one conductive grid.
    Type: Grant
    Filed: June 20, 2008
    Date of Patent: May 6, 2014
    Assignee: Ascent Solar Technologies, Inc.
    Inventors: Mohan S. Misra, Prem Nath, Venugopala R. Basava
  • Publication number: 20140099748
    Abstract: A multi-junction photovoltaic cell includes a substrate and a back contact layer formed on the substrate. A low bandgap Group IB-IIIB-VIB2 material solar absorber layer is formed on the back contact layer. A heterojunction partner layer is formed on the low bandgap solar absorber layer, to help form the bottom cell junction, and the heterojunction partner layer includes at least one layer of a high resistivity material having a resistivity of at least 100 ohms-centimeter. The high resistivity material has the formula (Zn and/or Mg)(S, Se, O, and/or OH). A conductive interconnect layer is formed above the heterojunction partner layer, and at least one additional single-junction photovoltaic cell is formed on the conductive interconnect layer, as a top cell. The top cell may have an amorphous Silicon or p-type Cadmium Selenide solar absorber layer. Cadmium Selenide may be converted from n-type to p-type with a chloride doping process.
    Type: Application
    Filed: December 9, 2013
    Publication date: April 10, 2014
    Applicant: Ascent Solar Technologies, Inc.
    Inventors: Lawrence M. Woods, Rosine M. Ribelin, Prem Nath
  • Patent number: 8465589
    Abstract: A method of manufacture of CIGS photovoltaic cells and modules involves sequential deposition of copper indium gallium diselenide compounds in multiple thin sublayers to form a composite CIGS absorber layer of a desirable thickness greater than the thickness of each sublayer. In an embodiment, the method is adapted to roll-to-roll processing of CIGS PV cells. In an embodiment, the method is adapted to preparation of a CIGS absorber layer having graded composition through the layer. In a particular embodiment, the graded composition is enriched in copper at a base of the layer. In an embodiment, each CIGS sublayer is deposited by co-evaporation of copper, indium, gallium, and selenium which react in-situ to form CIGS.
    Type: Grant
    Filed: February 5, 2010
    Date of Patent: June 18, 2013
    Assignee: Ascent Solar Technologies, Inc.
    Inventors: Prem Nath, Venugopala R. Basava, Ajay Kumar Kalla, Peter Alex Shevchuk, Mohan S. Misra
  • Patent number: 8021905
    Abstract: A method of manufacture of CIGS photovoltaic cells and modules involves sequential deposition of copper indium gallium diselenide compounds in multiple thin sublayers to form a composite CIGS absorber layer of a desirable thickness greater than the thickness of each sublayer. In an embodiment, the method is adapted to roll-to-roll processing of CIGS PV cells. In an embodiment, the method is adapted to preparation of a CIGS absorber layer having graded composition through the layer. In a particular embodiment, the graded composition is enriched in copper at a base of the layer. In an embodiment, each CIGS sublayer is deposited by co-evaporation of copper, indium, gallium, and selenium which react in-situ to form CIGS.
    Type: Grant
    Filed: April 30, 2010
    Date of Patent: September 20, 2011
    Assignee: Ascent Solar Technologies, Inc.
    Inventors: Prem Nath, Venugopala R. Basava, Ajay Kumar Kalla, Peter Alex Shevchuk, Mohan S. Misra
  • Publication number: 20090020149
    Abstract: A multi-junction photovoltaic cell includes a substrate and a back contact layer formed on the substrate. A low bandgap Group IB-IIIB-VIB2 material solar absorber layer is formed on the back contact layer. A heterojunction partner layer is formed on the low bandgap solar absorber layer, to help form the bottom cell junction, and the heterojunction partner layer includes at least one layer of a high resistivity material having a resistivity of at least 100 ohms-centimeter. The high resistivity material has the formula (Zn and/or Mg)(S, Se, O, and/or OH). A conductive interconnect layer is formed above the heterojunction partner layer, and at least one additional single-junction photovoltaic cell is formed on the conductive interconnect layer, as a top cell. The top cell may have an amorphous Silicon or p-type Cadmium Selenide solar absorber layer. Cadmium Selenide may be converted from n-type to p-type with a chloride doping process.
    Type: Application
    Filed: July 16, 2008
    Publication date: January 22, 2009
    Inventors: Lawrence M. Woods, Rosine M. Ribelin, Prem Nath
  • Publication number: 20050166955
    Abstract: A support system for retaining a photovoltaic device on a generally planar surface, without any mechanical connection to the surface, includes a frame assembly which rests upon the surface and supports one or more photovoltaic devices in a spaced apart relationship with the surface. At least one ballast pan is attached to the frame assembly. The ballast pan is configured to retain a ballast material therein. The ballast pan may comprise a peripheral ballast pan which extends along the perimeter of the assembly or it may comprise an internal ballast pan which is disposed beneath the photovoltaic device. Also disclosed herein is a method for using the support system.
    Type: Application
    Filed: December 8, 2004
    Publication date: August 4, 2005
    Inventors: Prem Nath, Subhendu Guha
  • Patent number: 6729081
    Abstract: A photovoltaic building material comprises a substrate having one or more photovoltaic generating devices encapsulated thereupon. The substrate includes a body of contact adhesive material, preferably protected by a release layer. The material is readily installed onto a roof, wall or other portion of a building structure by use of the adhesive. The material can also be used for the custom fabrication of power generating modules, and such modules and methods for their manufacture are disclosed herein.
    Type: Grant
    Filed: June 7, 2001
    Date of Patent: May 4, 2004
    Assignee: United Solar Systems Corporation
    Inventors: Prem Nath, Avtar Singh, Kermit Jones, Steve Heckeroth
  • Patent number: 6553729
    Abstract: A photovoltaic building material comprises a substrate having one or more photovoltaic generating devices encapsulated thereupon. The substrate includes a body of contact adhesive material, preferably protected by a release layer. The material is readily installed onto a roof, wall or other portion of a building structure by use of the adhesive.
    Type: Grant
    Filed: April 26, 2001
    Date of Patent: April 29, 2003
    Assignee: United Solar Systems Corporation
    Inventors: Prem Nath, Avtar Singh, Kermit Jones
  • Publication number: 20010054262
    Abstract: A photovoltaic building material comprises a substrate having one or more photovoltaic generating devices encapsulated thereupon. The substrate includes a body of contact adhesive material, preferably protected by a release layer. The material is readily installed onto a roof, wall or other portion of a building structure by use of the adhesive. The material can also be used for the custom fabrication of power generating modules, and such modules and methods for their manufacture are disclosed herein.
    Type: Application
    Filed: June 7, 2001
    Publication date: December 27, 2001
    Inventors: Prem Nath, Avtar Singh, Kermit Jones, Steve Heckeroth
  • Patent number: 5968287
    Abstract: A photovoltaic building structure comprises a number of interlockable building panels having photovoltaic generator devices supported thereupon. The photovoltaic devices may be attached to the panels by a vacuum lamination process in which a flexible, air impermeable membrane covers a stack of layers being laminated to the panel. Evacuation of air from between the membrane and panel causes the lamination stack to be compressed against the panel, and a pressure and/or heat activatable adhesive is employed to adhere the various layers to the panel. Installation of the panels is in accord with standard building techniques, and the presence of the photovoltaic generators does not change the mechanical characteristics of the panels.
    Type: Grant
    Filed: May 16, 1997
    Date of Patent: October 19, 1999
    Assignee: United Solar Systems Corporation
    Inventor: Prem Nath
  • Patent number: 5637537
    Abstract: A method of severing a thin film semiconductor device. The semiconductor device includes a substrate having a first electrode region formed thereon, a semiconductor body formed of layers of thin film semiconductor alloy material disposed upon the base electrode, a transparent, electrically conductive second electrode deposited atop the semiconductor body, and a containment layer of polymeric material associated with the first or second electrode in at least one region to permit subsequent severing of the device into a plurality of devices through said containment layer region.
    Type: Grant
    Filed: May 11, 1992
    Date of Patent: June 10, 1997
    Assignee: United Solar Systems Corporation
    Inventors: Prem Nath, Craig N. Vogeli
  • Patent number: 5474620
    Abstract: A composite laminate specifically adapted to protect the light incident surface of a photovoltaic module from cuts which could create a short circuit includes a plurality of stacked layer pairs. The first layer of each pair is a glass fiber material and the second layer is a thermoplastic. The layers are disposed in a mutually interpenetrating relationship and topped with a thin transparent protective layer, such as a layer of a fluoropolymer. this combination of layer pairs has been demonstrated to provide sufficient protection to meet Underwriters Laboratories specifications (UL 1703 Section 23. Cut Test) for flat plate photovoltaic modules and panels.
    Type: Grant
    Filed: May 16, 1994
    Date of Patent: December 12, 1995
    Assignee: United Solar Systems Corporation
    Inventors: Prem Nath, Craig N. Vogeli
  • Patent number: 5457057
    Abstract: Photovoltaic devices comprised of one or more encapsulated slabs of photovoltaic material are prepared by a process wherein a large area body of photovoltaic material is divided into a plurality of slabs. A photoactive area is defined within each slab, and defects therein passivated. Current collecting structures are affixed to each slab, and if the device includes a plurality of slabs, they are electrically interconnected. The front surfaces of the slabs are laminated with a transparent protective material, and the rear surfaces are bonded to a support plate. Also disclosed herein is a particular configuration of bus bar tape for interconnecting the slabs and an apparatus for preparing the current collecting wires.
    Type: Grant
    Filed: June 28, 1994
    Date of Patent: October 10, 1995
    Assignee: United Solar Systems Corporation
    Inventors: Prem Nath, Craig N. Vogeli, Timothy Barnard
  • Patent number: 5280133
    Abstract: A solar panel assembly (10) includes a power generating sheet (22) having two output terminals (30,32), and an electric cable (20) soldered at one end to terminals (30) and (32). A frame member is anchored to the solar panel in overlying relation to the terminals and an epoxy material (62) fills a cavity (58) defined by the frame member (40). A case (42) covers the frame member (40). The case includes an upper member (44) and a lower member (46) which are snap fitted together through apertures in the solar panel. The case (42) includes a tension relieving device which prevents tension on the cable (20) from being transferred to the cable end connected to the terminals (30) and (32). The epoxy provides a water resistant seal which allows the solar panel to be used in hostile environments.
    Type: Grant
    Filed: December 13, 1991
    Date of Patent: January 18, 1994
    Assignee: United Solar Systems Corporation
    Inventor: Prem Nath