Abstract: In some aspects, methods of forming a metal sulfide thin film are provided. According to some methods, a metal sulfide thin film is deposited on a substrate in a reaction space in a cyclical process where at least one cycle includes alternately and sequentially contacting the substrate with a first vapor-phase metal reactant and a second vapor-phase sulfur reactant. In some aspects, methods of forming a three-dimensional architecture on a substrate surface are provided. In some embodiments, the method includes forming a metal sulfide thin film on the substrate surface and forming a capping layer over the metal sulfide thin film. The substrate surface may comprise a high-mobility channel.

Abstract: In some embodiments, a method for manufacturing forms a semiconductor device, such as a transistor. A dielectric stack is formed on a semiconductor substrate. The stack comprises a plurality of dielectric layers separated by one of a plurality of spacer layers. Each of the plurality of spacer layers is formed of a different material than immediately neighboring layers of the plurality of dielectric layers. A vertically-extending hole is formed through the plurality of dielectric layers and the plurality of spacer layers. The hole is filled by performing an epitaxial deposition, with the material filling the hole forming a wire. The wire is doped and three of the dielectric layers are sequentially removed and replaced with conductive material, thereby forming upper and lower contacts to the wire and a gate between the upper and lower contacts. The wire may function as a channel region for a transistor.

Abstract: Semiconductor structures, devices, and methods of forming the structures and device are disclosed. Exemplary structures include multi-gate or FinFET structures that can include both re-channel MOS (NMOS) and p-channel MOS (PMOS) devices to form CMOS structures and devices on a substrate. The devices can be formed using selective epitaxy and shallow trench isolation techniques.

Abstract: A method for forming a resistive random access memory (RRAM) device is disclosed. The method comprises forming a first electrode, forming a resistive switching oxide layer comprising a metal oxide by thermal atomic layer deposition (ALD) and forming a second electrode by thermal atomic layer deposition (ALD), where the resistive switching layer is interposed between the first electrode and the second electrode. Forming the resistive switching oxide may be performed without exposing a surface of the switching oxide layer to a surface-modifying plasma treatment after depositing the metal oxide.

Abstract: The disclosed technology generally relates to the field of semiconductor processing and more particularly to resistive random access memory and methods for manufacturing such memory. In one aspect, a method of fabricating a memory cell includes providing a substrate and providing a first electrode on the substrate. The method additionally includes depositing, via atomic layer deposition, a resistive switching material on the first electrode, wherein the resistive switching material comprises an oxide comprising a pnictogen chosen from the group consisting of As, Bi, Sb, and P. The resistive switching material may be doped, e.g., with Sb or an antimony-metal alloy. A second electrode may be formed over and in contact with the resistive switching material.

Abstract: The disclosed technology generally relates to semiconductor devices, and relates more particularly to resistive random access memory devices and methods of making the same. In one aspect, a method of forming a resistive random access memory cell of a random access memory device includes forming a first electrode and forming a resistive switching material comprising an oxide of a pnictogen element by atomic layer deposition. The method additionally includes forming a metallic layer comprising the pnictogen element by atomic layer deposition (ALD). The resistive switching material is interposed between the first electrode and the metallic layer.

Abstract: A process for depositing aluminum nitride is disclosed. The process comprises providing a plurality of semiconductor substrates in a batch process chamber and depositing an aluminum nitride layer on the substrates by performing a plurality of deposition cycles without exposing the substrates to plasma during the deposition cycles. Each deposition cycle comprises flowing an aluminum precursor pulse into the batch process chamber, removing the aluminum precursor from the batch process chamber, and removing the nitrogen precursor from the batch process chamber after flowing the nitrogen precursor and before flowing another pulse of the aluminum precursor. The process chamber may be a hot wall process chamber and the deposition may occur at a deposition pressure of less than 1 Torr.

Abstract: A method for forming a resistive random access memory (RRAM) device is disclosed. The method comprises forming a first electrode, forming a resistive switching oxide layer comprising a metal oxide by thermal atomic layer deposition (ALD), doping the resistive switching oxide layer with a metal dopant different from metal forming the metal oxide, and forming a second electrode by thermal atomic layer deposition (ALD), where the resistive switching layer is interposed between the first electrode and the second electrode. In some embodiments, forming the resistive switching oxide may be performed without exposing a surface of the switching oxide layer to a surface-modifying plasma treatment after depositing the metal oxide.

Abstract: A method for forming a resistive random access memory (RRAM) device is disclosed. The method comprises forming a first electrode, forming a resistive switching oxide layer comprising a metal oxide by thermal atomic layer deposition (ALD) and forming a second electrode by thermal atomic layer deposition (ALD), where the resistive switching layer is interposed between the first electrode and the second electrode. Forming the resistive switching oxide may be performed without exposing a surface of the switching oxide layer to a surface-modifying plasma treatment after depositing the metal oxide.

Abstract: Improved methods and systems for passivating a surface of a high-mobility semiconductor and structures and devices formed using the methods are disclosed. The method includes providing a high-mobility semiconductor surface to a chamber of a reactor and exposing the high-mobility semiconductor surface to a gas-phase sulfur precursor to passivate the high-mobility semiconductor surface.

Abstract: In some embodiments, a method for manufacturing forms a semiconductor device, such as a transistor. A dielectric stack is formed on a semiconductor substrate. The stack comprises a plurality of dielectric layers separated by one of a plurality of spacer layers. Each of the plurality of spacer layers is formed of a different material than immediately neighboring layers of the plurality of dielectric layers. A vertically-extending hole is formed through the plurality of dielectric layers and the plurality of spacer layers. The hole is filled by performing an epitaxial deposition, with the material filling the hole forming a wire. The wire is doped and three of the dielectric layers are sequentially removed and replaced with conductive material, thereby forming upper and lower contacts to the wire and a gate between the upper and lower contacts. The wire may function as a channel region for a transistor.

Abstract: A structured-light measuring method, includes: matching process, in which the number and the low-precision depth of a laser point are achieved by using the imaging position of the laser point on a first camera (21) according to a first corresponding relationship in a calibration database, and the imaging position of the laser point on a second camera (22) is searched according to the number and the low-precision depth of the laser point so as to acquire the candidate matching points, then the matching process is completed according to the imaging position of the first camera (21) and the candidate matching points of the imaging position of the first camera (21) on the second camera (22) so that a matching result is achieved; and computing process, in which the imaging position of the second camera (22) matching with the imaging position of the first camera (21) is achieved according to the matching result, and then the precision position of the laser point is determined by a second corresponding relationship

Abstract: According to some embodiments, an electrode have a high effective work function is formed. The electrode may be the gate electrode of a transistor and may be formed on a high-k gate dielectric by depositing a first layer of conductive material, exposing that first layer to a hydrogen-containing gas, and depositing a second layer of conductive material over the first layer. The first layer may be deposited using a non-plasma process in which the substrate is not exposed to plasma or plasma-generated radicals. The hydrogen-containing gas to which the first layer is exposed may include an excited hydrogen species, which may be part of a hydrogen-containing plasma, and may be hydrogen-containing radicals. The first layer may also be exposed to oxygen before depositing the second layer. The work function of the gate electrode in the gate stack may be about 5 eV or higher in some embodiments.

Abstract: The present invention is directed to a novel auxin-inducible gene, ARGOS, that is involved in organ development, including size control, in plants. Methods of influencing this development are also described, as are transformed cells and transgenic plants comprising the described sequences.

Abstract: The present invention is directed to a novel auxin-inducible gene, ARGOS, that is involved in organ development, including size control, in plants. Methods of influencing this development are also described, as are transformed cells and transgenic plants comprising the described sequences.

Abstract: A novel gene, nacl, has been isolated from Arabidopsis. This gene encodes a protein (NACl) which has been identified as a member of the NAC family. NACl shares a high amino acid sequence homology with other members of the NAC gene products in the N-terminus. Data show that NACl belongs to a newly identified family of transcription factors. NACl is involved in the regulation of cotyledon and lateral root development. Overexpression of the gene can lead to larger plants with larger roots and more lateral roots than in wild-type plants.

Abstract: The present invention is directed to methods of growing a transgenic plant comprising transforming a plant with a nucleic acid encoding the SINAT5 polypeptide of Arabidopsis thaliana. SINAT5 is an E3 ubiquitin ligase which regulates NAC1 gene expression and plant growth. Mutations in the SINAT5 polypeptide are also provided.

Abstract: Method for controlling the growth of a plant cell or a plant virus within the cell wherein the level and/or activity retinoblastoma protein in that plant cell is increased or decreased by incorporating a recombinant nucleic acid.

Abstract: The present invention is based on the isolation and characterization of a plant cell DNA sequence encoding for a retinoblastoma protein. Such finding is based on the structural and functional properties of the plant retinoblastoma protein as possible regulator of the cellular cycle, of the cellular growth and of the plant cellular differentiation. For this reason, among other aspects, it is claimed the use of retinoblastoma protein or the DNA sequence which encodes for it in the growing control of vegetable cells, plants and/or vegetable virus, as well as the use of vectors, cells, plants or animals, or animal cells modified through the manipulation of the control route based on plant retinoblastoma protein.