Patents by Inventor Qi Xie

Qi Xie has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160372543
    Abstract: In some aspects, methods of forming a metal selenide or metal telluride thin film are provided. According to some methods, a metal selenide or metal telluride thin film is deposited on a substrate in a reaction space in a cyclical deposition process where at least one cycle includes alternately and sequentially contacting the substrate with a first vapor-phase metal reactant and a second vapor-phase selenium or tellurium reactant. In some aspects, methods of forming three-dimensional architectures on a substrate surface are provided. In some embodiments, the method includes forming a metal selenide or metal telluride interface layer between a substrate and a dielectric. In some embodiments, the method includes forming a metal selenide or metal telluride dielectric layer between a substrate and a conductive layer.
    Type: Application
    Filed: June 16, 2015
    Publication date: December 22, 2016
    Inventors: Qi Xie, Fu Tang, Michael Eugene Givens, Jan Willem Maes
  • Publication number: 20160372365
    Abstract: In some aspects, methods of forming a metal chalcogenide thin film are provided. According to some methods, a metal chalcogenide thin film is deposited on a substrate in a reaction space in a cyclical deposition process where at least one cycle includes alternately and sequentially contacting the substrate with a first vapor-phase metal reactant and a second vapor-phase chalcogen reactant. In some aspects, methods of forming three-dimensional structure on a substrate surface are provided. In some embodiments, the method includes forming a metal chalcogenide dielectric layer between a substrate and a conductive layer. In some embodiments the method includes forming an MIS-type contact structure including a metal chalcogenide dielectric layer.
    Type: Application
    Filed: June 16, 2015
    Publication date: December 22, 2016
    Inventors: Fu Tang, Michael Eugene Givens, Jacob Huffman Woodruff, Qi Xie, Jan Willem Maes
  • Patent number: 9520562
    Abstract: The disclosed technology generally relates to semiconductor devices, and relates more particularly to resistive random access memory devices and methods of making the same. In one aspect, a method of forming a resistive random access memory cell of a random access memory device includes forming a first electrode and forming a resistive switching material comprising an oxide of a pnictogen element by atomic layer deposition. The method additionally includes forming a metallic layer comprising the pnictogen element by atomic layer deposition (ALD). The resistive switching material is interposed between the first electrode and the metallic layer.
    Type: Grant
    Filed: July 17, 2014
    Date of Patent: December 13, 2016
    Assignee: ASM IP Holding B.V.
    Inventors: Qi Xie, Jan Willem Maes, Tom Blomberg, Marko Tuominen, Suvi Haukka, Robin Roelofs, Jacob Woodruff
  • Publication number: 20160358772
    Abstract: In some embodiments, a semiconductor surface having a high mobility semiconductor may be effectively passivated by nitridation, preferably using hydrazine, a hydrazine derivative, or a combination thereof. The surface may be the semiconductor surface of a transistor channel region. In some embodiments, a semiconductor surface oxide layer is formed at the semiconductor surface and the passivation is accomplished by forming a semiconductor oxynitride layer at the surface, with the nitridation contributing nitrogen to the surface oxide to form the oxynitride layer. The semiconductor oxide layer may be deposited by atomic layer deposition (ALD) and the nitridation may also be conducted as part of the ALD.
    Type: Application
    Filed: June 3, 2015
    Publication date: December 8, 2016
    Inventors: Qi Xie, Fu Tang, Michael Givens, Petri Raisanen, Jan Willem Maes
  • Publication number: 20160358835
    Abstract: In some embodiments, a semiconductor surface may be effectively passivated by nitridation, preferably using hydrazine, a hydrazine derivative, or a combination thereof. The surface may be the semiconductor surface of a transistor channel region. In some embodiments, native oxide is removed from the semiconductor surface and the surface is subsequently nitrided. In some other embodiments, a semiconductor surface oxide layer is formed at the semiconductor surface and the passivation is accomplished by forming a semiconductor oxynitride layer at the surface, with the nitridation contributing nitrogen to the surface oxide to form the oxynitride layer. The semiconductor oxide layer may be deposited by atomic layer deposition (ALD) and the nitridation may also be conducted as part of the ALD.
    Type: Application
    Filed: May 31, 2016
    Publication date: December 8, 2016
    Inventors: Qi Xie, Fu Tang, Michael Givens, Petri Raisanen, Jan Willem Maes, Xiaoqiang Jiang
  • Patent number: 9478419
    Abstract: In some aspects, methods of forming a metal sulfide thin film are provided. According to some methods, a metal sulfide thin film is deposited on a substrate in a reaction space in a cyclical process where at least one cycle includes alternately and sequentially contacting the substrate with a first vapor-phase metal reactant and a second vapor-phase sulfur reactant. In some aspects, methods of forming a three-dimensional architecture on a substrate surface are provided. In some embodiments, the method includes forming a metal sulfide thin film on the substrate surface and forming a capping layer over the metal sulfide thin film. The substrate surface may comprise a high-mobility channel.
    Type: Grant
    Filed: December 18, 2013
    Date of Patent: October 25, 2016
    Assignee: ASM IP Holding B.V.
    Inventors: Suvi P. Haukka, Fu Tang, Michael Givens, Jan Willem Maes, Qi Xie
  • Patent number: 9472757
    Abstract: The disclosed technology generally relates to the field of semiconductor processing and more particularly to resistive random access memory and methods for manufacturing such memory. In one aspect, a method of fabricating a memory cell includes providing a substrate and providing a first electrode on the substrate. The method additionally includes depositing, via atomic layer deposition, a resistive switching material on the first electrode, wherein the resistive switching material comprises an oxide comprising a pnictogen chosen from the group consisting of As, Bi, Sb, and P. The resistive switching material may be doped, e.g., with Sb or an antimony-metal alloy. A second electrode may be formed over and in contact with the resistive switching material.
    Type: Grant
    Filed: July 17, 2014
    Date of Patent: October 18, 2016
    Assignee: ASM IP Holding B.V.
    Inventors: Qi Xie, Jan Willem Maes, Tom Blomberg, Marko Tuominen, Suvi Haukka, Robin Roelofs, Jacob Woodruff
  • Patent number: 9461134
    Abstract: In some embodiments, an MIS-type contact structure is formed by passivating the semiconductor surface of a source/drain region with a chalcogen, and subsequently depositing an tunnel layer by first exposing the chalcogen-passivated surface to a metal-organic precursor. Subsequently, deposition of the tunnel layer continues to a desired thickness. Preferably, the metal-organic precursor is part of a first set of ALD precursors and a second set of ALD precursors, which include one or more metal or semimetal precursors, are subsequently used to continue the deposition. For example, the metal-organic precursor may be used to deposit a first portion of the tunnel layer, and an inorganic metal or inorganic semimetal precursor or a different organic metal or organic semimetal precursor may be used to deposit a second portion of the tunnel layer. A metal is subsequently deposited on the tunnel layer, e.g., to form a metal electrode or electrical contact.
    Type: Grant
    Filed: May 20, 2015
    Date of Patent: October 4, 2016
    Assignee: ASM IP HOLDING B.V.
    Inventors: Qi Xie, Fu Tang, Petri Raisanen, Jacob Woodruff, Jan Willem Maes, Michael Givens
  • Publication number: 20160240373
    Abstract: In some embodiments, an oxide layer is grown on a semiconductor substrate by oxidizing the semiconductor substrate by exposure to hydrogen peroxide at a process temperature of about 500° C. or less. The exposure to the hydrogen peroxide may continue until the oxide layer grows by a thickness of about 1 ? or more. Where the substrate is a germanium substrate, while oxidation using H2O has been found to form germanium oxide with densities of about 4.25 g/cm3, oxidation according to some embodiments can form an oxide layer with a density of about 6 g/cm3 or more (for example, about 6.27 g/cm3). In some embodiments, another layer of material is deposited directly on the oxide layer. For example, a dielectric layer may be deposited directly on the oxide layer.
    Type: Application
    Filed: February 12, 2015
    Publication date: August 18, 2016
    Inventors: Fu Tang, Michael Givens, Qi Xie, Jan Willem Maes, Bert Jongbloed, Radko G. Bankras, Theodorus G.M. Oosterlaken, Dieter Pierreux, Werner Knaepen, Harald B. Profijt, Cornelius A. van der Jeugd
  • Publication number: 20160203974
    Abstract: In some aspects, methods of forming a metal sulfide thin film are provided. According to some methods, a metal sulfide thin film is deposited on a substrate in a reaction space in a cyclical process where at least one cycle includes alternately and sequentially contacting the substrate with a first vapor-phase metal reactant and a second vapor-phase sulfur reactant. In some aspects, methods of forming a three-dimensional architecture on a substrate surface are provided. In some embodiments, the method includes forming a metal sulfide thin film on the substrate surface and forming a capping layer over the metal sulfide thin film. The substrate surface may comprise a high-mobility channel.
    Type: Application
    Filed: January 11, 2016
    Publication date: July 14, 2016
    Inventors: Suvi P. Haukka, Fu Tang, Michael E. Givens, Jan Willem Maes, Qi Xie
  • Patent number: 9385164
    Abstract: A method for forming a resistive random access memory (RRAM) device is disclosed. The method comprises forming a first electrode, forming a resistive switching oxide layer comprising a metal oxide by thermal atomic layer deposition (ALD), doping the resistive switching oxide layer with a metal dopant different from metal forming the metal oxide, and forming a second electrode by thermal atomic layer deposition (ALD), where the resistive switching layer is interposed between the first electrode and the second electrode. In some embodiments, forming the resistive switching oxide may be performed without exposing a surface of the switching oxide layer to a surface-modifying plasma treatment after depositing the metal oxide.
    Type: Grant
    Filed: April 18, 2014
    Date of Patent: July 5, 2016
    Assignee: ASM IP HOLDING B.V.
    Inventors: Qi Xie, Vladimir Machkaoutsan, Jan Willem Maes, Michael Givens, Petri Raisanen
  • Patent number: 9360307
    Abstract: A structured-light measuring method, includes: matching process, in which the number and the low-precision depth of a laser point are achieved by using the imaging position of the laser point on a first camera (21) according to a first corresponding relationship in a calibration database, and the imaging position of the laser point on a second camera (22) is searched according to the number and the low-precision depth of the laser point so as to acquire the candidate matching points, then the matching process is completed according to the imaging position of the first camera (21) and the candidate matching points of the imaging position of the first camera (21) on the second camera (22) so that a matching result is achieved; and computing process, in which the imaging position of the second camera (22) matching with the imaging position of the first camera (21) is achieved according to the matching result, and then the precision position of the laser point is determined by a second corresponding relationship
    Type: Grant
    Filed: May 7, 2010
    Date of Patent: June 7, 2016
    Assignee: SHENZHEN TAISHAN ONLINE TECHNOLOGY CO., LTD
    Inventors: Danwei Shi, Di Wu, Wenchuang Zhao, Qi Xie
  • Publication number: 20160133628
    Abstract: Semiconductor structures, devices, and methods of forming the structures and device are disclosed. Exemplary structures include multi-gate or FinFET structures that can include both n-channel MOS (NMOS) and p-channel MOS (PMOS) devices to form CMOS structures and devices on a substrate. The devices can be formed using selective epitaxy and shallow trench isolation techniques.
    Type: Application
    Filed: January 18, 2016
    Publication date: May 12, 2016
    Inventors: Qi Xie, Vladimir Machkaoutsan, Jan Willem Maes
  • Patent number: 9245742
    Abstract: In some aspects, methods of forming a metal sulfide thin film are provided. According to some methods, a metal sulfide thin film is deposited on a substrate in a reaction space in a cyclical process where at least one cycle includes alternately and sequentially contacting the substrate with a first vapor-phase metal reactant and a second vapor-phase sulfur reactant. In some aspects, methods of forming a three-dimensional architecture on a substrate surface are provided. In some embodiments, the method includes forming a metal sulfide thin film on the substrate surface and forming a capping layer over the metal sulfide thin film. The substrate surface may comprise a high-mobility channel.
    Type: Grant
    Filed: December 18, 2013
    Date of Patent: January 26, 2016
    Assignee: ASM IP HOLDING B.V.
    Inventors: Suvi P. Haukka, Fu Tang, Michael Givens, Jan Willem Maes, Qi Xie
  • Patent number: 9240412
    Abstract: Semiconductor structures, devices, and methods of forming the structures and device are disclosed. Exemplary structures include multi-gate or FinFET structures that can include both re-channel MOS (NMOS) and p-channel MOS (PMOS) devices to form CMOS structures and devices on a substrate. The devices can be formed using selective epitaxy and shallow trench isolation techniques.
    Type: Grant
    Filed: September 27, 2013
    Date of Patent: January 19, 2016
    Assignee: ASM IP Holding B.V.
    Inventors: Qi Xie, Vladimir Machkaoutsan, Jan Willem Maes
  • Publication number: 20150356806
    Abstract: A thickness measurement device for a sheet-type medium comprises: a fixing frame (1), used for installing and bearing the following parts and components; a reference shaft (2), having two ends installed on the fixing frame (1) through bearings, wherein a reference roller (21) is fixedly fitted on the reference shaft (2); a detection shaft (3), wherein at least one floating support frame (31) having one end capable of rotating freely around the detection shaft (3) is arranged on the detection shaft (3), and a detection roller (32) and a signal generator (33) are arranged on the floating support frame (31); an elastic pressing plate (4), for pressing against the floating support frame (31) to keep an approaching trend between the detection roller (32) and the reference roller (21), wherein the elastic pressing plate (4) is composed of at least two elastic sheets; a signal sensor (5); and a data processing unit.
    Type: Application
    Filed: July 3, 2013
    Publication date: December 10, 2015
    Applicant: GRG BANKING EQUIPMENT CO., LTD.
    Inventors: Qi Xie, Wenqing Wu, Xing Hu, Tianrui Li
  • Patent number: 9136180
    Abstract: According to some embodiments, an electrode have a high effective work function is formed. The electrode may be the gate electrode of a transistor and may be formed on a high-k gate dielectric by depositing a first layer of conductive material, exposing that first layer to a hydrogen-containing gas, and depositing a second layer of conductive material over the first layer. The first layer may be deposited using a non-plasma process in which the substrate is not exposed to plasma or plasma-generated radicals. The hydrogen-containing gas to which the first layer is exposed may include an excited hydrogen species, which may be part of a hydrogen-containing plasma, and may be hydrogen-containing radicals. The first layer may also be exposed to oxygen before depositing the second layer. The work function of the gate electrode in the gate stack may be about 5 eV or higher in some embodiments.
    Type: Grant
    Filed: January 26, 2012
    Date of Patent: September 15, 2015
    Assignee: ASM IP HOLDING B.V.
    Inventors: Vladimir Machkaoutsan, Jan Willem Maes, Qi Xie
  • Publication number: 20150214301
    Abstract: In some embodiments, a method for manufacturing forms a semiconductor device, such as a transistor. A dielectric stack is formed on a semiconductor substrate. The stack comprises a plurality of dielectric layers separated by one of a plurality of spacer layers. Each of the plurality of spacer layers is formed of a different material than immediately neighboring layers of the plurality of dielectric layers. A vertically-extending hole is formed through the plurality of dielectric layers and the plurality of spacer layers. The hole is filled by performing an epitaxial deposition, with the material filling the hole forming a wire. The wire is doped and three of the dielectric layers are sequentially removed and replaced with conductive material, thereby forming upper and lower contacts to the wire and a gate between the upper and lower contacts. The wire may function as a channel region for a transistor.
    Type: Application
    Filed: April 3, 2015
    Publication date: July 30, 2015
    Inventors: Qi Xie, Vladimir Machkaoutsan, Jan Willem Maes
  • Publication number: 20150170914
    Abstract: In some aspects, methods of forming a metal sulfide thin film are provided. According to some methods, a metal sulfide thin film is deposited on a substrate in a reaction space in a cyclical process where at least one cycle includes alternately and sequentially contacting the substrate with a first vapor-phase metal reactant and a second vapor-phase sulfur reactant. In some aspects, methods of forming a three-dimensional architecture on a substrate surface are provided. In some embodiments, the method includes forming a metal sulfide thin film on the substrate surface and forming a capping layer over the metal sulfide thin film. The substrate surface may comprise a high-mobility channel.
    Type: Application
    Filed: December 18, 2013
    Publication date: June 18, 2015
    Inventors: Suvi P. Haukka, Fu Tang, Michael Givens, Jan Willem Maes, Qi Xie
  • Publication number: 20150170907
    Abstract: In some aspects, methods of forming a metal sulfide thin film are provided. According to some methods, a metal sulfide thin film is deposited on a substrate in a reaction space in a cyclical process where at least one cycle includes alternately and sequentially contacting the substrate with a first vapor-phase metal reactant and a second vapor-phase sulfur reactant. In some aspects, methods of forming a three-dimensional architecture on a substrate surface are provided. In some embodiments, the method includes forming a metal sulfide thin film on the substrate surface and forming a capping layer over the metal sulfide thin film. The substrate surface may comprise a high-mobility channel.
    Type: Application
    Filed: December 18, 2013
    Publication date: June 18, 2015
    Inventors: Suvi P. Haukka, Fu Tang, Michael Givens, Jan Willem Maes, Qi Xie