Patents by Inventor Qianyi Zhang

Qianyi Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10749036
    Abstract: The invention provides an oxide semiconductor TFT and manufacturing method thereof. The oxide semiconductor TFT comprises: a substrate, a gate on the substrate, a gate insulating layer on the gate and substrate, an oxide semiconductor layer on the gate insulating layer, and a barrier layer on the semiconductor layer, and a source and a drain on the oxide semiconductor layer and gate insulating layer; the oxide semiconductor layer comprising: a channel region and two contact regions respectively located at two sides of the channel region, and the barrier layer being located on the channel region; the channel region comprising a plurality of channel strips spaced apart in a channel width direction, and the barrier layer comprising a plurality of barrier strips respectively corresponding to the plurality of channel strips. The invention can reduce power consumption of the oxide semiconductor TFT and improve and the stability in the winding state.
    Type: Grant
    Filed: September 27, 2018
    Date of Patent: August 18, 2020
    Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventor: Qianyi Zhang
  • Publication number: 20200044089
    Abstract: The invention provides an oxide semiconductor TFT and manufacturing method thereof. The oxide semiconductor TFT comprises: a substrate, a gate on the substrate, a gate insulating layer on the gate and substrate, an oxide semiconductor layer on the gate insulating layer, and a barrier layer on the semiconductor layer, and a source and a drain on the oxide semiconductor layer and gate insulating layer; the oxide semiconductor layer comprising: a channel region and two contact regions respectively located at two sides of the channel region, and the barrier layer being located on the channel region; the channel region comprising a plurality of channel strips spaced apart in a channel width direction, and the barrier layer comprising a plurality of barrier strips respectively corresponding to the plurality of channel strips. The invention can reduce power consumption of the oxide semiconductor TFT and improve and the stability in the winding state.
    Type: Application
    Filed: September 27, 2018
    Publication date: February 6, 2020
    Inventor: Qianyi Zhang
  • Publication number: 20190207031
    Abstract: A manufacturing method of a thin-film transistor is provided. The method include: forming a gate pattern layer on a substrate; forming a gate insulating layer covering the gate pattern layer; depositing semi-conductive oxide material on the gate insulating layer to form an active pattern layer on the gate insulating layer; depositing reducing material on the active pattern layer to form a reducing pattern layer; and forming a source pattern layer and a drain pattern layer on the reducing pattern layer. A thin-film transistor is further provided.
    Type: Application
    Filed: April 30, 2018
    Publication date: July 4, 2019
    Inventor: Qianyi Zhang