Patents by Inventor Qin Zheng
Qin Zheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12289227Abstract: The present disclosure provides a computing system, a computing processor and a data processing method for the computing processor. The computing system includes: multiple computing clusters, each computing cluster includes multiple computing nodes, and each computing node includes multiple computing processors. At least some computing clusters among the computing clusters, at least some computing nodes in each computing cluster and at least some computing processors of each computing node are connected through direct links. Each computing processor of at least some computing processors of the computing node is configured with a local routing table, which is configured for the computing processor to determine, based on the local routing table, the next direct link through which a data packet performs routing from a data source to a data destination, and the computing processor forwards the data packet through the next direct link.Type: GrantFiled: May 11, 2022Date of Patent: April 29, 2025Assignee: Shanghai Biren Technology Co.,LtdInventors: Zhou Hong, Qin Zheng, ChengPing Luo
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Patent number: 12277450Abstract: A method for processing data using a computing array is provided. In the method, source data is allocated to each of multiple computing nodes in a computing array. The source data includes multiple blocks. At a computing node among the computing nodes, in at least one iteration process, multiple blocks are respectively received from multiple other computing nodes other than the computing node among the computing nodes using multiple first type computing devices among a set of computing devices included in the computing node. A processing operation is executed on the received blocks using the first type computing devices respectively to generate multiple intermediate results. The processing operation is executed on the intermediate results to obtain a first part of a final result of executing the processing operation on the source data. A corresponding computer system is also provided.Type: GrantFiled: May 18, 2022Date of Patent: April 15, 2025Assignee: Shanghai Biren Technology Co., LtdInventors: Zhou Hong, ChengPing Luo, Qin Zheng
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Patent number: 12095654Abstract: An information processing method, an interconnection device, and a computer-readable storage medium are provided. The interconnection device includes a request processing module configured for: receiving a data access request from at least one processor, wherein the data access request comprises a merge bit, a multicast group identifier (MGID), and a multicast transaction identifier (MTID); determining whether the data access request is a multicast request; determining whether the interconnection device receives other multicast requests if it is determined that the data access request is a multicast request based on the MGID, the MTID, and a static routing policy of a multicast group; and obtaining the other multicast requests if it is determined that the interconnection device receives the other multicast requests, merging the multicast request with the other multicast requests into a merged request, and forwarding the merged request to a next-hop device of the interconnection device.Type: GrantFiled: October 15, 2023Date of Patent: September 17, 2024Assignee: Shanghai Biren Technology Co., LtdInventors: Qin Zheng, Zhou Hong, YuFei Zhang, Lin Chen, ChengKun Sun, Tong Sun, ChengPing Luo, HaiChuan Wang
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Publication number: 20240048475Abstract: An information processing method, an interconnection device, and a computer-readable storage medium are provided. The interconnection device includes a request processing module configured for: receiving a data access request from at least one processor, wherein the data access request comprises a merge bit, a multicast group identifier (MGID), and a multicast transaction identifier (MTID); determining whether the data access request is a multicast request; determining whether the interconnection device receives other multicast requests if it is determined that the data access request is a multicast request based on the MGID, the MTID, and a static routing policy of a multicast group; and obtaining the other multicast requests if it is determined that the interconnection device receives the other multicast requests, merging the multicast request with the other multicast requests into a merged request, and forwarding the merged request to a next-hop device of the interconnection device.Type: ApplicationFiled: October 15, 2023Publication date: February 8, 2024Applicant: Shanghai Biren Technology Co.,LtdInventors: Qin ZHENG, Zhou HONG, YuFei ZHANG, Lin CHEN, ChengKun SUN, Tong SUN, ChengPing LUO, HaiChuan WANG
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Patent number: 11855878Abstract: An information processing method, an interconnection device, and a computer-readable storage medium are provided. The interconnection device includes a request processing module configured for: receiving a data access request from at least one processor, wherein the data access request comprises a merge bit, a multicast group identifier (MGID), and a multicast transaction identifier (MTID); determining whether the data access request is a multicast request; determining whether the interconnection device receives other multicast requests if it is determined that the data access request is a multicast request based on the MGID, the MTID, and a static routing policy of a multicast group; and obtaining the other multicast requests if it is determined that the interconnection device receives the other multicast requests, merging the multicast request with the other multicast requests into a merged request, and forwarding the merged request to a next-hop device of the interconnection device.Type: GrantFiled: November 11, 2021Date of Patent: December 26, 2023Assignee: Shanghai Biren Technology Co., LtdInventors: Qin Zheng, Zhou Hong, YuFei Zhang, Lin Chen, ChengKun Sun, Tong Sun, ChengPing Luo, HaiChuan Wang
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Patent number: 11817656Abstract: An electrical connector includes an insulating body and first through eighth terminals sequentially arranged in a lateral direction in the insulating body, wherein the first and second terminals, the third and sixth terminals, the fourth and fifth terminals, and the seventh and eighth terminals are respectively used to transmit a pair of differential signals, each terminal including: a mating portion for mating to a mating connector; a tail portion opposite to the mating portion; and a connecting portion connected therebetween, the connecting portions of the third terminal to the fifth terminal are all provided with a coupling portion; wherein the coupling portions of the third through fifth terminals are in three different planes, respectively, and the coupling portion of the fifth terminal and the coupling portion of the third terminal at least partially overlap in a longitudinal direction perpendicular to the lateral direction.Type: GrantFiled: January 13, 2022Date of Patent: November 14, 2023Assignees: FOXCONN (KUNSHAN) COMPUTER CONNECTOR CO., LTD., FOXCONN INTERCONNECT TECHNOLOGY LIMITEDInventors: Yong-Chun Xu, Hung-Chi Yu, Chih-Ching Hsu, Wei-Kang Liu, Chin-Jung Wu, Xiao-Qin Zheng
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Patent number: 11809221Abstract: An artificial intelligence chip and a data operation method are provided. The artificial intelligence chip receives a command carrying first data and address information and includes a chip memory, a computing processor, a base address register, and an extended address processor. The base address register is configured to access an extended address space in the chip memory. The extended address processor receives the command. The extended address processor determines an operation mode of the first data according to the address information. When the address information points to a first section of the extended address space, the extended address processor performs a first operation on the first data. When the address information points to a section other than the first section of the extended address space, the extended address processor notifies the computing processor of the operation mode and the computing processor performs a second operation on the first data.Type: GrantFiled: September 8, 2021Date of Patent: November 7, 2023Assignee: Shanghai Biren Technology Co., LtdInventors: Zhou Hong, Qin Zheng, ChengPing Luo, GuoFang Jiao, Song Zhao, XiangLiang Yu
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Patent number: 11811512Abstract: A multicast routing method and an interconnection device for a mesh network system, a mesh network system and a configuration method thereof are provided. The method includes, at each internal interconnection device among multiple interconnection devices of each processing subsystem: in response to receiving a multicast access request to a destination memory, determining a shortest path from each internal interconnection device to the destination memory based on a topology structure of the mesh network system; where the internal interconnection device has no link connected to an external processing subsystem; in response to determining that the number of the shortest path is equal to one, routing the multicast access request to the destination memory along the shortest path; in response to determining that the number of the shortest path is greater than one, determining a next-hop interconnection device for the multicast access request based on a second static routing policy.Type: GrantFiled: July 5, 2022Date of Patent: November 7, 2023Assignee: Shanghai Biren Technology Co., LtdInventors: Zhou Hong, Qin Zheng, Yuzhe Li
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Patent number: 11811176Abstract: An electrical connector includes a terminal module having a circuit board having first through eighth conductive traces sequentially arranged in a transverse direction and corresponding first through eighth terminals, the third terminal and the sixth terminal being configured for transmitting a pair of differential signals, the fourth terminal and the fifth terminal being configured for transmitting another pair of differential signals, the first through eighth conductive traces being respectively electrically connected to corresponding first through eighth terminals, each of the third conductive trace and the fifth conductive trace including a coupling portion, a size of the coupling portion in the transverse direction is larger than a size of the other part of the corresponding conductive trace in the transverse direction, wherein the coupling portion of the third conductive trace and the coupling portion of the fifth conductive trace overlap in an up and down direction to increase mutual coupling.Type: GrantFiled: October 26, 2021Date of Patent: November 7, 2023Assignees: FOXCONN (KUNSHAN) COMPUTER CONNECTOR CO., LTD., FOXCONN INTERCONNECT TECHNOLOGY LIMITEDInventors: Yong-Chun Xu, Hung-Chi Yu, Chih-Ching Hsu, Xiao-Qin Zheng, Chin-Jung Wu
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Publication number: 20230082060Abstract: A computer device displays at least one virtual scene entrance. The at least one virtual scene entrance corresponds to at least one scene progress of a target virtual scene. The at least one scene progress is determined based on historical interaction behavior of a target object in at least one virtual scene. The computer device transmits a loading request to a first server in response to a trigger operation on a first virtual scene entrance in the at least one virtual scene entrance. The loading request is used for instructing the first server to run the target virtual scene based on a first scene progress corresponding to the first virtual scene entrance. The computer device receives, from the first server, a scene picture of the target virtual scene. The computer device displays the scene picture in response to receiving the scene picture.Type: ApplicationFiled: November 21, 2022Publication date: March 16, 2023Inventors: Shili XU, Bingwu ZHONG, Yanhui LU, Chenlong MA, Yabin FU, Xiaohu MA, Yulin HU, Qin ZHENG
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Publication number: 20230027355Abstract: A multicast routing method and an interconnection device for a mesh network system, a mesh network system and a configuration method thereof are provided. The method includes, at each internal interconnection device among multiple interconnection devices of each processing subsystem: in response to receiving a multicast access request to a destination memory, determining a shortest path from each internal interconnection device to the destination memory based on a topology structure of the mesh network system; where the internal interconnection device has no link connected to an external processing subsystem; in response to determining that the number of the shortest path is equal to one, routing the multicast access request to the destination memory along the shortest path; in response to determining that the number of the shortest path is greater than one, determining a next-hop interconnection device for the multicast access request based on a second static routing policy.Type: ApplicationFiled: July 5, 2022Publication date: January 26, 2023Applicant: Shanghai Biren Technology Co.,LtdInventors: Zhou HONG, Qin ZHENG, Yuzhe LI
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Publication number: 20220398102Abstract: An artificial intelligence chip and a data operation method are provided. The artificial intelligence chip receives a command carrying first data and address information and includes a chip memory, a computing processor, a base address register, and an extended address processor. The base address register is configured to access an extended address space in the chip memory. The extended address processor receives the command. The extended address processor determines an operation mode of the first data according to the address information. When the address information points to a first section of the extended address space, the extended address processor performs a first operation on the first data. When the address information points to a section other than the first section of the extended address space, the extended address processor notifies the computing processor of the operation mode and the computing processor performs a second operation on the first data.Type: ApplicationFiled: September 8, 2021Publication date: December 15, 2022Applicant: Shanghai Biren Technology Co.,LtdInventors: Zhou HONG, Qin ZHENG, ChengPing LUO, GuoFang JIAO, Song ZHAO, XiangLiang YU
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Publication number: 20220374280Abstract: A method for processing data using a computing array is provided. In the method, source data is allocated to each of multiple computing nodes in a computing array. The source data includes multiple blocks. At a computing node among the computing nodes, in at least one iteration process, multiple blocks are respectively received from multiple other computing nodes other than the computing node among the computing nodes using multiple first type computing devices among a set of computing devices included in the computing node. A processing operation is executed on the received blocks using the first type computing devices respectively to generate multiple intermediate results. The processing operation is executed on the intermediate results to obtain a first part of a final result of executing the processing operation on the source data. A corresponding computer system is also provided.Type: ApplicationFiled: May 18, 2022Publication date: November 24, 2022Applicant: Shanghai Biren Technology Co.,LtdInventors: Zhou HONG, ChengPing LUO, Qin ZHENG
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Publication number: 20220368619Abstract: The present disclosure provides a computing system, a computing processor and a data processing method for the computing processor. The computing system includes: multiple computing clusters, each computing cluster includes multiple computing nodes, and each computing node includes multiple computing processors. At least some computing clusters among the computing clusters, at least some computing nodes in each computing cluster and at least some computing processors of each computing node are connected through direct links. Each computing processor of at least some computing processors of the computing node is configured with a local routing table, which is configured for the computing processor to determine, based on the local routing table, the next direct link through which a data packet performs routing from a data source to a data destination, and the computing processor forwards the data packet through the next direct link.Type: ApplicationFiled: May 11, 2022Publication date: November 17, 2022Applicant: Shanghai Biren Technology Co.,LtdInventors: Zhou HONG, Qin ZHENG, ChengPing LUO
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Publication number: 20220231461Abstract: An electrical connector includes an insulating body and first through eighth terminals sequentially arranged in a lateral direction in the insulating body, wherein the first and second terminals, the third and sixth terminals, the fourth and fifth terminals, and the seventh and eighth terminals are respectively used to transmit a pair of differential signals, each terminal including: a mating portion for mating to a mating connector; a tail portion opposite to the mating portion; and a connecting portion connected therebetween, the connecting portions of the third terminal to the fifth terminal are all provided with a coupling portion; wherein the coupling portions of the third through fifth terminals are in three different planes, respectively, and the coupling portion of the fifth terminal and the coupling portion of the third terminal at least partially overlap in a longitudinal direction perpendicular to the lateral direction.Type: ApplicationFiled: January 13, 2022Publication date: July 21, 2022Inventors: YONG-CHUN XU, HUNG-CHI YU, CHIH-CHING HSU, WEI-KANG LIU, CHIN-JUNG WU, XIAO-QIN ZHENG
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Publication number: 20220158929Abstract: An information processing method, an interconnection device, and a computer-readable storage medium are provided. The interconnection device includes a request processing module configured for: receiving a data access request from at least one processor, wherein the data access request comprises a merge bit, a multicast group identifier (MGID), and a multicast transaction identifier (MTID); determining whether the data access request is a multicast request; determining whether the interconnection device receives other multicast requests if it is determined that the data access request is a multicast request based on the MGID, the MTID, and a static routing policy of a multicast group; and obtaining the other multicast requests if it is determined that the interconnection device receives the other multicast requests, merging the multicast request with the other multicast requests into a merged request, and forwarding the merged request to a next-hop device of the interconnection device.Type: ApplicationFiled: November 11, 2021Publication date: May 19, 2022Applicant: Shanghai Biren Technology Co.,LtdInventors: Qin ZHENG, Zhou HONG, YuFei ZHANG, Lin CHEN, ChengKun SUN, Tong SUN, ChengPing LUO, HaiChuan WANG
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Publication number: 20220131324Abstract: An electrical connector includes a terminal module having a circuit board having first through eighth conductive traces sequentially arranged in a transverse direction and corresponding first through eighth terminals, the third terminal and the sixth terminal being configured for transmitting a pair of differential signals, the fourth terminal and the fifth terminal being configured for transmitting another pair of differential signals, the first through eighth conductive traces being respectively electrically connected to corresponding first through eighth terminals, each of the third conductive trace and the fifth conductive trace including a coupling portion, a size of the coupling portion in the transverse direction is larger than a size of the other part of the corresponding conductive trace in the transverse direction, wherein the coupling portion of the third conductive trace and the coupling portion of the fifth conductive trace overlap in an up and down direction to increase mutual coupling.Type: ApplicationFiled: October 26, 2021Publication date: April 28, 2022Inventors: YONG-CHUN XU, HUNG-CHI YU, CHIH-CHING HSU, XIAO-QIN ZHENG, CHIN-JUNG WU
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Patent number: 11297011Abstract: A data transmission method includes obtaining dequeue information that indicates a queue which requests to output data in a communications device and a target data volume that is output from each queue at a time, and the communications device manages the target data volume based on a burst value, reading, based on the queue, a sub-packet descriptor (PD) that is obtained by segmenting the first PD, the sub-PD includes target description information indicating a target data packet, the first PD includes first description information indicating a first data packet set including the target data packet, the first data packet set and the sub-PD are stored in a packet cache including a dynamic random access memory (DRAM), the first PD is stored in a control cache including a static random access memory (SRAM), and determining, the target data packet based on the sub-PD, and sending the target data packet.Type: GrantFiled: May 14, 2020Date of Patent: April 5, 2022Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Hua Wei, Qin Zheng, Wenhua Du
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Patent number: D978312Type: GrantFiled: March 17, 2020Date of Patent: February 14, 2023Assignee: FUJIAN OSPRING TECHNOLOGY DEVELOPMENT CO., LTDInventors: KaiQin Xu, GuoHong Ruan, XiaoYun Lin, XinYi Hu, Qin Zheng, Hao Fang, WenJuan Wu
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Patent number: D979929Type: GrantFiled: June 16, 2022Date of Patent: March 7, 2023Inventor: Qin Zheng