Patents by Inventor Qing Luo

Qing Luo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240149398
    Abstract: The subject application relates to bonded abrasive with low wetting bond material. An abrasive article including a bonded abrasive body having a particular MOR/EMOD ratio associated with a particular bond vol %. The body also can include a) an average Bond Post Area (BPA) of not greater than microns2; b) an average Bond Post Count (BPC) of at least 140 per 1536 mm2; c) an average bond wetting radius of at least 30/microns; or d) a combination of a) and b).
    Type: Application
    Filed: November 3, 2023
    Publication date: May 9, 2024
    Inventors: Qing WANG, Guangyong LIN, Nilanjan SARANGI, Zhenyu LUO, Lu LU
  • Publication number: 20240149397
    Abstract: The subject application relates to a bonded abrasive for gear power honing. An abrasive article including a bonded abrasive body having abrasive particles and a bond material. The abrasive body can include an inner annular surface with at least 1 tooth. The abrasive article can provide an average Ff? of less than 2.0 according to a Gear Power Honing Test.
    Type: Application
    Filed: November 3, 2023
    Publication date: May 9, 2024
    Inventors: Qing Wang, Guangyong Lin, Nilanjan Sarangi, Zhenyu Luo, Lu Lu
  • Publication number: 20240099920
    Abstract: A method for controlling a device for automatically adjusting an airway opening body position is provided. The device includes a horizontal base plate, a head support block, a back support plate, a neck support apparatus, a head cover assembly, and a programmable logic controller (PLC). The neck support apparatus is positioned between the head support block and the back support plate. The PLC is configured to controls a stroke of an electric cylinder according to the following equations: ?=1.235?+?, and ?=KX+B+C, where ? is a body position angle, the body position angle is an angle between a positive projection line of a connecting line from a mandibular angle to an external acoustic meatus on a symmetrical surface of a human body and the back support plate, and ? is a preset value ranging from 90° to 100°.
    Type: Application
    Filed: November 14, 2022
    Publication date: March 28, 2024
    Inventors: XIANG-MEI YANG, MIN-YUE SUN, HONG-MEI CHEN, YAN LUO, JUN WU, JUAN HUANG, DONG-MEI LI, QING ZENG, JING ZHOU, JING WEN, JIN-JIN GUO
  • Publication number: 20240091746
    Abstract: A method for preparing a supported Ru and/or Ni catalyst includes mixing a magnesium precursor, a zinc precursor, or a nickel precursor with an aluminum precursor in solid phase to form a first mixture; adding an auxiliary agent to the first mixture to form a second mixture, wherein the auxiliary agent is to increase a specific surface area; calcining the second mixture at a first temperature to obtain a spinel carrier; placing the spinel carrier in a solution of a Ru and/or Ni metal salt to impregnate the spinel carrier with the Ru and/or Ni metal salt to obtain an impregnated carrier; and after drying, calcining the impregnated carrier at a second temperature to obtain the supported Ru and/or Ni catalyst.
    Type: Application
    Filed: September 26, 2023
    Publication date: March 21, 2024
    Applicants: FZU Zijin Hydrogen Power Technology Co., Ltd., Fuzhou University
    Inventors: Lilong JIANG, Chongqi CHEN, Yu LUO, Jun NI, Qing ZHANG
  • Patent number: 11917865
    Abstract: This disclosure relates to the field of display technologies, and discloses a display substrate, a method for fabricating the same, and a display device. The display substrate includes: a substrate, and a plurality of pixels and a pixel definition layer on the substrate, wherein the pixels include long sides and short sides; and the pixel definition layer includes long-side sections adjacent to the long sides, and short-side sections adjacent to the short sides, wherein heights of the long-side sections are greater than heights of the short-side sections.
    Type: Grant
    Filed: June 28, 2022
    Date of Patent: February 27, 2024
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Chengyuan Luo, Qing Dai
  • Publication number: 20240041779
    Abstract: Provided are delayed sustained-release oral drug dosage forms comprising a Janus kinase (JAK) inhibitor, such as tofacitinib. In other aspects, provided are methods of designing, methods of making, such as using three-dimensional printing, and methods of treatment and/or prevention associated with the oral drug dosage forms described herein.
    Type: Application
    Filed: December 8, 2021
    Publication date: February 8, 2024
    Inventors: Feihuang DENG, Yu ZHENG, Xin LIU, Qing LUO, Jie CHENG, Luo WANG, Senping CHENG, Xiaoling LI
  • Publication number: 20230397429
    Abstract: A method of preparing a programmable diode, including: forming a tungsten plug by a standard CMOS process; taking the tungsten plug as a lower electrode and depositing a functional layer material such as a ferroelectric film on the tungsten plug; depositing an upper electrode on the functional layer material; and patterning the upper electrode and a functional layer to complete a preparation of the programmable diode. The present disclosure further discloses a ferroelectric memory of a programmable diode prepared by the method of preparing a programmable diode. The method of preparing a programmable diode does not require growing a lower electrode and reduces a complexity of the process. The ferroelectric memory includes a transistor and a programmable diode. This design stores information according to different polarities of the diode, thus a device area may be further reduced and a storage density may be improved.
    Type: Application
    Filed: October 22, 2020
    Publication date: December 7, 2023
    Inventors: Qing Luo, Hangbing Lv, Ming Liu
  • Publication number: 20230335182
    Abstract: A complementary storage unit and a method of preparing the same, and a complementary memory. The complementary storage unit includes: a control transistor, a pull-up diode and a pull-down diode. The control transistor is configured to control reading and writing of the storage unit. One end of the pull-up diode is connected to a positive selection line, and the other end thereof is connected to a source end of the control transistor, so as to control a high-level input. One end of the pull-down diode is connected to a negative selection line, and the other end thereof is connected to the source end of the control transistor, so as to control a low-level input. The pull-up diode and the pull-down diode are symmetrically arranged in a first direction.
    Type: Application
    Filed: August 24, 2020
    Publication date: October 19, 2023
    Inventors: Qing Luo, Bing Chen, Hangbing Lv, Ming Liu, Cheng Lu
  • Publication number: 20230335215
    Abstract: The present disclosure discloses a device and a method for testing fatigue characteristics of a selector (210). The device includes: a voltage divider (220) and a counter (103). The voltage divider (220) is connected to a selector (210) to be tested and is configured to divide a voltage for the selector (210) to be tested during a test process. The counter (103) is connected to the selector (210) to be tested and is configured to detect voltage and/or current changes of the selector (210) to be tested.
    Type: Application
    Filed: August 24, 2020
    Publication date: October 19, 2023
    Inventors: Qing LUO, Hangbing LV, Jie YU, Ming LIU
  • Patent number: 11776607
    Abstract: The present disclosure provides a fusion memory including a plurality of memory cells, wherein each memory cell of the plurality of memory cells includes: a bulk substrate; a source and a drain on the bulk substrate; a channel extending between the source and the drain; a ferroelectric layer on the channel; and a gate on the ferroelectric layer.
    Type: Grant
    Filed: January 28, 2019
    Date of Patent: October 3, 2023
    Assignee: INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OF SCIENCES
    Inventors: Hangbing Lv, Qing Luo, Xiaoxin Xu, Tiancheng Gong, Ming Liu
  • Publication number: 20230307308
    Abstract: Embodiments of the present disclosure relate to the field of semiconductors, and provide a semiconductor structure and a forming method thereof. The forming method includes: providing a substrate; performing first oxidation on a part of the substrate to form a first dielectric layer; and performing second oxidation on a part of the substrate just under the first dielectric layer to form a second dielectric layer, where the first dielectric layer and the second dielectric layer form a dielectric layer on the substrate; and an oxidation rate of the first oxidation to a substrate material is less than that of the second oxidation to the substrate material.
    Type: Application
    Filed: June 13, 2022
    Publication date: September 28, 2023
    Inventors: Qing LUO, Taoyan YAN
  • Publication number: 20230267990
    Abstract: Provided are a symmetric memory cell and a BNN circuit. The symmetric memory cell includes a first complementary structure and a second complementary structure, the second complementary structure being symmetrically connected to the first complementary structure in a first direction, wherein the first complementary structure includes a first control transistor configured to be connected to the second complementary structure, the second complementary structure includes a second control transistor, a drain electrode of the second control transistor and a drain electrode of the first control transistor being symmetrically arranged in the first direction and connected to a bit line, and the symmetric memory cell is configured to store a weight value 1 or 0.
    Type: Application
    Filed: August 24, 2020
    Publication date: August 24, 2023
    Inventors: Qing LUO, Bing CHEN, Hangbing LV, Ming LIU, Cheng LU
  • Publication number: 20230142576
    Abstract: A downhole electromagnetic logging tool comprises a transmitting system, a magnetic field sensor array and a control module. The transmitting system and the magnetic field sensor array are both connected to the control module. The transmitting system comprises an upper emission coil and a lower emission coil, which are respectively arranged above and below the magnetic field sensor array, for generating magnetic fields of opposite polarities, allowing the magnetic fields to be concentrated at the magnetic field sensor array. A casing generates a secondary magnetic field, which is received by the magnetic field sensor array to complete detection of the casing.
    Type: Application
    Filed: April 20, 2021
    Publication date: May 11, 2023
    Applicants: CHINA PETROLEUM & CHEMICAL CORPORATION, PETROLEUM ENGINEERING INSTITUTE OF ZYOF BRANCH, SINOPEC
    Inventors: Qingsheng ZHANG, Fei XU, Hua HUANG, Cheng ZHANG, Wenchang ZHANG, Qing LUO, Xiaolei LI, Lingling ZHU
  • Patent number: 11641787
    Abstract: The present disclosure provides a self-rectifying resistive memory, including: a lower electrode; a resistive material layer formed on the lower electrode and used as a storage medium; a barrier layer formed on the resistive material layer and using a semiconductor material or an insulating material; and an upper electrode formed on the barrier layer to achieve Schottky contact with the material of the barrier layer; wherein, the Schottky contact between the upper electrode and the material of the barrier layer is used to realize self-rectification of the self-rectifying resistive memory. Thus, no additional gate transistor or diode is required as the gate unit. In addition, because the device has self-rectifying characteristics, it is capable of suppressing read crosstalk in the cross-array.
    Type: Grant
    Filed: March 28, 2018
    Date of Patent: May 2, 2023
    Assignee: Institute of Microelectronics, Chinese Academy of Sciences
    Inventors: Qing Luo, Hangbing Lv, Ming Liu
  • Publication number: 20230119755
    Abstract: A method for forming a semiconductor structure includes: providing a substrate, in which a gate structure is formed on the substrate; forming first side walls covering side surfaces of the gate structure, in which the first side walls have a first preset thickness in a direction parallel to a plane of the substrate; performing first ion implantation on the substrate on both sides of the gate structure exposed to the first side walls; removing a part of the first side walls to form second side walls, in which the second side walls have a second preset thickness in the direction parallel to the plane of the substrate; and performing second ion implantation on the substrate on both sides of the gate structure, in which doping types of the first ion implantation and the second ion implantation are different.
    Type: Application
    Filed: June 23, 2022
    Publication date: April 20, 2023
    Applicant: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventor: Qing LUO
  • Patent number: 11571391
    Abstract: The present disclosure provides oral drug dosage forms comprising: (a) an erodible non-stimulant material admixed with an ADHD non-stimulant; and (b) an erodible stimulant material admixed with an ADHD stimulant, wherein the erodible non-stimulant material admixed with the ADHD non-stimulant is embedded in a substrate material, and wherein upon exposure to gastrointestinal fluid the ADHD non-stimulant is released according to a desired non-stimulant release profile and the ADHD stimulant is released according to a desired stimulant release profile. In some embodiment, the ADHD non-stimulant is released according to a sustained release profile. In some embodiments, the ADHD stimulant is released according to an immediate release profile. The oral drug dosage forms of the present disclosure are useful for the treatment of attention deficit hyperactivity disorder (ADHD). Also provided herein are methods of designing and manufacturing the oral drug dosage forms described herein.
    Type: Grant
    Filed: December 25, 2018
    Date of Patent: February 7, 2023
    Assignee: Triastek, Inc.
    Inventors: Feihuang Deng, Xiaoling Li, Senping Cheng, Ying Wang, Qing Luo
  • Publication number: 20230015379
    Abstract: A HfO2-based ferroelectric capacitor and a preparation method therefor, and a HfO2-based ferroelectric memory, relating to the technical field of microelectronics. The purpose of enlarging the memory window of the ferroelectric memory is achieved by inserting an Al2O3 intercalation layer having a coefficient of thermal expansion smaller than TiN between a dielectric layer and an upper electrode (TiN) of the ferroelectric capacitor. The HfO2-based ferroelectric capacitor comprises a substrate layer, a lower electrode, a dielectric layer, an Al2O3 intercalation layer, an upper electrode and a metal protection layer from bottom to top. The memory window can be increased, information misreading is effectively prevented, and therefore, the reliability of the memory is improved.
    Type: Application
    Filed: July 9, 2020
    Publication date: January 19, 2023
    Applicant: INSTITUTE OF MICROELECTRONICS OF THE CHINESE ACADEMY OF SCIENCES
    Inventors: Qing Luo, Pengfei JIANG, Hangbing LV, Yuan Wang, Ming Liu
  • Patent number: 11556100
    Abstract: A control method includes sending, by a controller, a created context-aware model to a context-aware engine. The context-aware model is used to define a preset control performed when target data meets a trigger condition and to instruct the context-aware engine to send indication information to the controller when the context-aware engine determines that the target data meets the trigger condition. The preset control is used to implement a context-aware function. The indication information is used to indicate that the target data meets the trigger condition. The method also includes receiving, by the controller, the indication information. The method further includes performing, by the controller, the preset control based on the indication information.
    Type: Grant
    Filed: December 30, 2019
    Date of Patent: January 17, 2023
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Xiaotao Deng, Qing Luo, Zhifeng Chen, Tao Han, Junfei Zeng
  • Publication number: 20220320424
    Abstract: The disclosure discloses a selector and a preparation method thereof. The selector includes: a substrate 1; an alternating layer 2 provided on the substrate 1, the alternating layer 2 being alternately formed by a bottom electrode layer 21 and an insulating layer 22; the alternating layer 2 is provided with a U-shaped groove; a selective layer 3 and a dielectric layer 4 being sequentially deposited in a direction from an inner wall of the U-shaped groove to a center of the U-shaped groove; and a top electrode layer 5 is filled in a concave space defined by the dielectric layer 4. The selector and the preparation method according to one or more embodiments of the disclosure can address the technical problem of high leakage current of the selector in existing technology and provide a selector with low leakage current.
    Type: Application
    Filed: December 14, 2020
    Publication date: October 6, 2022
    Applicant: INSTITUTE OF MICROELECTRONICS OF THE CHINESE ACADEMY OF SCIENCES
    Inventors: Qing LUO, Yaxin DING, Hangbing LV, Ming LIU
  • Patent number: 11398002
    Abstract: A method for determining an estimated time of arrival (ETA) may include obtaining a service request from a terminal and determining a reference image relating to the service request. The method may also include obtaining a trained neural network model. The method may further include determining an ETA relating to the service request based on the reference image and the trained neural network model, and transmitting the ETA to the terminal.
    Type: Grant
    Filed: December 30, 2018
    Date of Patent: July 26, 2022
    Assignee: BEIJING DIDI INFINITY TECHNOLOGY AND DEVELOPMENT CO., LTD.
    Inventors: Qing Luo, Zheng Wang