Patents by Inventor Qiong Yu
Qiong Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11941553Abstract: The embodiment of the present disclosure discloses a method, an electronic device, and a storage medium for a ship route optimization. The method for the ship route optimization considers a dynamic feature of a multi-functional emergency rescue ship and an interference effect caused by an airflow, uses a movement model with kinematics non-holonomic constraints, such as a ship total cost assessment function to simulate the movement of the ship, and based on a sparrow search algorithm, learns how to apply the algorithm to a route plan of the emergency rescue ship. The method can improve the ship route optimization algorithm, improve an accuracy and practical applicability of a calculated plan. The method can effectively and accurately locate obstacles and hidden reefs, and consider effects of an airflow and a non-holonomic constraint effect, so as to make the route planning of the ship more efficient and intelligent.Type: GrantFiled: July 5, 2023Date of Patent: March 26, 2024Assignees: HEFEI UNIVERSITY OF TECHNOLOGY, ANHUI CONSTRUCTION ENGINEERING TRAFFIC & SHIPPING GROUP CO., LTD.Inventors: Jingyu Yu, Jingfeng Wang, Wei Lin, Yuxue Pu, Yongchao Zhu, Zhenxuan Li, Qiong Zhang, Yuming Zhang, Yonggen Gu, Zheng Qiu
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Patent number: 11931363Abstract: A compound of Formula (I), or a pharmaceutically acceptable salt thereof, is provided that has been shown to be useful for treating a PRC2-mediated disease or disorder: wherein R1, R2, R3, R4, R5, and n are as defined herein.Type: GrantFiled: October 19, 2021Date of Patent: March 19, 2024Assignee: NOVARTIS AGInventors: Ho Man Chan, Xiang-Ju Justin Gu, Ying Huang, Ling Li, Yuan Mi, Wei Qi, Martin Sendzik, Yongfeng Sun, Long Wang, Zhengtian Yu, Hailong Zhang, Ji Yue (Jeff) Zhang, Man Zhang, Qiong Zhang, Kehao Zhao
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Publication number: 20240075105Abstract: Provided is a fusion protein of human serum albumin or a wild type thereof and human interleukin-2 or a mutation thereof, said fusion protein has a significantly extended in vivo half-life relative to recombinant interleukin-2, can be used alone for treating a tumor, and improves anti-tumor efficacy of an anti-PD-1 antibody or an anti PD-L1-antibody.Type: ApplicationFiled: November 15, 2021Publication date: March 7, 2024Inventors: Zailin Yu, Yan Fu, Xiaonan Yang, Yusong Fu, Guoqiang Qiao, Qiong Hou, Tao Zhu
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Patent number: 10529758Abstract: A method for forming an image sensor package and an image sensor package are provided. The method includes: providing a first substrate and a second substrate which includes a first surface and a second surface opposite to the first surface, and attaching either surface of the first substrate with the first surface of the second substrate with an adhesive layer; forming a groove at the second surface of the second substrate; providing a base which includes a first surface and a second surface opposite to the first surface, where the first surface of the base is provided with a sensing region and multiple contact pads; and attaching the second surface of the second substrate with the first surface of the base, where a cavity is formed between the groove and the base, and the sensing region is located within the cavity.Type: GrantFiled: September 21, 2015Date of Patent: January 7, 2020Assignee: China Wafer Level CSP Co., Ltd.Inventors: Zhiqi Wang, Qiong Yu, Wei Wang
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Patent number: 10133907Abstract: A fingerprint recognition chip packaging structure and a packaging method. The packaging structure includes: a substrate provided with a substrate surface; a sensor chip coupled on the surface of the substrate, where the sensor chip is provided with a first surface and a second surface opposite the first surface, the first surface of the sensor chip is provided with a sensing area, and the second surface of the sensor chip is arranged on the surface of the substrate; a capping layer arranged on the surface of the sensing area of the sensor chip, where the material of the capping layer is a polymer; and, a lamination layer arranged on the surface of the substrate and that of the sensor chip, where the lamination layer exposes the capping layer. The packaging structure allows for reduced requirements on the sensitivity of the sensor chip, thus broadening applications.Type: GrantFiled: June 30, 2015Date of Patent: November 20, 2018Assignee: China Wafer Level CSP Co., Ltd.Inventors: Zhiqi Wang, Qiong Yu, Wei Wang
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Patent number: 10126151Abstract: A chip package structure and packaging method are provided. The chip package structure includes a sensing chip, a covering layer located on the first surface of the sensing chip, and a plug structure located in the sensing chip. The sensing chip includes a first surface, a second surface opposite to the first surface, and a sensing area located on the first surface. The second surface of the sensing chip faces to a base plate. One end of the plug structure is electrically connected to the sensing area, and the other end of the plug structure is exposed by the second surface of the sensing chip.Type: GrantFiled: September 10, 2015Date of Patent: November 13, 2018Assignee: China Wafer Level CSP Co., Ltd.Inventors: Zhiqi Wang, Qiong Yu, Wei Wang
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Patent number: 10108837Abstract: A fingerprint recognition chip packaging structure and a packaging method. The packaging structure includes: a substrate, which is provided with a substrate surface; a sensor chip coupled on the surface of the substrate, where the sensor chip is provided with a first surface and a second surface opposite the first surface, the first surface of the sensor chip is provided with a sensing area, and the second surface of the sensor chip is arranged on the surface of the substrate; and, a lamination layer arranged on the surface of the substrate and on the surface of the sensor chip, where the lamination layer covers the surface of the sensing area of the sensor chip, a portion of the lamination layer located at the surface of the sensing area is of a preset thickness, and the material of the lamination layer is a polymer.Type: GrantFiled: June 30, 2015Date of Patent: October 23, 2018Assignee: China Wafer Level CSP Co., Ltd.Inventors: Zhiqi Wang, Qiong Yu, Wei Wang
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Patent number: 10096643Abstract: A packaging structure and a packaging method for a fingerprint identification chip are provided. The packaging structure includes a substrate, a sensing chip, a wire and a plastic encapsulation layer. The substrate is provided with a first solder pad layer. The sensing chip has a first surface and a second surface opposite to the first surface, the first surface comprises a sensing area and a peripheral area surrounding the sensing area, and the surface of the sensing chip in the peripheral area is provided with a second solder pad layer. Two ends of the wire are electrically connected to the first solder pad layer and the second solder pad layer respectively. The plastic encapsulation layer is made of a polymer, the plastic encapsulation layer surrounds the wire and the sensing chip.Type: GrantFiled: June 30, 2015Date of Patent: October 9, 2018Assignee: China Wafer Level CSP Co., Ltd.Inventors: Zhiqi Wang, Qiong Yu, Wei Wang
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Patent number: 10090217Abstract: A chip packaging method and package structure, the package structure including a substrate, a sensing chip coupled to the substrate, a plastic package layer located on the substrate, and a covering layer located on the plastic package layer and a first surface of the sensing chip; the sensing chip including the first surface and a second surface opposite to the first surface, and further including a sensing area located on the first surface; the second surface of the sensing chip faces towards the substrate; and the plastic package layer encloses the sensing chip, and the surface of the plastic package layer is flush with the first surface of the sensing chip.Type: GrantFiled: September 10, 2015Date of Patent: October 2, 2018Assignee: China Wafer Level CSP Co., Ltd.Inventors: Zhiqi Wang, Qiong Yu, Wei Wang
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Publication number: 20180129848Abstract: A chip packaging structure and a chip packaging method are provided. The chip packaging structure includes: a substrate; a sensing chip coupled to the substrate, where the sensing chip includes a first surface and a second surface facing away from the first surface, the sensing chip further includes a sensing region located in the first surface, and the second surface of the sensing chip faces to the substrate; and a molding layer located on the substrate and a portion of the first surface of the sensing chip, where the molding layer exposes the sensing region.Type: ApplicationFiled: September 15, 2015Publication date: May 10, 2018Applicant: China Wafer Level CSP Co., Ltd.Inventors: Zhiqi Wang, Ying Yang, Qiong Yu, Wei Wang
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Publication number: 20180114048Abstract: A chip packaging method and a chip packaging structure are provided. The packaging structure includes: a substrate; a sensing chip coupled to the substrate, the sensing chip including a first surface, a second surface, and a sensing area at the first surface, the second surface facing the substrate; a cover plate on the sensing area, the cover plate-having a third surface-in contact with the sensing area, and a fourth surface; and a plastic package layer on the substrate, the plastic package layer surrounding the sensing chip and covering part of the sidewall of the cover plate, the surface of the plastic package layer being higher than the third surface and lower than the fourth surface.Type: ApplicationFiled: September 16, 2015Publication date: April 26, 2018Applicant: China Wafer Level CSP Co., Ltd.Inventors: Zhiqi Wang, Ying Yang, Qiong Yu, Wei Wang
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Publication number: 20180108585Abstract: A chip package and packaging method are provided. The package includes: a substrate; a sensing chip coupled with the substrate, where the sensing chip has a first surface and a second surface opposite to the first surface and facing the substrate, where the sensing chip includes a sensing area arranged on the first surface and a peripheral area surrounding the sensing area, where the peripheral area is provided with a groove, and surfaces of sidewall and bottom of the groove and a surface of the peripheral area are provided with a rewiring layer, and the groove is exposed from sidewall of the sensing chip; and a plastic packaging layer arranged on the substrate, where the plastic packaging layer surrounds the sensing chip and fills the groove, and a surface of the sensing area is exposed from the plastic packaging layer.Type: ApplicationFiled: September 16, 2015Publication date: April 19, 2018Applicant: China Wafer Level CSP Co., Ltd.Inventors: Zhiqi Wang, Ying Yang, Qiong Yu, Wei Wang
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Publication number: 20180047772Abstract: A method for forming an image sensor package and an image sensor package are provided. The method includes: providing a first substrate and a second substrate which includes a first surface and a second surface opposite to the first surface, and attaching either surface of the first substrate with the first surface of the second substrate with an adhesive layer; forming a groove at the second surface of the second substrate; providing a base which includes a first surface and a second surface opposite to the first surface, where the first surface of the base is provided with a sensing region and multiple contact pads; and attaching the second surface of the second substrate with the first surface of the base, where a cavity is formed between the groove and the base, and the sensing region is located within the cavity.Type: ApplicationFiled: September 21, 2015Publication date: February 15, 2018Applicant: China Wafer Level CSP Co., Ltd.Inventors: Zhiqi Wang, Qiong Yu, Wei Wang
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Publication number: 20170287797Abstract: A chip packaging method and package structure, the package structure including a substrate, a sensing chip coupled to the substrate, a plastic package layer located on the substrate, and a covering layer located on the plastic package layer and a first surface of the sensing chip; the sensing chip including the first surface and a second surface opposite to the first surface, and further including a sensing area located on the first surface; the second surface of the sensing chip faces towards the substrate; and the plastic package layer encloses the sensing chip, and the surface of the plastic package layer is flush with the first surface of the sensing chip.Type: ApplicationFiled: September 10, 2015Publication date: October 5, 2017Applicant: China Wafer Level CSP Co., Ltd.Inventors: Zhiqi Wang, Qiong Yu, Wei Wang
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Publication number: 20170284837Abstract: A chip package structure and packaging method are provided. The chip package structure includes a sensing chip, a covering layer located on the first surface of the sensing chip, and a plug structure located in the sensing chip. The sensing chip includes a first surface, a second surface opposite to the first surface, and a sensing area located on the first surface. The second surface of the sensing chip faces to a base plate. One end of the plug structure is electrically connected to the sensing area, and the other end of the plug structure is exposed by the second surface of the sensing chip.Type: ApplicationFiled: September 10, 2015Publication date: October 5, 2017Applicant: China Wafer Level CSP Co., Ltd.Inventors: Zhiqi Wang, Qiong Yu, Wei Wang
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Patent number: 9748162Abstract: A chip package and a method for forming the same are provided. The method includes: providing a first chip, wherein the first chip comprises a first surface and a second surface, and a first plurality of pads are disposed on the first surface; providing a second chip, wherein the second chip comprises a third surface and a fourth surface, a second plurality of pads are disposed on the third surface; combining the second surface of the first chip and the third surface of the second chip, wherein the second plurality of pads are out of the combination area of the first chip and the second chip; and forming a first insulation layer, wherein the first insulation layer covers the first chip, and is combined with the second chip. Processes of the method are simple, and the chip package is small.Type: GrantFiled: January 6, 2015Date of Patent: August 29, 2017Assignee: China Wafer Level CSP Co., Ltd.Inventors: Zhiqi Wang, Junjie Li, Ying Yang, Qiong Yu, Wei Wang
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Publication number: 20170162620Abstract: A packaging structure and a packaging method for a fingerprint identification chip are provided. The packaging structure includes a substrate, a sensing chip, a wire and a plastic encapsulation layer. The substrate is provided with a first solder pad layer. The sensing chip has a first surface and a second surface opposite to the first surface, the first surface comprises a sensing area and a peripheral area surrounding the sensing area, and the surface of the sensing chip in the peripheral area is provided with a second solder pad layer. Two ends of the wire are electrically connected to the first solder pad layer and the second solder pad layer respectively. The plastic encapsulation layer is made of a polymer, the plastic encapsulation layer surrounds the wire and the sensing chip.Type: ApplicationFiled: June 30, 2015Publication date: June 8, 2017Applicant: China Wafer Level CSP Co., Ltd.Inventors: Zhiqi WANG, Qiong YU, Wei WANG
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Publication number: 20170147851Abstract: A fingerprint recognition chip packaging structure and a packaging method. The packaging structure includes: a substrate, which is provided with a substrate surface; a sensor chip coupled on the surface of the substrate, where the sensor chip is provided with a first surface and a second surface opposite the first surface, the first surface of the sensor chip is provided with a sensing area, and the second surface of the sensor chip is arranged on the surface of the substrate; and, a lamination layer arranged on the surface of the substrate and on the surface of the sensor chip, where the lamination layer covers the surface of the sensing area of the sensor chip, a portion of the lamination layer located at the surface of the sensing area is of a preset thickness, and the material of the lamination layer is a polymer.Type: ApplicationFiled: June 30, 2015Publication date: May 25, 2017Applicant: China Wafer Level CSP Co., Ltd.Inventors: Zhiqi Wang, Qiong Yu, Wei Wang
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Publication number: 20170140195Abstract: A fingerprint recognition chip packaging structure and a packaging method. The packaging structure includes: a substrate provided with a substrate surface; a sensor chip coupled on the surface of the substrate, where the sensor chip is provided with a first surface and a second surface opposite the first surface, the first surface of the sensor chip is provided with a sensing area, and the second surface of the sensor chip is arranged on the surface of the substrate; a capping layer arranged on the surface of the sensing area of the sensor chip, where the material of the capping layer is a polymer; and, a lamination layer arranged on the surface of the substrate and that of the sensor chip, where the lamination layer exposes the capping layer. The packaging structure allows for reduced requirements on the sensitivity of the sensor chip, thus broadening applications.Type: ApplicationFiled: June 30, 2015Publication date: May 18, 2017Applicant: China Wafer Level CSP Co., Ltd.Inventors: Zhiqi Wang, Qiong Yu, Wei Wang
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Patent number: 9601531Abstract: A wafer level packaging structure for image sensors and a wafer level packaging method for image sensors are provided. The wafer level packaging structure includes: a wafer to be packaged including multiple chip regions and scribe line regions between the chip regions; pads and image sensing regions located on a first surface of the wafer and located in the chip regions; first dike structures covering surfaces of the pads and the scribe line regions; a packaging cover arranged facing the first surface of the wafer; and second dike structures located on a surface of the packaging cover. The second dike structures are arranged corresponding to the scribe line regions. The packaging cover and the wafer are jointed fixedly via the second dike structures and the first dike structures.Type: GrantFiled: August 1, 2014Date of Patent: March 21, 2017Assignee: China Wafer Level CSP Co., Ltd.Inventors: Zhiqi Wang, Qiong Yu, Wei Wang