Abstract: A nitride-based semiconductor device includes a first nitride-based semiconductor layer, a second nitride-based semiconductor layer, a third nitride-based semiconductor layer, a passivation layer, a gate insulator layer, and a gate electrode. The first nitride-based semiconductor layer includes at least two doped barrier regions defining an aperture between the doped barrier regions. The second nitride-based semiconductor layer is disposed over first nitride-based semiconductor layer. The third nitride-based semiconductor layer is disposed on the second nitride-based semiconductor layer and has a bandgap higher than a bandgap of the second nitride-based semiconductor layer. The passivation layer is disposed over the third nitride-based semiconductor layer, in which a vertical projection of the passivation layer on the first nitride-based semiconductor layer is spaced apart from the aperture. The gate insulator layer is disposed over the third nitride-based semiconductor layer.

Abstract: A nitride-based semiconductor circuit including a first semiconductor substrate, a second semiconductor substrate, a nitride-based heterostructure, connectors, a first patterned conductive layer, a second patterned conductive layer, and connecting vias is provided. The second substrate is disposed on the first substrate. The first substrate has first dopants, and the second substrate has second dopants, which is different from the first dopants, and a pn junction is formed between the first substrate and the second substrate. The nitride-based heterostructure is disposed on the second substrate. The connectors are disposed on the nitride-based heterostructure. The first and second patterned conductive layers are disposed on the connectors. The connecting vias include a first interconnection and a second interconnection. The first interconnection electrically connects the first substrate to one of the connectors.

Abstract: A semiconductor device includes a gate electrode, first and second passivation layers, first and second field plates. The gate electrode is disposed above nitride-based semiconductor layers. The first passivation layer covers the gate electrode. The first field plate is disposed on the first passivation layer. The first passivation layer has a first portion covered with the first field plate and a second portion free from coverage of the first field plate. The second passivation layer covers the first field plate. The second field plate is disposed over the second passivation layer. The second passivation has a first portion covered with the second field plate and a second portion is free from coverage of the second field plate. A thickness difference between the first and second portions of the first passivation layer is less than a thickness difference between the first and second portions of the second passivation layer.

Abstract: A nitride-based semiconductor device includes a first nitride-based semiconductor layer, a nitride-based multiple semiconductor layer, a gate electrode, a gate insulator layer, and a source electrode. The first nitride-based semiconductor layer includes a drift region and at least two doped barrier regions defining an aperture in the drift region. The nitride-based multiple semiconductor layer structure is disposed over the first nitride-based semiconductor layer and has a first heterojunction and a second heterojunction which are separated from each other. The gate electrode is received by the nitride-based multiple semiconductor layer structure and vertically aligns with the aperture in the drift region. The gate insulator layer is disposed between the nitride-based multiple semiconductor layer structure and the gate electrode.

Abstract: A nitride-based bidirectional switching device is for working with a battery protection controller having a power input terminal, a discharge over-current protection (DO) terminal, a charge over-current protection (CO) terminal, a voltage monitoring (VM) terminal and a ground terminal. The nitride-based bidirectional switching device includes a dual gate transistor. The dual gate transistor includes a first and a second source electrodes and a first and a second gate structures. The first source electrode is configured for electrically connecting to a ground terminal of the battery protection controller. The second source electrode is configured for connecting to the VM terminal of the controller through a voltage monitoring resistor. The first gate structure is configured for electrically connecting to the DO terminal of the battery protection controller. The second gate structure is configured for electrically connecting to the CO terminal of the battery protection controller.

Abstract: The semiconductor device includes a first nitride-based semiconductor layer, a second nitride-based semiconductor layer, a first source/drain (S/D) electrode, a second S/D electrode, a first gate electrode, a second gate electrode, a first passivation layer, a conductive layer, and a second passivation layer. The second nitride-based semiconductor layer is disposed on the first nitride-based semiconductor layer. The first and second S/D electrodes and the first and second gate electrodes are disposed above the second nitride-based semiconductor layer. The first passivation layer covers the first and second gate electrodes. The conductive layer is disposed over the first passivation layer and includes an electrode portion and a field plate portion. The second passivation layer is disposed on the conductive layer and penetrates the conductive layer to make contact with the first passivation layer.

Abstract: A semiconductor device includes a first and a second nitride-based semiconductor layers, a first and a second electrodes, a first gate electrode, a first and a second field plates. The first field plate is disposed over the second nitride-based semiconductor layer and extends from a region between the first electrode and the first gate electrode to a region directly over the first gate electrode. The second field plate is disposed over the second nitride-based semiconductor layer and extends from a region between the first electrode and the first field plate to a region directly over the first field plate. The second field plate is horizontally spaced away from the first gate electrode.

Abstract: A semiconductor device includes a first nitride-based semiconductor layer, a second nitride-based semiconductor layer, a first gate electrode, a first S/D electrode, and a first field plate. The second nitride-based semiconductor layer is disposed on the first nitride-based semiconductor layer. The first and second nitride-based semiconductor layers collectively have an active portion and an electrically isolating portion that is non-semi-conducting and surrounds the active portion to form at least two interfaces extending along a first direction and spaced apart from each other by the active portion. The first gate electrode and the first S/D electrode are disposed above the second nitride-based semiconductor layer. The first field plate is disposed above the second nitride-based semiconductor layer and extends along the second direction and across the two interfaces such that the field plate extends to the electrically isolating portion, and overlaps with the first gate electrode near the interfaces.

Abstract: Semiconductor device structures and methods for manufacturing the same are provided. The semiconductor device structure includes a substrate, a first nitride semiconductor layer, a second nitride semiconductor layer, a barrier layer, a third nitride semiconductor layer and a gate structure. The first nitride semiconductor layer is disposed on the substrate. The second nitride semiconductor layer is disposed on the first nitride semiconductor layer and has a bandgap greater than that of the first nitride semiconductor layer. The barrier layer is disposed on the second nitride semiconductor layer and has a bandgap greater than that of the second nitride semiconductor layer. The third nitride semiconductor layer is doped with impurity and disposed on the barrier layer. The gate structure is disposed on the third nitride semiconductor layer.

Abstract: A flip-chip semiconductor package with improved heat dissipation capability and low package profile is provided. The package comprises a heat sink having a plurality of heat dissipation fins and a plurality of heat dissipation leads. The heat dissipation leads are connected to a plurality of thermally conductive vias of a substrate so as to provide thermal conductivity path from the heatsink to the substrate as well as support the heatsink to relieve compressive stress applied to a semiconductor die by the heatsink. The package further comprises an encapsulation layer configured to cover the heat dissipation leads of the heat sink and expose the heat dissipation fins of the heat sink.

Abstract: The present disclosure provides a nitride-based bidirectional switching device with substrate potential management capability. The device has a control node, a first power/load node, a second power/load node and a main substrate, and comprises: a nitride-based bilateral transistor and a substrate potential management circuit configured for managing a potential of the main substrate. By implementing the substrate potential management circuit, the substrate potential can be stabilized to a lower one of the potentials of the first source/drain and the second source/drain of the bilateral transistor no matter in which directions the bidirectional switching device is operated. Therefore, the bilateral transistor can be operated with a stable substrate potential for conducting current in both directions.

Abstract: Some embodiments of the disclosure provide a semiconductor device. The semiconductor device includes: a doped substrate; a barrier layer, disposed on the doped substrate; a channel layer, disposed between the doped substrate and the barrier layer; and a doped semiconductor structure, disposed in the doped substrate, where a band gap of the barrier layer is greater than a band gap of the channel layer, and the doped substrate and the doped semiconductor structure have different polarities.

Abstract: A semiconductor device includes a channel layer, a barrier layer, source contact and a drain contact, a doped group III-V layer, and a gate electrode. The barrier layer is positioned above the channel layer. The source contact and the drain contact are positioned above the barrier layer. The doped group III-V layer is positioned above the barrier layer and between the first drain contact and the first source contact. The first doped group III-V layer has a first non-vertical sidewall and a second non-vertical sidewall. The gate electrode is positioned above the doped group III-V layer and has a third non-vertical sidewall and a fourth non-vertical sidewall. A horizontal distance from the first non-vertical sidewall to the third non-vertical sidewall is different than a horizontal distance from the second non-vertical sidewall to the fourth non-vertical sidewall.

Abstract: The present disclosure provides a semiconductor device and a fabrication method thereof. The semiconductor device includes a III-V material layer, a first gate, a second gate, and a first passivation layer. The first gate and the second gate are on the III-V material layer. The first passivation layer is on the first gate. A first activation ratio of an element in the first gate is different from a second activation ratio of the element in the second gate.

Abstract: A nitride-based bidirectional switching device is provided for working with a battery protection controller having a power input terminal, a discharge over-current protection (DO) terminal, a charge over-current protection (CO) terminal, a voltage monitoring (VM) terminal and a ground terminal. The nitride-based bidirectional switching device comprises a nitride-based bidirectional switching element and an adaption module configured for receiving a DO signal and a CO signal from the battery protection controller and generating a main control signal for controlling the bidirectional switching element. By implementing the adaption circuit, the nitride-based bidirectional switching element can work with conventional battery protection controller for battery charging and discharging management. Therefore, a nitride-based battery management system can be realized with higher operation frequency as well as a more compact size.

Abstract: A nitride-based bidirectional switching device is provided for working with a battery protection controller having a power input terminal, a discharge over-current protection (DO) terminal, a charge over-current protection (CO) terminal, a voltage monitoring (VM) terminal and a ground terminal. The nitride-based bidirectional switching device comprises a nitride-based bidirectional switching element and an adaption module configured for receiving a DO signal and a CO signal from the battery protection controller and generating a main control signal for controlling the bidirectional switching element. By implementing the adaption circuit, the nitride-based bidirectional switching element can work with conventional battery protection controller for battery charging and discharging management. Therefore, a nitride-based battery management system can be realized with higher operation frequency as well as a more compact size.

Abstract: A semiconductor device includes a first and a second nitride-based semiconductor layers, a first and a second electrodes, a first and a second gate electrodes, a first and a second passivation layers and a conductive layer. The first passivation layer has a first portion covered with a first end portion of the first field plate and a second portion free from coverage of the first field plate. The second passivation layer has a first portion covered by the conductive layer and a second portion free from coverage of the conductive layer. A thickness difference between the first and the second portions of the first passivation layer is less than a thickness difference between the first and the second portions of the second passivation layer.

Abstract: A semiconductor device includes a channel layer, a barrier layer, source contact and a drain contact, a doped group III-V layer, and a gate electrode. The barrier layer is positioned above the channel layer. The source contact and the drain contact are positioned above the barrier layer. The doped group III-V layer is positioned above the barrier layer and between the first drain contact and the first source contact. The first doped group III-V layer has a first non-vertical sidewall and a second non-vertical sidewall. The gate electrode is positioned above the doped group III-V layer and has a third non-vertical sidewall and a fourth non-vertical sidewall. A horizontal distance from the first non-vertical sidewall to the third non-vertical sidewall is different than a horizontal distance from the second non-vertical sidewall to the fourth non-vertical sidewall.

Abstract: The present disclosure provides a nitride-based bidirectional switching device with substrate potential management capability. The device has a control node, a first power/load node, a second power/load node and a main substrate, and comprises: a nitride-based bilateral transistor and a substrate potential management circuit configured for managing a potential of the main substrate. By implementing the substrate potential management circuit, the substrate potential can be stabilized to a lower one of the potentials of the first source/drain and the second source/drain of the bilateral transistor no matter in which directions the bidirectional switching device is operated. Therefore, the bilateral transistor can be operated with a stable substrate potential for conducting current in both directions.

Abstract: Semiconductor device structures and methods for manufacturing the same are provided. The semiconductor device structure includes a substrate, a first nitride semiconductor layer, a second nitride semiconductor layer, a gate electrode, a first electrode, a first via and a second via. The substrate has a first surface and a second surface. The first nitride semiconductor layer is disposed on the first surface of the substrate. The second nitride semiconductor layer is disposed on the first nitride semiconductor layer and has a bandgap exceeding that of the first nitride semiconductor layer. The gate electrode and the first electrode are disposed on the second nitride semiconductor layer. The first via extends from the second surface and is electrically connected to the first electrode. The second via extends from the second surface. The depth of the first via is different from the depth of the second via.