Abstract: A light source system and a light-emitting device are provided. The light source system includes an array of light-emitting diodes, the light-emitting diodes including light-emitting diode chips; a collimating lens group located on a light path of light emitted by the array of the light-emitting diodes, the collimating lens group being configured to collimate light beams emitted by the light-emitting diode chips; and a fly-eye lens arranged on a light path of light outputted from the collimating lens group. The fly-eye lens includes micro lens units corresponding to the light-emitting diode chips, and for at least one light-emitting diode chip of the light-emitting diode chips, an image formed by each of at least one light-emitting diode chip on surfaces of the micro lens units is completely within a surface of one of the micro lens units. A ratio of side lobes is reduced, thereby improving the energy utilization rate.

Abstract: A system and a method is provided for assessing motion of a biological tissue of a subject including one or more superficial biological layers and a targeted biological layer. An optical perturbation is introduced within the one or more superficial biological layers but not within the targeted biological layer. A set of optical signal data is acquired preceding, during, or following the optical perturbation and, using the set of optical signal data, a set of optical characteristics is determined that is representative of light transiting the biological layers. Using the set of optical characteristics and a model of the biological layers, a target optical signal consistent with a target biological layer is separated and a movement of the desired biological tissue is determined using the target optical signal.

Abstract: A system and method for measuring and monitoring blood pressure is provided. The system includes a wearable device and a tonometry device coupled to the wearable device. The Tonometry device is configured to compress a superficial temporal artery (STA] of a user. A sensor pad is attached to the wearable device adjacent the tonometry device. A blood pressure sensor is integrated within the sensor pad for continuous, unobtrusive blood pressure monitoring.

Abstract: The present application provides a lithium niobate having a p-type nanowire region or an n-type nanowire region and a method for preparing the same. The method includes heating and then cooling a multi-domain lithium niobate crystal to confine hydrogen ions of the multi-domain lithium niobate crystal in domain wall regions; and poling the multi-domain lithium niobate crystal that has been heated by applying a voltage, to reverse a direction of polarization of one or more domains of the multi-domain lithium niobate crystal. The lithium niobate includes a lithium niobate crystal and a p-type nanowire region or an n-type nanowire region located in the lithium niobate crystal and adjacent to a surface of the lithium niobate crystal. The present application also provides a method for converting the charge carrier type of the lithium niobate nanowire region.

Abstract: Anchor tree cross-merge within a distributed storage system. A computer system identifies a data structure that includes (i) a root anchor tree and (ii) an ordered set of anchor trees that are ordered based on their creation, such that a last anchor tree of the ordered set of anchor trees is most-recently created. The data structure stores index data for a set of objects stored in a non-volatile storage. The computer system creates a new anchor tree in the ordered set of anchor trees. The computer system identifies, from a set of delta tables, index data representing one or more objects that are stored on the non-volatile storage. The computer system merges the index data representing the one or more objects into the new anchor tree.

Abstract: A method for generating a mask pattern to be employed in a patterning process. The method including obtaining (i) a first feature patch including a first polygon portion of an initial mask pattern, and (ii) a second feature patch including a second polygon portion of the initial mask pattern; adjusting the second polygon portion at a patch boundary between the first feature patch and the second feature patch such that a difference between the first polygon portion and the second polygon portion at the patch boundary is reduced; and combining the first polygon portion and the adjusted second polygon portion at the patch boundary to form the mask pattern.

Abstract: A method to determine a curvilinear pattern of a patterning device that includes obtaining (i) an initial image of the patterning device corresponding to a target pattern to be printed on a substrate subjected to a patterning process, and (ii) a process model configured to predict a pattern on the substrate from the initial image, generating, by a hardware computer system, an enhanced image from the initial image, generating, by the hardware computer system, a level set image using the enhanced image, and iteratively determining, by the hardware computer system, a curvilinear pattern for the patterning device based on the level set image, the process model, and a cost function, where the cost function (e.g., EPE) determines a difference between a predicted pattern and the target pattern, where the difference is iteratively reduced.

Abstract: This disclosure provides a semiconductor device, a method of manufacturing the same, a 3D NAND memory, and a memory system. The semiconductor device includes a substrate having a first trench at a surface thereof, and a first insulating layer formed on the surface of the substrate and inside the first trench. The first insulating layer formed inside the first trench forms a second trench that is embedded in the first trench. The semiconductor device further includes a conducting layer formed on a surface of the first insulating layer away from the substrate and inside the second trench.

Abstract: A driver metal-oxide-semiconductor field-effect transistor DrMOS, an integrated circuit, an electronic device, and a preparation method are provided. The DrMOS mainly includes a first die and a second die. The first die includes a drive circuit and a first switching transistor, and the drive circuit is connected to a gate of the first switching transistor. The second die includes a second switching transistor, and the drive circuit is connected to a gate of the second switching transistor through a first conductor. The drive circuit and the first switching transistor are prepared in a same die. This helps to reduce an area, loss, and costs of the DrMOS. The first switching transistor and the second switching transistor are prepared in different dies that reduces type selection limitation.

Abstract: A method for determining a patterning device pattern. The method includes obtaining (i) an initial patterning device pattern having at least one feature, and (ii) a desired feature size of the at least one feature, obtaining, based on a patterning process model, the initial patterning device pattern and a target pattern for a substrate, a difference value between a predicted pattern of the substrate image by the initial patterning device and the target pattern for the substrate, determining a penalty value related the manufacturability of the at least one feature, wherein the penalty value varies as a function of the size of the at least one feature, and determining the patterning device pattern based on the initial patterning device pattern and the desired feature size such that a sum of the difference value and the penalty value is reduced.

Abstract: Provided is a method and system for normalizing catalog item data to create higher quality search results. In one example, the method may include receiving a record comprising an unstructured description of an object, identifying a type of the object from among a plurality of object types and identifying a predefined attribute of the identified type of object, extracting a value from the unstructured description corresponding to the predefined attribute and modifying the extracted value to generate a normalized attribute value, and storing a structured record of the object in a structured format comprising a plurality of values of a plurality of attributes of the object from the unstructured description including the normalized attribute value for the predefined attribute of the object.

Abstract: A method of fabricating a semiconductor device includes forming a first shallow trench isolation structure in a first region of a substrate and second shallow trench isolation structures in a second region of the substrate. The method also includes forming a mask layer over the substrate, the first shallow trench isolation structure, and the second shallow trench isolation structures. The method further includes etching the mask layer and second shallow trench isolation structures in the second region sequentially to form a semiconductor protrusion between the second shallow trench isolation structures.

Abstract: A method for determining a mask pattern and a method for training a machine learning model. The method for determining a mask pattern includes obtaining, via executing a model using a target pattern to be printed on a substrate as an input pattern, a post optical proximity correction (post-OPC) pattern; determining, based on the post-OPC pattern, a simulated pattern that will be printed on the substrate; and determining the mask pattern based on a difference between the simulated pattern and the target pattern. The determining of the mask pattern includes modifying, based on the difference, the input pattern inputted to the model such that the difference is reduced; and executing, using the modified input pattern, the model to generate a modified post-OPC pattern from which the mask pattern can be derived.

Abstract: The present disclosure discloses a semiconductor device, a three-dimensional memory and a method for fabricating the semiconductor device. The method includes forming a shallow trench isolation trench in a substrate. The substrate comprises an active region including a source region, a channel region, and a drain region. The shallow trench isolation trench is located on a periphery of the active region of the substrate. The method further comprises forming a bottom isolating layer in a bottom portion of the shallow trench isolation trench, forming a gate structure on a channel region of the substrate, and forming a hard insulating layer in an upper portion of the shallow trench isolation trench and on sidewalls of the active region, such that the hard insulating layer covers a source region and a drain region of the substrate.

Abstract: The application belongs to the field of natural medicines, and particularly relates to a Tibetan four-ingredient lung-clearing mixture, its raw material consists of Rhododendron anthopogonoidesoides, Gentiana flower, Berberis bark and Herba Corydalis to obtain extracts thereof as an active ingredient. The combination of Rhododendron anthopogonoidesoides, Gentiana flower, Berberis bark and Herba Corydalis could realize synergy effects in effectively improving the anti-inflammatory effects and treatment effects of chronic obstructive pneumonia, and could also improve the lung injury repair function.

Abstract: The disclosure provides a semiconductor device and a method for fabricating the same, a three-dimensional memory apparatus and a memory system. The semiconductor device includes: a substrate including a first region and a second region, the first region being formed with a recess; a first shallow trench isolation structure and a second shallow trench isolation structure located in the first region and the second region respectively; and a first gate oxide layer on the recess and a second gate oxide layer in the second region and on the second shallow trench isolation structure.

Abstract: A method for determining a patterning device pattern. The method includes obtaining (i) an initial patterning device pattern having at least one feature, and (ii) a desired feature size of the at least one feature, obtaining, based on a patterning process model, the initial patterning device pattern and a target pattern for a substrate, a difference value between a predicted pattern of the substrate image by the initial patterning device and the target pattern for the substrate, determining a penalty value related the manufacturability of the at least one feature, wherein the penalty value varies as a function of the size of the at least one feature, and determining the patterning device pattern based on the initial patterning device pattern and the desired feature size such that a sum of the difference value and the penalty value is reduced.

Abstract: A method of determining a mask pattern for a target pattern to be printed on a substrate. The method includes partitioning a portion of a design layout including the target pattern into a plurality of cells with reference to a given location on the target pattern; assigning a plurality of variables within a particular cell of the plurality of cells, the particular cell including the target pattern or a portion thereof; and determining, based on values of the plurality of variables, the mask pattern for the target pattern such that a performance metric of a patterning process utilizing the mask pattern is within a desired performance range.

Abstract: This application provides an insulated gate bipolar transistor, a motor control unit, and a vehicle. The insulated gate bipolar transistor includes three device structure feature layers that are laminated. An IGBT device structure feature layer (10) and an RC-IGBT device structure feature layer (30) are respectively arranged on two sides of an SJ device structure feature layer (20). The RC-IGBT device structure feature layer (30) includes a collector (12) and a drain (13) that are disposed at a same layer. The insulated gate bipolar transistor further includes a first metal electrode (15) laminated with and electrically connected to the collector (12), and a second metal electrode (14) laminated with and electrically connected to the drain (13), and the first metal electrode (15) is electrically isolated from the second metal electrode (14).

Abstract: A battery exchange method is implemented in a control device communicatively coupled to a work machine and a battery exchange device. The method includes receiving a battery exchange request from the work machine, calculating a synchronization location and a synchronization time of the work machine and the battery exchange device, generating pre-judgment information, sending the pre judgment information and a synchronization command to the battery exchange device to control the battery exchange device to move toward the work machine according to the pre-judgment information and the synchronization command, continually receiving the first status information from the work machine and second status information from the battery exchange device, determining whether synchronization of the work machine and the battery exchange device is complete, and sending a battery exchange command to the battery exchange device to control the battery exchange device to exchange the battery of the work machine.