Patents by Inventor R. Buchanan

R. Buchanan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6644939
    Abstract: A hydraulic transmission pump assembly including a pump, an electric motor operatively coupled to the pump, and a differential gear assembly interposed between the two. The differential gear assembly acts to divide engine torque between the pump and the electric motor at engine speeds above a predetermined level thereby providing fluid under pressure to the transmission and driving the electric motor to generate electricity; the electric motor also being operable to drive the pump at engine speeds below the predetermined level thereby providing fluid under pressure to the transmission during this operating condition.
    Type: Grant
    Filed: August 17, 2001
    Date of Patent: November 11, 2003
    Assignee: BorgWarner, Inc.
    Inventors: William Vukovich, Mark R. Buchanan
  • Patent number: 6634866
    Abstract: A hydraulic transmission pump assembly adapted to provide fluid under pressure to predetermined components in a transmission including a one-way clutch assembly operatively coupled to the pump and an electric motor operatively coupled to the one-way clutch. The one-way clutch is operatively connected to an engine to provide motive power the pump and the electric motor at engine speeds above a predetermined level thereby providing fluid under pressure to the transmission and driving the electric motor to generate electricity. The electric motor is operable to drive the pump at engine speeds below the predetermined level to provide fluid under pressure to the transmission during this operating condition.
    Type: Grant
    Filed: August 17, 2001
    Date of Patent: October 21, 2003
    Assignee: BorgWarner, Inc.
    Inventors: William Vukovich, Mark R. Buchanan
  • Publication number: 20030153621
    Abstract: This invention relates to the regulation of vascular endothelium biocompatibility and to the inhibition of vessel wall cell and other types of cell hyperplasia following vessel wall dysfunction and/or injury More particularly, the invention relates to the dietetic and pharmaceutical preparations of 13-hydroxyoctadeca-9Z, 11E-dienoic acid (13-HODE) and its use in reducing or inhibiting vessel wall hyperplasia and restoring vessel wall biocompatibility.
    Type: Application
    Filed: February 13, 2003
    Publication date: August 14, 2003
    Inventors: Michael R Buchanan, David Horrobin
  • Patent number: 6556676
    Abstract: The invention provides an adapter card for use with a computing apparatus executing in a multitasking environment program elements that implement call-related functional units requiring DSP (Digital Signal Processor) resources. In a specific example, the call-related functional units provide voice recognition services, IP (Internet Protocol) telephony and voice message, among others. The adapter card includes a switch that receives voice signals from one or more telephone lines physically connected to the adapter card. A digital signal processor is provided on the adapter card and can receive an audio signal from the switch for processing. When anyone of the call-related functional units needs access to the resources of the DSP, it issues a control signal to the switch that responds by directing the audio signal that is to be processed by the call-related functional unit to the digital signal processor.
    Type: Grant
    Filed: July 12, 1999
    Date of Patent: April 29, 2003
    Assignee: Nortel Networks Limited
    Inventors: Chris R. Buchanan, Dick H. Keilty, Steven James Rhodes, Kevin MacNeill, Richard Martin
  • Publication number: 20030035742
    Abstract: A hydraulic transmission pump assembly including a pump, an electric motor operatively coupled to the pump, and a differential gear assembly interposed between the two. The differential gear assembly acts to divide engine torque between the pump and the electric motor at engine speeds above a predetermined level thereby providing fluid under pressure to the transmission and driving the electric motor to generate electricity; the electric motor also being operable to drive the pump at engine speeds below the predetermined level thereby providing fluid under pressure to the transmission during this operating condition.
    Type: Application
    Filed: August 17, 2001
    Publication date: February 20, 2003
    Inventors: William Vukovich, Mark R. Buchanan
  • Publication number: 20030035734
    Abstract: A hydraulic transmission pump assembly adapted to provide fluid under pressure to predetermined components in a transmission including a one-way clutch assembly operatively coupled to the pump and an electric motor operatively coupled to the one-way clutch. The one-way clutch is operatively connected to an engine to provide motive power the pump and the electric motor at engine speeds above a predetermined level thereby providing fluid under pressure to the transmission and driving the electric motor to generate electricity. The electric motor is operable to drive the pump at engine speeds below the predetermined level to provide fluid under pressure to the transmission during this operating condition.
    Type: Application
    Filed: August 17, 2001
    Publication date: February 20, 2003
    Inventors: William Vukovich, Mark R. Buchanan
  • Publication number: 20030030069
    Abstract: The present invention provides a high voltage semiconductor device capable of withstanding excessive breakdown and clamping voltages. The device includes a high resistivity substrate, and an epitaxially grown, low resistivity layer having a stress-relieving dopant. During production, the low conductivity region has one surface that is etched before a high conductivity region is diffused into it or epitaxially deposited on it.
    Type: Application
    Filed: August 7, 2001
    Publication date: February 13, 2003
    Inventors: Roman J. Hamerski, Walter R. Buchanan
  • Publication number: 20030006472
    Abstract: An improved Schottky device, having a low resistivity layer of semiconductor material, a high resistivity layer of semiconductor material and a buried dopant region positioned in the high resistivity layer utilized to reduce reverse leakage current. The low resistivity layer can be an N+ material while the high resistivity layer can be an N− layer. The buried dopant region can be of P+ material, thus forming a PN junction with an associated charge depletion zone in the N− layer and an associated low reverse leakage current. The location of the P+ material allows for a full Schottky barrier between the N− material and a barrier metal to be maintained, thus the device experiences a low forward voltage drop.
    Type: Application
    Filed: August 29, 2002
    Publication date: January 9, 2003
    Inventors: Walter R. Buchanan, Roman J. Hamerski
  • Patent number: 6500741
    Abstract: An electrical device such as a diode usable in high voltage applications wherein the electrical device is fabricated from a method which yields a plurality of high voltage electrical devices, the present method including providing a substrate of a semiconductor material having a predetermined substrate conductive type, the substrate being typically formed from a monocrystalline growth method, forming a second epitaxial layer contiguous with the upper surface of the substrate, the epitaxial layer having a predetermined second layer conductive type, and thereafter forming a top layer of dopant material in a predetermined pattern upon the upper surface of the second epitaxial layer. This predetermined pattern of dopant material typically takes the form of an array of patches which can be achieved through either a masking and etching process, or through a screen printing process.
    Type: Grant
    Filed: March 28, 2002
    Date of Patent: December 31, 2002
    Assignee: Fabtech, Inc.
    Inventors: Walter R. Buchanan, Roman J. Hamerski
  • Patent number: 6479885
    Abstract: An electrical device such as a diode usable in high voltage applications wherein the electrical device is fabricated from a method which yields a plurality of high voltage electrical devices, the present method including providing a substrate of a semiconductor material having a predetermined substrate conductive type, the substrate being typically formed from a monocrystalline growth method, forming a second epitaxial layer contiguous with the upper surface of the substrate, the epitaxial layer having a predetermined second layer conductive type, and thereafter forming a top layer of dopant, material in a predetermined pattern upon the upper surface of the second epitaxial layer. This predetermined pattern of dopant material typically takes the form of an array of patches which can be achieved through either a masking and etching process, or through a screen printing process.
    Type: Grant
    Filed: March 28, 2002
    Date of Patent: November 12, 2002
    Assignee: Fabtech, Inc.
    Inventors: Walter R. Buchanan, Roman J. Hamerski
  • Patent number: 6462393
    Abstract: An improved Schottky device, having a low resistivity layer of semiconductor material, a high resistivity layer of semiconductor material and a buried dopant region positioned in the high resistivity layer utilized to reduce reverse leakage current. The low resistivity layer can be an N+ material while the high resistivity layer can be an N− layer. The buried dopant region can be of P+ material, thus forming a PN junction with an associated charge depletion zone in the N− layer and an associated low reverse leakage current. The location of the P+ material allows for a full Schottky barrier between the N− material and a barrier metal to be maintained, thus the device experiences a low forward voltage drop.
    Type: Grant
    Filed: March 20, 2001
    Date of Patent: October 8, 2002
    Assignee: FabTech, Inc.
    Inventors: Walter R. Buchanan, Roman J. Hamerski
  • Publication number: 20020135038
    Abstract: An improved Schottky device, having a low resistivity layer of semiconductor material, a high resistivity layer of semiconductor material and a buried dopant region positioned in the high resistivity layer utilized to reduce reverse leakage current. The low resistivity layer can be an N+ material while the high resistivity layer can be an N− layer. The buried dopant region can be of P+ material, thus forming a PN junction with an associated charge depletion zone in the N− layer and an associated low reverse leakage current. The location of the P+ material allows for a full Schottky barrier between the N− material and a barrier metal to be maintained, thus the device experiences a low forward voltage drop.
    Type: Application
    Filed: March 20, 2001
    Publication date: September 26, 2002
    Inventors: Walter R. Buchanan, Roman J. Hamerski
  • Publication number: 20020105055
    Abstract: An electrical device such as a diode usable in high voltage applications wherein the electrical device is fabricated from a method which yields a plurality of high voltage electrical devices, the present method including providing a substrate of a semiconductor material having a predetermined substrate conductive type, the substrate being typically formed from a monocrystalline growth method, forming a second epitaxial layer contiguous with the upper surface of the substrate, the epitaxial layer having a predetermined second layer conductive type, and thereafter forming a top layer of dopant material in a predetermined pattern upon the upper surface of the second epitaxial layer. This predetermined pattern of dopant material typically takes the form of an array of patches which can be achieved through either a masking and etching process, or through a screen printing process.
    Type: Application
    Filed: March 28, 2002
    Publication date: August 8, 2002
    Inventors: Walter R. Buchanan, Roman J. Hamerski
  • Publication number: 20020105044
    Abstract: A diode (20), having first and second conductive layers (24,26), a conductive pad (28), and a distributed reverse surge guard (22), provides increased protection from reverse current surges. The surge guard (22) includes an outer loop (42) of P+-type surge guard material and an inner grid (44) of linear sections (46, 48) which form a plurality of inner loops extending inside the outer loop (42). The surge guard (22) distributes any reverse current over the area of the conductive pad (28) to provide increased protection from transient threats such as electrostatic discharge (ESD) and during electrical testing.
    Type: Application
    Filed: March 11, 2002
    Publication date: August 8, 2002
    Inventors: Walter R. Buchanan, Roman J. Hamerski, Wayne A. Smith
  • Publication number: 20020100796
    Abstract: This disclosure describes a technique for fusing self-fluxing metallic coatings on non-cylindrical objects without the need to conduct the fuse operation in a vacuum furnace or some other type of protective environment. The technique consists of first applying the self-fluxing coating to the surface, then optionally applying a ceramic coating on top of the self-fluxing coating. The object is then submerged into a vessel containing a low-melting inert material. The aggregate is then heated, and as the glass becomes molten, it encases the object and protects it from oxidation. As heating continues, the fusing temperature is reached and the self-fluxing alloy becomes molten. The ceramic coating encases the self-fluxing alloy and acts as a mold. When fusing is complete, the aggregate is then slowly cooled to ambient temperature. The glass frit and the ceramic shell are then removed, and one is left with an object coated with a uniform thickness of a dense adherent fused coating on the surface of the object.
    Type: Application
    Filed: January 22, 2002
    Publication date: August 1, 2002
    Applicant: Cincinnati Thermal Spray, Inc.
    Inventor: Edward R. Buchanan
  • Publication number: 20020098632
    Abstract: An electrical device such as a diode usable in high voltage applications wherein the electrical device is fabricated from a method which yields a plurality of high voltage electrical devices, the present method including providing a substrate of a semiconductor material having a predetermined substrate conductive type, the substrate being typically formed from a monocrystalline growth method, forming a second epitaxial layer contiguous with the upper surface of the substrate, the epitaxial layer having a predetermined second layer conductive type, and thereafter forming a top layer of dopant material in a predetermined pattern upon the upper surface of the second epitaxial layer. This predetermined pattern of dopant material typically takes the form of an array of patches which can be achieved through either a masking and etching process, or through a screen printing process.
    Type: Application
    Filed: March 28, 2002
    Publication date: July 25, 2002
    Inventors: Walter R. Buchanan, Roman J. Hamerski
  • Patent number: 6376346
    Abstract: An electrical device such as a diode usable in high voltage applications wherein the electrical device is fabricated from a method which yields a plurality of high voltage electrical devices, the present method including providing a substrate of a semiconductor material having a predetermined substrate conductive type, the substrate being typically formed from a monocrystalline growth method, forming a second epitaxial layer contiguous with the upper surface of the substrate, the epitaxial layer having a predetermined second layer conductive type, and thereafter forming a top layer of dopant material in a predetermined pattern upon the upper surface of the second epitaxial layer. This predetermined pattern of dopant material typically takes the form of an array of patches which can be achieved through either a masking and etching process, or through a screen printing process.
    Type: Grant
    Filed: September 28, 2000
    Date of Patent: April 23, 2002
    Assignee: FabTech, Inc.
    Inventors: Walter R. Buchanan, Roman J. Hamerski
  • Patent number: 6105796
    Abstract: A checkout lane blocker and merchandising display stand having a base member, a plurality of wheels located below the base member, an outer shell providing walls on top of the base member, an internal support structure disposed on the base member and including a stepped shelf, and a plurality of merchandise display trays disposed on top of the stepped shelf for holding merchandise for display. The outer shell, internal support structure, and merchandise trays are preferably made of corrugated material and the display therefore is lightweight, inexpensive, and easily recycled. The lane blocker merchandising display may be easily moved into position to block a checkout lane in a store when the checkout lane is closed.
    Type: Grant
    Filed: March 2, 1999
    Date of Patent: August 22, 2000
    Assignee: Eveready Battery Company, Inc.
    Inventors: Gregory R. Buchanan, Daniel E. Hagood
  • Patent number: D436266
    Type: Grant
    Filed: December 21, 1998
    Date of Patent: January 16, 2001
    Assignee: Eveready Battery Company, Inc.
    Inventors: Gregory R. Buchanan, Daniel E. Hagood
  • Patent number: D450485
    Type: Grant
    Filed: July 10, 2000
    Date of Patent: November 20, 2001
    Assignee: Eveready Battery Company, Inc.
    Inventors: Gregory R. Buchanan, Daniel E. Hagood