Abstract: A CMOS integrated imager system formed on a single IC having a first mode in which the system operates using on-chip logic to generate complex timing on-chip and to use that timing for operation and also having a second mode of operation in which the on-chip logic is bypassed and an external timing system is used.

Abstract: An electronic exposure control system for an active pixel CMOS image sensor includes a row decoder and a column decoder for respective row-wise and column-wise addressing of the image signal generating pixels. The decoders receive row and column addresses and control signals from a controller. The row addresses received by the row decoder are alternately switched between a predetermined row address for resetting the image signals of pixels in said row and another predetermined spaced apart row address for enabling the image signals of pixels in said selected row to be read out by the column decoder. By providing a predetermined sequence of row addresses, a “rolling shutter” can be created and/or the exposure time of the pixels can be selected to be different from the time to expose an entire frame. The image sensor can also be operated in an interlaced mode and/or specific areas on the image sensor can be selected to be reset and read out.

Abstract: An image sensing device comprising active pixels is disclosed, each pixel having a charge accumulation region for collecting charges generated by a photosensitive element such as a photodiode. Fixed pattern noise is minimized by utilizing a reference current to reset the pixels and to generate an output current signal.

Abstract: Apparatus and method for providing a select line decimated output signal from a charge domain imaging device by way of a shift register comprising a linear portion of serially connected image data holding elements connected at select elements along the length thereof, respectively, to groups of image data holding elements arranged in carousels.