Patents by Inventor R. Freeman
R. Freeman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20090087523Abstract: A system and method are provided for flaking grains. The system and method provide for an automated system to minimize manual intervention, yet optimize a steam flaking process. A calibration technique may be included to assist in automatic adjustment of system parameters to account for less than optimal operating conditions. Control of the system may occur from a remote location wherein a user is provided an interface, and a user's computer communicates with an industrial controller such as a PLC, through the Internet or a private network. The PLC is typically located at the site where the grain is to be processed. The PLC may receive various system inputs and generate system control outputs in accordance with programs installed on the PLC, or through some selected manual intervention as controlled by the user at the remote location.Type: ApplicationFiled: September 28, 2007Publication date: April 2, 2009Inventors: Steve R. Freeman, Charles H. Hoff
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Publication number: 20090081617Abstract: A target positioning tool for use during the scanning of a dental preparation enables an operator to ensure that the preparation is always properly positioned. In one embodiment, the tool comprises an outer circle and a pair of arcs that are positioned back-to-back. The arcs enable the operator to correctly align the scan to the preparation or with a preparation margin. Preferably, the size of the circle is constant and remains so as the view moves in and out on the display screen.Type: ApplicationFiled: September 20, 2008Publication date: March 26, 2009Applicant: D4D TECHNOLOGIES, LLCInventors: Glen R. Freeman, Gary L. Severance
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Patent number: 7478119Abstract: A system for mapping memory of a computer system includes a sorter, a partitioner, and a mapper. The sorter sorts a physical memory space to obtain a sorted virtual memory space, where the physical memory space includes a plurality of memory patterns, wherein each of the plurality of memory patterns is associated with a physical device and includes at least one memory block, wherein the at least one memory block is contiguous and addressable, and the plurality of memory patterns are arranged based on a predefined number of occurrences of each memory pattern, size of contiguous memory address ranges in each of the plurality of memory patterns, size of contiguous memory address ranges in each of the plurality of memory patterns, and arrangement of contiguous address ranges in each of the plurality of memory patterns.Type: GrantFiled: July 3, 2006Date of Patent: January 13, 2009Assignee: Sun Microsystems, Inc.Inventors: Michael H. Paleczny, Olaf Manczak, Christopher A. Vick, Jay R. Freeman, Phyllis E. Gustafson
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Patent number: 7474813Abstract: A compact optical isolator includes a polarizer, a Faraday rotator, and an analyzer that are arranged in series. A magnet is also included to provide a magnetic field to the Faraday rotator. The outer edges of the polarizer, Faraday rotator, and analyzer are preferably parallel to each other and to the optical path of the incoming light beam so that the optical aperture through the optical isolator is maximized. In addition, each of the polarizer, the Faraday rotator, and the analyzer have at least one facet in the optical path of the light beam that is tilted from perpendicular with respect to the light beam such that reflections are avoided. The analyzer may have a wedge shape such that one surface mates level with an optical fiber and the opposing surface is tilted to prevent reflections. Alternatively, a wedge-shaped block may be located between the analyzer and the optical fiber.Type: GrantFiled: April 30, 2004Date of Patent: January 6, 2009Assignee: Finisar CorporationInventors: Ming Shi, Steve Wang, William R. Freeman
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Patent number: 7449453Abstract: A method of prevention or treatment of a cholesterol-associated tumor is provided which comprises administering a therapeutically effective amount of an azetidinone-based cholesterol absorption inhibitor, preferably ezetimibe (SCH 58235) and/or its phenolic glucuronide, or at least one ezetimibe analog, e.g., SCH 48461 and SCH 58053, to a patient wherein the patient is either at risk of developing a cholesterol-associated tumor or already exhibits a cholesterol-associated tumor. Formulations of ezetimibe are also provided for the prevention or treatment of a cholesterol-associated tumor further comprising at least one other anticancer agent.Type: GrantFiled: July 13, 2006Date of Patent: November 11, 2008Assignees: Karykion Inc., Children's Medical Center CorporationInventors: Carl P. Schaffner, Keith R. Solomon, Michael R. Freeman
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Patent number: 7408121Abstract: A raceway system having forwardly open channel-shaped base members with opposed longitudinally extending side walls, and the side walls including inwardly and rearwardly projecting marginal edge flanges, the improvement wherein the raceway covers must be slid into these elongated base members to define at least one wireway therebetween, the covers including clips with wing portions adapted for nesting relationship between the base side walls and the base marginal edge flanges, whereby the covers cannot be disassembled from the base members as a result of flexing the base side walls, but must be disassembled by sliding them apart. These clips also include leg portions that extend well inside the base to prevent attempts to push the cover into the base, and thereby spread the base side walls to gain access to the interior wireway(s).Type: GrantFiled: November 14, 2006Date of Patent: August 5, 2008Assignee: The Wiremold CompanyInventors: Andrew J. Halliday, Kenneth R. Freeman, Jr., Paul H. Adams
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Publication number: 20080110671Abstract: A raceway system having forwardly open channel-shaped base members with opposed longitudinally extending side walls, and the side walls including inwardly and rearwardly projecting marginal edge flanges, the improvement wherein the raceway covers must be slid into these elongated base members to define at least one wireway therebetween, the covers including clips with wing portions adapted for nesting relationship between the base side walls and the base marginal edge flanges, whereby the covers cannot be disassembled from the base members as a result of flexing the base side walls, but must be disassembled by sliding them apart. These clips also include leg portions that extend well inside the base to prevent attempts to push the cover into the base, and thereby spread the base side walls to gain access to the interior wireway(s).Type: ApplicationFiled: November 14, 2006Publication date: May 15, 2008Applicant: THE WIREMOLD COMPANYInventors: Andrew J. Halliday, Kenneth R. Freeman, Paul H. Adams
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Patent number: 7364772Abstract: A vapor deposition source for use in vacuum chamber for coating an organic layer on a substrate of an OLED device, includes a manifold including side and bottom walls defining a chamber for receiving organic material, and an aperture plate disposed between the side walls, the aperture plate having a plurality of spaced apart apertures for emitting vaporized organic material; the aperture plate including conductive material which in response to an electrical current produces heat; means for heating the organic material to a temperature which causes its vaporization, and heating the side walls of the manifold; and an electrical insulator coupling the aperture plate to the side walls for concentrating heat in the unsupported region of the aperture plate adjacent to the apertures, whereby the distance between the aperture plate and the substrate can be reduced to provide high coating thickness uniformity on the substrate.Type: GrantFiled: March 22, 2004Date of Patent: April 29, 2008Assignee: Eastman Kodak CompanyInventors: Michael Long, Jeremy M. Grace, Bruce E. Koppe, Dennis R. Freeman, Neil P. Redden, Robert F. Zwaap
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Patent number: 7361593Abstract: Exemplary embodiments of the present invention illustrate methods to electrically connect multiple layers of a substrate. A first and second layer each has at least one electrical trace on a surface thereof. The substrate includes an interposer structure attached to the second layer and separating the first and second layers on at least a portion of a perimeter of the first and second layers. The method includes a steps for forming a via in the first layer, placing a first electrically conductive substance in the via, placing a second electrically conductive substance on the second layer adjacent said via, and heating an area around said via and said second electrically conductive substance until said first and second electrically conductive substances at least partially melt to form the electrical connection.Type: GrantFiled: December 30, 2004Date of Patent: April 22, 2008Assignee: Finisar CorporationInventors: William R. Freeman, Hong Jin Jiang
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Publication number: 20080034371Abstract: A method for detecting a dependence violation in an application that involves executing a plurality of sections of the application in parallel, and logging memory transactions that occur while executing the plurality of sections to obtain a plurality of logs and a plurality of temporary results, where the plurality of logs is compared while executing the plurality of sections to determine whether the dependence violation exists.Type: ApplicationFiled: June 26, 2006Publication date: February 7, 2008Applicant: Sun Microsystems, Inc.Inventors: Phyllis E. Gustafson, Miguel Angel Lujan Moreno, Michael H. Paleczny, Christopher A. Vick, Olaf Manczak, Jay R. Freeman
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Patent number: 7325967Abstract: A method and apparatus are provided for administering micro-ingredient feed additives to animal feed rations. The apparatus may be referred to as a system which includes a number of discrete components which cooperate together to ultimately deliver micro-ingredients to a desired location, such as a feed mixer containing a feed ration. Structure is provided for storing, measuring, dispensing, and pneumatically conveying the micro-ingredients. Measuring of the micro-ingredients may be achieved by loss in weight, gain in weight, or volumetric metering methods. Pneumatic transport may be achieved either by a single transport line, or a plurality of transport lines. The system is operated by a control unit which controls components of the system to achieve delivery of specified amounts and types of micro-ingredients to the feed ration.Type: GrantFiled: July 31, 2003Date of Patent: February 5, 2008Inventors: Charles H. Hoff, Steve R. Freeman
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Publication number: 20080005498Abstract: A method for committing memory transactions in an application that includes executing a plurality of sections of the application in parallel, logging a plurality of memory transactions that occur while executing the plurality of sections to obtain a plurality of logs and a plurality of temporary results, wherein the plurality of memory transactions that includes a plurality of writes to at least one memory location, comparing the plurality of logs to identify an optimal list of writes from the plurality of writes, and committing memory transactions corresponding to a subset of the plurality of temporary results, wherein the subset of the plurality of temporary results is identified by the optimal list of writes.Type: ApplicationFiled: June 9, 2006Publication date: January 3, 2008Applicant: Sun Microsystems, Inc.Inventors: Miguel Angel Lujan Moreno, Phyllis E. Gustafson, Michael H. Paleczny, Christopher A. Vick, Jay R. Freeman, Olaf Manczak
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Publication number: 20080005526Abstract: A system for mapping memory of a computer system includes a sorter, a partitioner, and a mapper. The sorter sorts a physical memory space to obtain a sorted virtual memory space, where the physical memory space includes a plurality of memory patterns, wherein each of the plurality of memory patterns is associated with a physical device and includes at least one memory block, wherein the at least one memory block is contiguous and addressable, and the plurality of memory patterns are arranged based on a predefined number of occurrences of each memory pattern, size of contiguous memory address ranges in each of the plurality of memory patterns, size of contiguous memory address ranges in each of the plurality of memory patterns, and arrangement of contiguous address ranges in each of the plurality of memory patterns.Type: ApplicationFiled: July 3, 2006Publication date: January 3, 2008Applicant: Sun Microsystems, Inc.Inventors: Michael H. Paleczny, Olaf Manczak, Christopher A. Vick, Jay R. Freeman, Phyllis E. Gustafson
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Patent number: 7308008Abstract: A system and method for controlling the temperature of a heat-generating component such as a laser. A microelectromechanical system for controlling the temperature of the heat-generating component includes a magnetic heat sink device, a temperature sensor, and control circuitry. The temperature sensor detects the temperature of the heat-generating component through the heat sink and feeds the sensed temperature to the control circuitry. The detected temperature is compared to a predetermined temperature set point. When the detected temperature is higher than the temperature set point, a command is sent to the magnetic heat sink to take more heat out of the heat-generating component. When the detected temperature is lower than the temperature set point, a command is sent to the magnetic heat sink to take less heat out of the heat-generating component.Type: GrantFiled: November 10, 2003Date of Patent: December 11, 2007Assignee: Finisar CorporationInventors: William R. Freeman, Hong Jin Jiang, Dallas Meyer
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Publication number: 20070280041Abstract: A method and system are provided for administering micro-ingredient feed additives wherein controlled access is provided to the bins or containers that store the micro-ingredients prior to delivery thereby preventing inadvertent errors in adding incorrect micro-ingredients to a feed ration as well as to provide a measure of security to prevent tampering with the micro-ingredients in the bins. A micro-ingredient delivery system typically includes a plurality of bins that store designated micro-ingredients therein. Each bin may have a locking device thereby restricting access to the bin, along with a switch indicating whether the bin access cover is open or closed. A master controller of the delivery system provides signals to lock or unlock the locking devices based upon authorizations provided to access the bins in accordance with the particular operating parameters and requirements of the delivery system.Type: ApplicationFiled: June 5, 2006Publication date: December 6, 2007Inventors: John E. Adent, Steve R. Freeman
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Publication number: 20070283115Abstract: The use of a token-based memory protection technique may provide memory protection in a computer system employing memory virtualization. A token-based memory protection technique may include assigning a unique identifier to an application, process, or thread, and associating the identifier with a block of memory allocated to that application, process, or thread. Subsequent to assigning the identifier, a packet requesting access to that block of memory may include a token to be compared to the identifier. A memory controller may be configured to associate the identifier with the block of memory and to compare the token in the memory request packet to the identifier before granting access. If a second block of memory is subsequently allocated to the application, process, or thread, the identifier may be disassociated with the first block of memory and associated with the second block of memory.Type: ApplicationFiled: June 5, 2006Publication date: December 6, 2007Applicant: Sun Microsystems, Inc.Inventors: Jay R. Freeman, Christopher A. Vick, Olaf Manczak, Michael H. Paleczny, Phyllis E. Gustafson
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Publication number: 20070283123Abstract: A computer system employing memory virtualization may employ a function-based technique for virtual-to-physical address translation. A function-based translation technique may involve replacing a generic trap handler and one or more translation table look-ups with a function to compute a corresponding physical address from a given virtual address. The computer system may be configured to determine a translation function dependent on mappings in one or more translation tables. The computer system may be configured to reorganize a memory, to reorganize one or more translation tables, or to allocate different blocks of memory to an application prior to determining a translation function. Different applications or threads executing on the computer system may employ different translation functions. Different regions of memory may be accessed using different translation functions. Some virtual addresses may be translated using a function while others may be translated using one or more translation table look-ups.Type: ApplicationFiled: June 5, 2006Publication date: December 6, 2007Applicant: Sun Microsystems, Inc.Inventors: Christopher A. Vick, Michael H. Paleczny, Olaf Manczak, Jay R. Freeman, Phyllis E. Gustafson
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Publication number: 20070283124Abstract: A computer system may employ a first memory virtualization and corresponding virtual-to-physical address translation technique for a first application executing on a processor and a second memory virtualization and corresponding virtual-to-physical address translation technique for a second application executing on the same processor transparent to the first application. Different virtualization and corresponding translation techniques may be employed on a per-thread basis, rather than a per-application basis. Different virtualization and corresponding translation techniques may be employed for accesses to different ranges of virtual or corresponding physical addresses. Different virtualization and corresponding translation techniques may employ different page sizes. A first or second virtualization and corresponding translation technique may include page-based, segment-based, or function-based virtual-to-physical address translation.Type: ApplicationFiled: June 5, 2006Publication date: December 6, 2007Applicant: Sun Microsystems, Inc.Inventors: Olaf Menczak, Christopher A. Vick, Michael H. Paleczny, Jay R. Freeman, Phyllis E. Gustafson
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Publication number: 20070283125Abstract: A computer system may be configured to dynamically select a memory virtualization and corresponding virtual-to-physical address translation technique during execution of an application and to dynamically employ the selected technique in place of a current technique without re-initializing the application. The computer system may be configured to determine that a current address translation technique incurs a high overhead for the application's current workload and may be configured to select a different technique dependent on various performance criteria and/or a user policy. Dynamically employing the selected technique may include reorganizing a memory, reorganizing a translation table, allocating a different block of memory to the application, changing a page or segment size, or moving to or from a page-based, segment-based, or function-based address translation technique.Type: ApplicationFiled: June 5, 2006Publication date: December 6, 2007Applicant: Sun Microsystems, Inc.Inventors: Olaf Manczak, Christopher A. Vick, Michael H. Paleczny, Jay R. Freeman, Phyllis E. Gustafson
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Patent number: 7264617Abstract: Flexible microconduits integral at a proximal end to a substrate and adapted for connection to a biological environment at the distal end are provided. Also provided are microsystems with at least one flexible microconduit integral at a proximal end to a substrate and with a distal end that is adapted for connection to a biological environment. The microconduits may be fluid conduits, electrical conduits, or electro-fluidic conduits that transmit both fluids and electrical signals. Methods for fabricating the microconduits and other structures integral with the substrate are also provided.Type: GrantFiled: February 28, 2001Date of Patent: September 4, 2007Inventor: Alex R. Freeman