Abstract: An autonomous citation indexing system which can be used as an assistant agent automates and enhances the task of finding publications in electronic form, including publications located on the world wide web. The system parses citations from papers and identifies citations to the same paper that may differ in syntax. The system also extracts and provides the context of citations to a given paper, allowing a researcher to determine what is published in other papers about a given paper. Common citations and word or string vector distance similarity are used to find related articles in a search.

Abstract: A connection control interface for switches in a network is provided. The connection control interface allows the multiservice switch to provide a number of switch resource partitions to a number of independent controllers coupled to the switch. The switch resource partitions comprise a number of subsets of switch resources that define a number of independent subset networks of a physical network. The connection control interface allows the independent controllers to control the connections of the switch using the number of switch resource partitions. The independent controllers each use one of a number of control systems, the control systems comprising a network software level. The independent controllers comprise a virtual switch interface having a master component and a slave component where the master and slave components may be hosted on different processors. The slave components may be hosted on a control card that controls a number of port cards of the switch or on a port card processor.

Abstract: A distributed tester method and system communicates test recipes for testing electronic devices from a host computer over a network to a test site. The test site translates test recipes into test instructions for execution by a test engine that determines the status of the electronic device. For instance, in a tester for testing memory, a test recipe is defined and stored with a host computer to determine test data for storage on the memory device under test at the test site. The host computer controls execution of the test recipe over the network. The test recipe is defined and stored in an XML formatted data file transmitted over the network to a processor at the test site. The test site processor translates the XML formatted data into test instructions for execution by a test engine. The test engine determines whether the memory device under test accurately stores data and provides the results, such as erroneously stored data, to the host computer through the network.

Abstract: A toe implant (10) for a first metatarsal phalangeal joint (22) between a metatarsal (24) and a proximal phalanx (26) of a great toe (12) includes a proximal stem (16), a distal stem (18) and a hinge (20) and a strength rib (92). Importantly, the toe implant (10) is designed to accommodate an axis of motion in a unique location (82) and the distal stem (18) is naturally positioned lower than the proximal stem (16). Further, the toe implant (10) provides a relatively good available range of motion. With this design, the toe implant (10) maintains the proximal phalanx (26) in the correct anatomic position relative to the metatarsal (24) during bending and flexing. Additionally, the toe implant (10) allows the toe (12) to move in a fashion that simulates the natural motion of the first metatarsal phalangeal joint (22). As a result thereof, the toe implant (10) that does not significantly increase the stress at the joint (22) or alter the normal flexing of the toe (12).

Abstract: A proofing substrate includes a proofing sheet layer of a lightweight paper and a carriage layer of a heavier weight paper attached to the proofing sheet. The proofing sheet can be yellow page stock that is used to print “yellow pages” portions of telephone directories. The proofing can alternatively be newsprint paper. The weights of the first and second layers are selected based on an aggregate weight of the two sheets. The carriage layer has a weight selected so that it can feed the proofing substrate through a desktop printer or copier. The proofing substrate has at least one adhesive layer to hold the carriage and the proofing sheet together.

Abstract: An autonomous citation indexing system which can be used as an assistant agent automates and enhances the task of finding publications in electronic form, including publications located on the world wide web. The system parses citations from papers and identifies citations to the same paper that may differ in syntax. The system also extracts and provides the context of citations to a given paper, allowing a researcher to determine what is published in other papers about a given paper. Common citations and word or string vector distance similarity are used to find related articles in a search.

Abstract: An apparatus and method are provided for testing component tolerances of a device for testing integrated circuits. The testing device is generally characterized by a plurality of test connectors disposed at a test head, wherein each test connector carries electrical signals for a test channel. Further, each test channel generally corresponds to a circuit board that includes at least one driver and one receiver. In this general type of tester, a system is provided that includes a specialized DUT board that establishes a low impedance electrical connection (i.e., short) between electrical conductors of a first and second test connector. Through this low impedance path, a first driver from a first circuit board is directly connected (i.e., shorted) to a first receiver on a second circuit board. A controller is configured to control the first driver to output an electrical signal at a predetermined time.

Abstract: A time conserving method of identifying width, depth, access time, control line configurations, and part type of any of a plurality of different synchronous memories. A nested loop process is used to develop, and apply to a synchronous memory being identified, trial control line configurations taken from ordered entries of tables representative of the plurality of synchronous memories. The width, depth, control line configurations, and part type are determined from the responses evoked from the synchronous memory being identified. The delay between a read command issued by the test system CPU and a reading of bit patterns from the synchronous memory is incremented in finite steps in successive write/read iterations until the bit pattern read is identified to the bit pattern written into the synchronous memory, thereby identifying the access time of the synchronous memory.

Abstract: A digital programmable delay which provides a series of pulses that are programmed in both pulse latency and trigger latency to control the operation of a memory module test system.

Abstract: A tester for use with a device under test includes a processor, a signal timing editor to create representations of signal waveforms and associated times, and a test program executable on the processor that schedules events based on information from the signal timing editor. The test program schedules different delays for the events to compensate for variations in time delays between different signals coupled to the device under test.

Abstract: A solenoid operated remote resetting device with a protective solenoid activation circuit is disclosed. The device includes a housing for enclosing and protecting a solenoid with a movable plunger, a movable mechanical operator having an operator arm extending through an opening defined in the housing and a circuit board on which a solenoid activation circuit is mounted. The solenoid activation circuit includes circuitry for protecting the solenoid from overheating due to intentional or unintentional prolonged current flow in the solenoid.

Abstract: A system and method for reducing voltage stabilization time in a leakage current test system, and thereby reducing the time for measuring leakage currents in the I/O pins of an IC chip including CMOS DRAMs is disclosed. The method and system of the present invention accelerates leakage current testing time by precharging the capacitance of the I/O pins under test to a voltage near the settled voltage level, before measuring leakage current at the I/O pin contact points of packaged IC chips and assembled IC modules, and indicating when an I/O pin is defective.

Abstract: An automated, portable, and time conservative memory test system for identifying test parameters including type, control line configuration, depth, width, access time, and burst features of any one of a wide variety of synchronous memories including SDRAMs and SGRAMs, and whether an IC chip, bank, board or module, without requiring hardware modifications or additions to the memory device being identified, and without requiring storage of test patterns or characterizing, data in the memory device.

Abstract: A high power water load for microwave and millimeter wave radio frequency sources has a front wall including an input port for the application of RF power, a cylindrical dissipation cavity lined with a dissipating material having a thickness which varies with depth, and a rear wall including a rotating reflector for the reflection of wave energy inside the cylindrical cavity. The dissipation cavity includes a water jacket for removal of heat generated by the absorptive material coating the dissipation cavity, and this absorptive material has a thickness which is greater near the front wall than near the rear wall. Waves entering the cavity reflect from the rotating reflector, impinging and reflecting multiple times on the absorptive coating of the dissipation cavity, dissipating equal amounts of power on each internal reflection.

Abstract: An automated, portable, and time conservative memory test system for identifying test parameters including type, control line configuration, depth, width, access time, and burst features of any one of a wide variety of synchronous memories including SDRAMs and SGRAMs, and whether an IC chip, bank, board or module, without requiring hardware modifications or additions to the memory device being identified, and without requiring storage of test patterns or characterizing data in the memory device.

Abstract: An automated, portable, and time conservative memory test system for identifying test parameters including type, control line configuration, depth, width, access time, and burst features of any one of a wide variety of synchronous memories including SDRAMs and SGRAMs, and whether an IC chip, bank, board or module, without requiring hardware modifications or additions to the memory device being identified, and without requiring storage of test patterns or characterizing data in the memory device.

Abstract: A solenoid operated remote resetting device with a protective solenoid activation circuit is disclosed. The solenoid activation circuit includes circuitry for protecting the solenoid from overheating due to intentional or unintentional prolonged current flow in the solenoid. The solenoid activation circuit receives an activation signal, in the form of an alternating current signal, from a remote activation means. The activation signal is coupled to a rectifier in the solenoid activation circuit that provides rectified DC power for the solenoid activation circuit. A solenoid power circuit is also coupled to the rectifier input such that the AC signal from the activation means can be rectified and passed to the solenoid positive DC signal. A timing circuit coupled between the rectifier output and the solenoid power circuit provides an active phase of a predetermined time and a blocking phase after each application of the activation signal.

Abstract: A method for replacing particles in a process that transfers particles is disclosed. This invention employs a seal zone which is in communication with two zones of the process and in which particles that are being added to the process are purged. This invention allows particles to be replaced without reducing the normal rate of particle transfer through the process, which results in a savings in downtime costs. This invention is adaptable to a multitude of processes for the catalytic conversion of hydrocarbons in which deactivated catalyst particles are regenerated.

Abstract: A regeneration process is described that eliminates or greatly reduces thermal channelling in a cooling zone bed. The method controls the flow rate of cooling gas independently of the requirements of the regeneration process for combusting coke and for halogenating or drying the catalyst. In one embodiment, a portion of a cooling stream is bypassed around a cooling zone and then passed to a drying zone. In another embodiment, one portion of a cooling stream from a cooling zone is vented, and another portion of the stream is passed to a drying zone.

Abstract: A nested loop method for use in a memory test system to identify the width, depth, control line configuration, and part type of a synchronous memory, wherein bit patterns are retrieved from tables representative of a plurality of synchronous memories during execution of nested loops, from outer loop to inner loop, in the order of bank loop, RE loop, CE loop, CS loop, DQMB loop, and part type loop, and bits of an entry of a table occurring after a given entry are either a member of a superset or do not intersect bits of previous entries, and bits of an entry preceding the given entry are either a member of a subset or do not intersect bits of the given entry.