Patents by Inventor R. Shekhar Narayanaswami

R. Shekhar Narayanaswami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Methods and apparatus for minimizing jitter in a clock synthesis circuit that uses feedback interpolation
    Patent number: 7436229
    Abstract: A frequency synthesis circuit includes a phase locked loop and an interpolator circuit. The phase locked loop circuit receives a reference clock and a feedback clock and generates an output clock with a frequency based on the reference clock and the feedback clock. An interpolator circuit is coupled in the feedback path of the phase locked loop circuit. An interpolator control circuit generates an interpolator control word that specifies a variable time delay for the interpolator circuit. The interpolator circuit receives the output clock, and generates the feedback clock by introducing a variable time delay in the output clock in accordance with the interpolator control word. The time variable delay varies the frequency of the output circuit. Embodiments for frequency synthesis circuits that include a spread spectrum frequency clock generator, frequency modulators, and a fixed frequency clock generator circuit are disclosed.
    Type: Grant
    Filed: September 26, 2007
    Date of Patent: October 14, 2008
    Assignee: Net Logic Microsystems, Inc.
    Inventors: Stefanos Sidiropoulos, Marc Loinaz, R. Shekhar Narayanaswami, Nikhil Acharya, Dean Liu
  • Methods and apparatus for frequency synthesis with feedback interpolation
    Patent number: 7432750
    Abstract: A frequency synthesis circuit includes a phase locked loop and an interpolator circuit. The phase locked loop circuit receives a reference clock and a feedback clock and generates an output clock with a frequency based on the reference clock and the feedback clock. An interpolator circuit is coupled in the feedback path of the phase locked loop circuit. An interpolator control circuit generates an interpolator control word that specifies a variable time delay for the interpolator circuit. The interpolator circuit receives the output clock, and generates the feedback clock by introducing a variable time delay in the output clock in accordance with the interpolator control word. The time variable delay varies the frequency of the output circuit. Embodiments for frequency synthesis circuits that include a spread spectrum frequency clock generator, frequency modulators, and a fixed frequency clock generator circuit are disclosed.
    Type: Grant
    Filed: December 7, 2005
    Date of Patent: October 7, 2008
    Assignee: NetLogic Microsystems, Inc.
    Inventors: Stefanos Sidiropoulos, Marc Loinaz, R. Shekhar Narayanaswami, Nikhil Acharya, Dean Liu
  • Methods and apparatus for generating multiple clocks using feedback interpolation
    Patent number: 7323916
    Abstract: A frequency synthesis circuit includes a phase locked loop and an interpolator circuit. The phase locked loop circuit receives a reference clock and a feedback clock and generates an output clock with a frequency based on the reference clock and the feedback clock. An interpolator circuit is coupled in the feedback path of the phase locked loop circuit. An interpolator control circuit generates an interpolator control word that specifies a variable time delay for the interpolator circuit. The interpolator circuit receives the output clock, and generates the feedback clock by introducing a variable time delay in the output clock in accordance with the interpolator control word. The time variable delay varies the frequency of the output circuit. Embodiments for frequency synthesis circuits that include a spread spectrum frequency clock generator, frequency modulators, and a fixed frequency clock generator circuit are disclosed.
    Type: Grant
    Filed: December 29, 2005
    Date of Patent: January 29, 2008
    Assignee: NetLogic Microsystems, Inc.
    Inventors: Stefanos Sidiropoulos, Marc Loinaz, R. Shekhar Narayanaswami, Nikhil Acharya, Dean Liu