Patents by Inventor Raanan Y. Zehavi

Raanan Y. Zehavi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6583377
    Abstract: Two silicon workpieces (20, 22) welded together into one member without the formation of cracks along the weld. It may be formed by a first method in which current (34, 36) is passed through one or both of the workpieces to heat them to between 600 and 900° C. Then an electric, laser, or plasma welder (38, 40) passes along the seam (24) between the workpieces to weld them together. In a second forming method, current (34) is passed through a plate (60), preferably formed of silicon, which either supports the workpieces or is brought into contact with at least one of them, whereby the workpieces are preheated prior to the welding operation.
    Type: Grant
    Filed: April 30, 2002
    Date of Patent: June 24, 2003
    Assignee: Integrated Materials, Inc.
    Inventors: Raanan Y. Zehavi, Robert L. Davis, David B. Ackard, James W. Govorko
  • Publication number: 20030089688
    Abstract: Two silicon workpieces (20, 22) welded together into one member without the formation of cracks along the weld. It may be formed by a first method in which current (34, 36) is passed through one or both of the workpieces to heat them to between 600 and 900° C. Then an electric, laser, or plasma welder (38, 40) passes along the seam (24) between the workpieces to weld them together. In a second forming method, current (34) is passed through a plate (60), preferably formed of silicon, which either supports the workpieces or is brought into contact with at least one of them, whereby the workpieces are preheated prior to the welding operation.
    Type: Application
    Filed: April 30, 2002
    Publication date: May 15, 2003
    Inventors: Raanan Y. Zehavi, Robert L. Davis, David B. Ackard, James W. Govorko
  • Publication number: 20030003686
    Abstract: A method of fabricating parts of silicon, preferably virgin polysilicon formed by chemical vapor deposition of silane, and assembling them into a complex structure, such as a silicon tower or boat for removably supporting a plurality of silicon wafers during thermal processing. The virgin polysilicon is annealed to above 1025° C. before it is machined into a predetermined shape. After machining, the silicon parts are annealed in an oxygen ambient. The machined parts are then assembled and joined together followed by another anneal of the assembled structure. A preferred embodiment of the tower includes four legs secured on their ends to two bases. A plurality of slots are cut in the legs allowing slidable insertion of the wafers and support for them. The bases may be either virgin poly or monocrystalline silicon and be either integral or composed of multiple parts.
    Type: Application
    Filed: August 22, 2002
    Publication date: January 2, 2003
    Inventors: James E. Boyle, Robert L. Davis, Laurence D. Delaney, Raanan Y. Zehavi
  • Patent number: 6455395
    Abstract: A method of fabricating the parts and assembling them into a complex structure, such as a silicon tower or boat for removably supporting a plurality of silicon wafers during thermal processing. A preferred embodiment of the tower includes four legs secured on their ends to two bases. A plurality of slots are cut in the legs allowing slidable insertion of the wafers and support for them. The legs preferably have a rounded wedge shape with a curved front surface of small radius cut with the slots and a back surface that is either flat or curved with a substantially larger radius. Preferably, the legs are machined from virgin polysilicon formed by chemical vapor deposition from silane. The bases may be either virgin poly or monocrystalline silicon and be either integral or composed of multiple parts. Virgin polysilicon is preferably annealed to above 1025° C. before machining. Silicon parts may be joined by applying a spin-on glass between the parts and annealing the assembly.
    Type: Grant
    Filed: June 30, 2000
    Date of Patent: September 24, 2002
    Assignee: Integrated Materials, Inc.
    Inventors: James E. Boyle, Robert L. Davis, Laurence D. Delaney, Raanan Y. Zehavi
  • Patent number: 6450346
    Abstract: A silicon tower or boat for removably supporting a plurality of silicon wafers during thermal processing. A preferred embodiment of the tower includes four legs secured on their ends to two bases. A plurality of slots are cut in the legs allowing slidable insertion of the wafers and support for them. The legs preferably have a rounded wedge shape with a curved front surface of small radius cut with the slots and a back surface that is either flat or curved with a substantially larger radius. Preferably, the legs are machined from virgin polysilicon formed by chemical vapor deposition from silane. The bases may be either virgin poly or monocrystalline silicon and be either integral or composed of multiple parts. Virgin polysilicon is preferably annealed to above 1025° C. before machining. Silicon parts may be joined by applying a spin-on glass between the parts and annealing the assembly. After assembly, the surface of a tower is subjected to sub-surface working.
    Type: Grant
    Filed: June 30, 2000
    Date of Patent: September 17, 2002
    Assignee: Integrated Materials, Inc.
    Inventors: James E. Boyle, Robert L. Davis, Laurence D. Delaney, Raanan Y. Zehavi
  • Publication number: 20020119641
    Abstract: A process for hydrogen annealing silicon wafers that have been cut from an ingot and polished on both sides, thereby removing crystal originated pits (COPs) in their surface. The wafers are then stacked in a tower having at least support surfaces made from virgin polysilicon, that is, polysilicon form by chemical vapor deposition, preferably from monosilane. The tower may include four virgin polysilicon legs have support teeth slotted along the legs and fixed at their opposed ends to bases. The wafers are supported at four equally distributed points at 0.707 of the wafer radius. The wafers so supported on the virgin polysilicon towers are annealed in a hydrogen ambient at 1250° C. for 12 hours.
    Type: Application
    Filed: February 26, 2001
    Publication date: August 29, 2002
    Inventors: Raanan Y. Zehavi, James E. Boyle, Laurence D. Delaney
  • Patent number: 6403914
    Abstract: A method and apparatus for welding together two silicon workpieces (20, 22) without the formation of cracks along the weld. In a first embodiment, current (34, 36) is passed through one or both of the workpieces to heat them to between 600 and 900° C. Then an electric, laser, or plasma welder (38, 40) passes along the seam (24) between the workpieces to weld them together. In a second embodiment, current (34) is passed through a plate (60), preferably formed of silicon, which either supports the workpieces or is brought into contact with at least one of them, whereby the workpieces are preheated prior to the welding operation.
    Type: Grant
    Filed: June 12, 2001
    Date of Patent: June 11, 2002
    Assignee: Integrated Materials, Inc.
    Inventors: Raanan Y. Zehavi, Robert L. Davis, David B. Ackard, James W. Govorko
  • Publication number: 20020053558
    Abstract: A method and apparatus for welding together two silicon workpieces (20, 22) without the formation of cracks along the weld. In a first embodiment, current (34, 36) is passed through one or both of the workpieces to heat them to between 600 and 900° C. Then an electric, laser, or plasma welder (38, 40) passes along the seam (24) between the workpieces to weld them together. In a second embodiment, current (34) is passed through a plate (60), preferably formed of silicon, which either supports the workpieces or is brought into contact with at least one of them, whereby the workpieces are preheated prior to the welding operation.
    Type: Application
    Filed: June 12, 2001
    Publication date: May 9, 2002
    Inventors: Raanan Y. Zehavi, Robert L. Davis, David B. Ackard, James W. Govorko
  • Patent number: 6284997
    Abstract: A method and apparatus for welding together two silicon workpieces (20, 22) without the formation of cracks along the weld. In a first embodiment, current (34, 36) is passed through one or both of the workpieces to heat them to between 600 and 900° C. Then an electric or plasma welder (38, 40) passes along the seam (24) between the workpieces to weld them together. In a second embodiment, current (34) is passed through a silicon plate (60) which either supports the workpieces or is brought into contact with at least one of them, whereby the workpieces are preheated prior to the welding operation.
    Type: Grant
    Filed: November 8, 2000
    Date of Patent: September 4, 2001
    Assignee: Integrated Materials, Inc.
    Inventors: Raanan Y. Zehavi, Robert L. Davis, David B. Ackard, James W. Govorko