Patents by Inventor Rabindra N. Das

Rabindra N. Das has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120031649
    Abstract: A substrate for use in a PCB or PWB board having a coreless buildup layer and at least one metal and at least one dielectric layer. The coreless buildup dielectric layers can consist of at least partially cured thermoset resin and thermoplastic resin. The substrate may also contain land grid array (LGA) packaging.
    Type: Application
    Filed: April 22, 2010
    Publication date: February 9, 2012
    Applicant: ENDICOTT INTERCONNECT TECHNOLOGIES, INC.
    Inventors: Timothy Antesberger, Rabindra N. Das, Frank D. Egitto, Voya R. Markovich, William E. Wilson
  • Publication number: 20120017437
    Abstract: A circuitized substrate which includes a conductive paste for providing electrical connections. The paste, in one embodiment, includes a metallic component including nano-particles and may include additional elements such as solder or other metal micro-particles, as well as a conducting polymer and organic. The particles of the paste composition sinter and, depending on what additional elements are added, melt as a result of lamination to thereby form effective contiguous circuit paths through the paste. A method of making such a substrate is also provided, as is an electrical assembly utilizing the substrate and including an electronic component such as a semiconductor chip coupled thereto.
    Type: Application
    Filed: October 4, 2011
    Publication date: January 26, 2012
    Applicant: ENDICOTT INTERCONNECT TECHNOLOGIES, INC.
    Inventors: Rabindra N. Das, Kostas I. Papathomas, Voya R. Markovich
  • Publication number: 20120015532
    Abstract: A flexible, high density decal and the use thereof methods of forming detachable electrical interconnections between a flexible chip carrier and a printed wiring board. The flexible decal has fine-pitch pads on a first surface and pads of a pitch wider than the fine pitch on a second surface, the fine-pitch pads on the first surface designed to electrically connect to a semiconductor device, and the wider-pitch pads on the second surface designed to electrically connect to a printed wiring board or the like. The pads on the first surface are conductively wired to the pads on the second surface through one or more insulating levels in the flexible decal.
    Type: Application
    Filed: July 16, 2010
    Publication date: January 19, 2012
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Voya R. Markovich, Ronald V. Smith, How T. Lin, Frank D. Egitto, Rabindra N. Das, William E. Wilson, Rajinder S. Rai
  • Patent number: 8063315
    Abstract: A circuitized substrate which includes a conductive paste for providing electrical connections. The paste, in one embodiment, includes a metallic component including nano-particles and may include additional elements such as solder or other metal micro-particles, as well as a conducting polymer and organic. The particles of the paste composition sinter and, depending on what additional elements are added, melt as a result of lamination to thereby form effective contiguous circuit paths through the paste. A method of making such a substrate is also provided, as is an electrical assembly utilizing the substrate and including an electronic component such as a semiconductor chip coupled thereto.
    Type: Grant
    Filed: May 23, 2007
    Date of Patent: November 22, 2011
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Rabindra N. Das, Kostas I. Papathomas, Voya R. Markovich
  • Patent number: 7897877
    Abstract: A capacitive substrate and method of making same in which first and second glass layers are used. A first conductor is formed on a first of the glass layers and a capacitive dielectric material is positioned over the conductor. The second conductor is then positioned on the capacitive dielectric and the second glass layer positioned over the second conductor. Conductive thru-holes are formed to couple to the first and second conductors, respectively, such that the conductors and capacitive dielectric material form a capacitor when the capacitive substrate is in operation.
    Type: Grant
    Filed: May 23, 2006
    Date of Patent: March 1, 2011
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Rabindra N. Das, Frank D. Egitto, John M. Lauffer, How T. Lin, Voya R. Markovich
  • Publication number: 20110043987
    Abstract: A method of making a circuitized substrate including a resistor comprised of material which includes a polymer resin and a quantity of nano-powders including a mixture of at least one metal component and at least one ceramic component. The ceramic component may be a ferroelectric ceramic and/or a high surface area ceramic and/or a transparent oxide and/or a dope manganite. Alternatively, the material will include the polymer resin and nano-powders, with the nano-powders comprising at least one metal coated ceramic and/or at least one oxide coated metal component. An electrical assembly (substrate and at least one electrical component) and an information handling system (e.g., personal computer) utilizing such a circuitized substrate are also provided.
    Type: Application
    Filed: November 3, 2010
    Publication date: February 24, 2011
    Inventors: Rabindra N. Das, John M. Lauffer, Voya R. Markovich
  • Publication number: 20110039212
    Abstract: A circuitized substrate which utilizes at least one internal (embedded) resistor as part thereof, the resistor comprised of a material including resin and a quantity of powders of nano-particle and/or micro-particle sizes. The resistor serves to decrease the capacitance in the formed circuit while only slightly increasing the high frequency resistance, thereby improving circuit performance through the substantial elimination of some discontinuities known to exist in structures like these. An electrical assembly (substrate and at least one electrical component) is also provided.
    Type: Application
    Filed: October 20, 2009
    Publication date: February 17, 2011
    Inventors: Rabindra N. Das, Michael J. Rowlands
  • Patent number: 7870664
    Abstract: A method of making a circuitized substrate including a resistor comprised of material which includes a polymer resin and a quantity of nano-powders including a mixture of at least one metal component and at least one ceramic component. The ceramic component may be a ferroelectric ceramic and/or a high surface area ceramic and/or a transparent oxide and/or a dope manganite. Alternatively, the material will include the polymer resin and nano-powders, with the nano-powders comprising at least one metal coated ceramic and/or at least one oxide coated metal component. An electrical assembly (substrate and at least one electrical component) and an information handling system (e.g., personal computer) utilizing such a circuitized substrate are also provided.
    Type: Grant
    Filed: May 2, 2007
    Date of Patent: January 18, 2011
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Rabindra N. Das, John M. Lauffer, Vova R. Markovich
  • Patent number: 7803688
    Abstract: A capacitive substrate and method of making same in which first and second glass layers are used. A first conductor is formed on a first of the glass layers and a capacitive dielectric material is positioned over the conductor. The second conductor is then positioned on the capacitive dielectric and the second glass layer positioned over the second conductor. Conductive thru-holes are formed to couple to the first and second conductors, respectively, such that the conductors and capacitive dielectric material form a capacitor when the capacitive substrate is in operation.
    Type: Grant
    Filed: March 2, 2009
    Date of Patent: September 28, 2010
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Rabindra N. Das, Frank D. Egitto, John M. Lauffer, How T. Lin, Voya R. Markovich
  • Patent number: 7791897
    Abstract: A multi-layer imbedded capacitance and resistance substrate core. At least one layer of resistance material is provided. The layer of resistance material has a layer of electrically conductive material embedded therein. At least one layer of capacitance material of high dielectric constant is disposed on the layer of resistance material. Thru-holes are formed by laser.
    Type: Grant
    Filed: September 9, 2008
    Date of Patent: September 7, 2010
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Rabindra N. Das, John M. Lauffer, Irving Memis, Steven G. Rosser
  • Publication number: 20100167210
    Abstract: A multi-layer imbedded capacitance and resistance substrate core. At least one layer of resistance material is provided. The layer of resistance material has a layer of electrically conductive material embedded therein. At least one layer of capacitance material of high dielectric constant is disposed on the layer of resistance material. Thru-holes are formed by laser.
    Type: Application
    Filed: March 10, 2010
    Publication date: July 1, 2010
    Applicant: ENDICOTT INTERCONNECT TECHNOLOGIES, INC.
    Inventors: Rabindra N. Das, John M. Lauffer, Irving Memis, Steven G. Rosser
  • Patent number: 7687724
    Abstract: A circuitized substrate which utilizes at least one internal (embedded) resistor as part thereof, the resistor comprised of a material including resin and a quantity of powders of nano-particle and/or micro-particle sizes. The resistor serves to decrease the capacitance in the formed circuit while only slightly increasing the high frequency resistance, thereby improving circuit performance through the substantial elimination of some discontinuities known to exist in structures like these. An electrical assembly (substrate and at least one electrical component) is also provided.
    Type: Grant
    Filed: June 4, 2007
    Date of Patent: March 30, 2010
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Rabindra N. Das, Michael J. Rowlands
  • Publication number: 20100060381
    Abstract: A multi-layer imbedded capacitance and resistance substrate core. At least one layer of resistance material is provided. The layer of resistance material has a layer of electrically conductive material embedded therein. At least one layer of capacitance material of high dielectric constant is disposed on the layer of resistance material. Thru-holes are formed by laser.
    Type: Application
    Filed: September 9, 2008
    Publication date: March 11, 2010
    Inventors: Rabindra N. Das, John M. Lauffer, Irving Memis, Steven G. Rosser
  • Publication number: 20090206051
    Abstract: A capacitive substrate and method of making same in which first and second glass layers are used. A first conductor is formed on a first of the glass layers and a capacitive dielectric material is positioned over the conductor. The second conductor is then positioned on the capacitive dielectric and the second glass layer positioned over the second conductor. Conductive thru-holes are formed to couple to the first and second conductors, respectively, such that the conductors and capacitive dielectric material form a capacitor when the capacitive substrate is in operation.
    Type: Application
    Filed: March 2, 2009
    Publication date: August 20, 2009
    Inventors: Rabindra N. Das, Frank D. Egitto, John M. Lauffer, How T. Lin, Voya R. Markovich
  • Patent number: 7541265
    Abstract: A material for use as part of an internal capacitor within a circuitized substrate includes a polymer (e.g., a cycloaliphatic epoxy or phenoxy based) resin and a quantity of nano-powders of ferroelectric ceramic material (e.g., barium titanate) having a particle size substantially in the range of from about 0.01 microns to about 0.90 microns and a surface area for selected ones of said particles within the range of from about 2.0 to about 20 square meters per gram. A circuitized substrate adapted for using such a material and capacitor therein and a method of making such a substrate are also provided. An electrical assembly (substrate and at least one electrical component) and an information handling system (e.g., personal computer) are also provided.
    Type: Grant
    Filed: January 10, 2005
    Date of Patent: June 2, 2009
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Rabindra N. Das, John M. Lauffer, Kostas I. Papathomas, Mark D. Poliks
  • Patent number: 7449381
    Abstract: A method of forming a capacitive substrate in which at least one capacitive dielectric layer of material is screen or ink jet printed onto a conductor and the substrate is thereafter processed further, including the addition of thru-holes to couple selected elements within the substrate to form at least two capacitors as internal elements of the substrate. The capacitive substrate may be incorporated within a larger circuitized substrate, e.g., to form an electrical assembly. A method of making an information handling system including such substrates is also provided.
    Type: Grant
    Filed: February 13, 2006
    Date of Patent: November 11, 2008
    Assignee: Endicott Interconect Technologies, Inc.
    Inventors: Rabindra N. Das, John M. Lauffer, How T. Lin, Voya R. Markovich
  • Patent number: 7442879
    Abstract: A circuitized substrate which includes a conductive paste for providing electrical connections. The paste, in one embodiment, includes a binder component and at least one metallic component including microparticles. In another embodiment, the paste includes the binder and a plurality of nano-wires. Selected ones of the microparticles or nano-wires include a layer of solder thereon. A method of making such a substrate is also provided, as are an electrical assembly and information handling system adapter for having such a substrate as part thereof.
    Type: Grant
    Filed: October 6, 2005
    Date of Patent: October 28, 2008
    Assignee: Endicott Interconect Technologies, Inc.
    Inventors: Rabindra N. Das, John M. Lauffer, Roy H. Magnuson, Voya R. Markovich
  • Publication number: 20080248596
    Abstract: A method of making a circuitized substrate which includes at least one and possibly several capacitors as part thereof. In one embodiment, the substrate is produced by forming a layer of capacitive dielectric material on a dielectric layer and thereafter forming channels with the capacitive material, e.g., using a laser. The channels are then filled with conductive material, e.g., copper, using selected deposition techniques, e.g., sputtering, electro-less plating and electroplating. A second dielectric layer is then formed atop the capacitor and a capacitor “core” results. This “core” may then be combined with other dielectric and conductive layers to form a larger, multilayered PCB or chip carrier. In an alternative approach, the capacitive dielectric material may be photo-imageable, with the channels being formed using conventional exposure and development processing known in the art.
    Type: Application
    Filed: July 26, 2007
    Publication date: October 9, 2008
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Rabindra N. Das, Frank D. Egitto, How T. Lin, John M. Lauffer, Voya R. Markovich
  • Patent number: 7429510
    Abstract: A method of forming a capacitive substrate in which at least one capacitive dielectric layer of material is screen or ink jet printed onto a conductor and the substrate is thereafter processed further, including the addition of thru-holes to couple selected elements within the substrate to form at least two capacitors as internal elements of the substrate. Photoimageable material is used to facilitate positioning of the capacitive dielectric being printed. The capacitive substrate may be incorporated within a larger circuitized substrate, e.g., to form an electrical assembly. A method of making an information handling system including such substrates is also provided.
    Type: Grant
    Filed: February 13, 2006
    Date of Patent: September 30, 2008
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Rabindra N. Das, John M. Lauffer, How T. Lin, Voya R. Markovich
  • Publication number: 20080151515
    Abstract: A method of making a circuitized substrate including a resistor comprised of material which includes a polymer resin and a quantity of nano-powders including a mixture of at least one metal component and at least one ceramic component. The ceramic component may be a ferroelectric ceramic and/or a high surface area ceramic and/or a transparent oxide and/or a dope manganite. Alternatively, the material will include the polymer resin and nano-powders, with the nano-powders comprising at least one metal coated ceramic and/or at least one oxide coated metal component. An electrical assembly (substrate and at least one electrical component) and an information handling system (e.g., personal computer) utilizing such a circuitized substrate are also provided.
    Type: Application
    Filed: May 2, 2007
    Publication date: June 26, 2008
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Rabindra N. Das, John M. Lauffer, Vova R. Markovich