Abstract: A semiconductor structure comprising a light emitting layer disposed between an n-type region and a p-type region is formed. A first metal contact is formed on a portion of the n-type region and a second metal contact is formed on a portion of the p-type region. The first and second metal contacts are formed on a same side of the semiconductor structure. A dielectric material is disposed between the first and second metal contacts. The dielectric material is in direct contact with a portion of the semiconductor structure, a portion of the first metal contact, and a portion of the second metal contact.

Abstract: A light emitting device comprises a flip-chip light emitting diode (LED) die mounted on a submount. The top surface of the submount has a reflective layer. Over the LED die is molded a hemispherical first transparent layer. A low index of refraction layer is then provided over the first transparent layer to provide TIR of phosphor light. A hemispherical phosphor layer is then provided over the low index layer. A lens is then molded over the phosphor layer. The reflection achieved by the reflective submount layer, combined with the TIR at the interface of the high index phosphor layer and the underlying low index layer, greatly improves the efficiency of the lamp. Other material may be used. The low index layer may be an air gap or a molded layer. Instead of a low index layer, a distributed Bragg reflector may be sputtered over the first transparent layer.

Abstract: A semiconductor structure comprising a light emitting layer disposed between an n-type region and a p-type region is formed. A portion of the light emitting layer and the p-type region are removed to expose a portion of the n-type region. A first metal contact is formed on an exposed portion of the n-type region and a second metal contact is formed on a remaining portion of the p-type region. The first and second metal contacts are formed on a same side of the semiconductor structure. A dielectric material is disposed between the first and second metal contacts. The dielectric material is in direct contact with a portion of the semiconductor structure, a portion of the first metal contact, and a portion of the second metal contact. A surface of the device is then planarized by removing a portion of at least one of the first metal contact, the second metal contact, and the dielectric material.

Abstract: One or more regions of graded composition are included in a III-P light emitting device, to reduce the Vf associated with interfaces in the device. In accordance with embodiments of the invention, a semiconductor structure comprises a III-P light emitting layer disposed between an n-type region and a p-type region. A graded region is disposed between the p-type region and a GaP window layer. The aluminum composition is graded in the graded region. The graded region may have a thickness of at least 150 nm. In some embodiments, in addition to or instead of a graded region between the p-type region and the GaP window layer, the aluminum composition is graded in a graded region disposed between an etch stop layer and the n-type region.

Abstract: An AlGaInP light emitting device is formed as a thin, flip chip device. The device includes a semiconductor structure comprising an AlGaInP light emitting layer disposed between an n-type region and a p-type region. N- and p-contacts electrically connected to the n- and p-type regions are both formed on the same side of the semiconductor structure. The semiconductor structure is connected to the mount via the contacts. The growth substrate is removed from the semiconductor structure and the thick transparent substrate is omitted, such that the total thickness of semiconductor layers in the device is less than 15 ?m in some embodiments, less than 10 ?m in some embodiments. The top side of the semiconductor structure may be textured.

Abstract: In some embodiments of the invention, a transparent substrate AlInGaP device includes an etch stop layer that may be less absorbing than a conventional etch stop layer. In some embodiments of the invention, a transparent substrate AlInGaP device includes a bonded interface that may be configured to give a lower forward voltage than a conventional bonded interface. Reducing the absorption and/or the forward voltage in a device may improve the efficiency of the device.

Abstract: A monolithically integrated, mode-locked vertical cavity surface emitting laser (VCSEL) for emitting ultrafast high power pulses. The resonator of the VCSEL has an active medium for emitting a radiation, a spacer for extending the resonator to a length L at which a significant number N of axial modes of the radiation are supported in the resonator and a saturable absorber for mode-locking. The VCSEL has an arrangement for stabilizing the resonator such that one transverse mode of the radiation is supported within the resonator. The VCSEL also has an arrangement for compensating dispersion of the radiation occurring in the resonator.

Abstract: A monolithically integrated, mode-locked vertical cavity surface emitting laser (VCSEL) for emitting ultrafast high power pulses. The resonator of the VCSEL has an active medium for emitting a radiation, a spacer for extending the resonator to a length L at which a significant number N of axial modes of the radiation are supported in the resonator and a saturable absorber for mode-locking. The VCSEL has an arrangement for stabilizing the resonator such that one transverse mode of the radiation is supported within the resonator. The VCSEL also has an arrangement for compensating dispersion of the radiation occurring in the resonator.