Patents by Inventor Raghavan V. Venugopal

Raghavan V. Venugopal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170123702
    Abstract: A technique for providing backup power can include determining a backup power demand of at least two nodes on a chassis, each node supporting multiple loads. A technique for providing backup power can include selectively enabling an output of power from a battery module to the at least two nodes.
    Type: Application
    Filed: April 1, 2014
    Publication date: May 4, 2017
    Inventors: Vincent NGUYEN, Han WANG, Patrick A. RAYMOND, Raghavan V. VENUGOPAL
  • Publication number: 20170052582
    Abstract: Examples herein disclose receiving a communication indicating a number of loads supported by multiple nodes and determining an amount of power available at a backup power source. Based on the determination of the amount of power, the examples disclose delivering power to the multiple nodes from the backup power source.
    Type: Application
    Filed: April 28, 2014
    Publication date: February 23, 2017
    Inventors: Hai Ngoc Nguyen, Han Wang, Patrick A. Raymond, Raghavan V. Venugopal
  • Publication number: 20170046226
    Abstract: Processing data in a distributed data storage system generates a sparse check matrix correlating data elements to data syndromes. The system receives notification of a failed node in the distributed data storage system, accesses the sparse check matrix, and determines from the sparse check matrix a correlation between a data element and a syndrome. The system processes a logical operation on the data element and the syndrome and recovers the failed node.
    Type: Application
    Filed: June 17, 2014
    Publication date: February 16, 2017
    Inventors: Han Wang, Joseph E. Foster, Patrick A. Raymond, Raghavan V. Venugopal
  • Publication number: 20160349822
    Abstract: Examples herein disclose determining when a battery module is below a full charge and selecting a subset of loads based on a prioritization among multiple loads. The selected subset of loads is to receive power from the battery module. The examples herein deliver power to the selected subset of loads.
    Type: Application
    Filed: March 28, 2014
    Publication date: December 1, 2016
    Inventors: Hai Ngoc Nguyen, Han Wang, Patrick A. Raymond, Raghavan V. Venugopal
  • Publication number: 20160344428
    Abstract: A technique includes jointly encrypting and error encoding plain text data. The joint encryption and error encoding includes processing plain text data in an encryption cipher comprising a plurality of successive rounds to generate cipher text data; and embedding error correction encoding in the encryption cipher to error correction encode the cipher text data.
    Type: Application
    Filed: January 30, 2014
    Publication date: November 24, 2016
    Inventors: Han Wang, Joseph E. Foster, Raghavan V. Venugopal, Patrick A. Raymond
  • Publication number: 20160286678
    Abstract: Devices and methods for engagement of an expansion card (312) with an expansion slot (104) of a printed circuit board (PCB) based connector (102) are described. In one example, an expansion card module (300) includes a card housing (302) to house an expansion card (312). The card housing (302) includes a groove (304) for engaging the card housing (302) with a locking element (202) of a device case housing (200) to mount the expansion card module (300) in the device case housing (200). The expansion card module (300) also includes a module mounted actuator (306) pivotally mounted on the card housing (302) to engage with the locking element (202) for actuating the expansion card module (300) to engage the expansion card (312) with at least one expansion slot (104) of the PCB based connector (102).
    Type: Application
    Filed: January 31, 2014
    Publication date: September 29, 2016
    Inventors: Raghavan V Venugopal, Chin-Lung Chiang, Patrick A Raymond, Chih-Chiang Chen
  • Patent number: 9345163
    Abstract: A module is insertable into a cage based on movement along a first axis. The module is to contain an interface card. A mechanism is to move the module along a second axis perpendicular to the first axis, to couple the interface card with the cage.
    Type: Grant
    Filed: May 30, 2013
    Date of Patent: May 17, 2016
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Raghavan V. Venugopal, Chin-Lung Chiang, Patrick A. Raymond, Chih-Chiang Chen
  • Publication number: 20150261672
    Abstract: During runtime of a system, a memory controller is caused to relinquish control of a memory module that includes a volatile memory and a non-volatile memory. After the triggering, an indication is activated to the memory module, the indication causing a backup operation in the memory module, the backup operation being controlled by an internal controller in the memory module, and the backup operation involving a transfer of data from the volatile memory to the non-volatile memory in the memory module.
    Type: Application
    Filed: January 30, 2013
    Publication date: September 17, 2015
    Inventors: Vincent Nguyen, Binh Nguyen, William C. Hallowell, Raghavan V. Venugopal
  • Patent number: 9064562
    Abstract: A memory module includes memory banks, a local memory controller to access data in the memory banks, and an interface to an external memory controller that is configured to access the memory module. Multiplexing circuitry selectively connects the memory banks to the local memory controller and to the interface to the external memory controller.
    Type: Grant
    Filed: April 3, 2013
    Date of Patent: June 23, 2015
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Raghavan V. Venugopal, William C. Hallowell
  • Publication number: 20140353264
    Abstract: A module is insertable into a cage based on movement along a first axis. The module is to contain an interface card. A mechanism is to move the module along a second axis perpendicular to the first axis, to couple the interface card with the cage.
    Type: Application
    Filed: May 30, 2013
    Publication date: December 4, 2014
    Inventors: Raghavan V. Venugopal, Chin-Lung Chiang, Patrick A. Raymond, Chih-Chiang Chen
  • Publication number: 20140337589
    Abstract: A system includes a hybrid memory module. The hybrid memory module includes volatile memory and non-volatile memory. The system further includes a processor coupled to the hybrid memory module. The processor prevents the hybrid memory module from being mapped during a memory initialization routine by misrepresenting a status of the hybrid memory module.
    Type: Application
    Filed: April 30, 2012
    Publication date: November 13, 2014
    Inventors: David G. Carpenter, William C. Hallowell, Craig M. Belusar, Jason W. Kinsey, Raghavan V. Venugopal, Reza M. Bacchus
  • Publication number: 20140304462
    Abstract: A memory module includes memory banks, a local memory controller to access data in the memory banks, and an interface to an external memory controller that is configured to access the memory module. Multiplexing circuitry selectively connects the memory banks to the local memory controller and to the interface to the external memory controller.
    Type: Application
    Filed: April 3, 2013
    Publication date: October 9, 2014
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: Raghavan V. Venugopal, William C. Hallowell
  • Patent number: 8648491
    Abstract: Methods, devices, and systems for passive impedance matching are provided. An example of a method of passive impedance matching includes provided a substantially equivalent impedance between a source and a load for three single-phase power supplies via a geometry of a busbar. The busbar can be coupled to the three-phase power supplies as the source and coupled to a plurality of electronic machines as the load.
    Type: Grant
    Filed: September 28, 2010
    Date of Patent: February 11, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Andrew James Phelan, Michael Stearns, Minh H. Nguyen, Chanh V. Hua, Raghavan V. Venugopal, David Paul Mohr
  • Patent number: 8639866
    Abstract: Various exemplary systems and methods for dividing a communications channel are disclosed. In at least some embodiments the method may comprise: coupling a plurality of storage devices to a communication channel, detecting whether the communication channel has been divided into multiple sub-channels, and coupling either a first backplane controller or a second backplane controller to the storage devices based on whether the communication channel has been divided.
    Type: Grant
    Filed: August 6, 2003
    Date of Patent: January 28, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Raghavan V. Venugopal, Stephen A. Kay
  • Publication number: 20120074783
    Abstract: Methods, devices, and systems for passive impedance matching are provided. An example of a method of passive impedance matching includes providing a substantially equivalent impedance between a source and a load for three single-phase power supplies via a geometry of a busbar. The busbar can be coupled to the three-phase power supplies as the source and coupled to a plurality of electronic machines as the load.
    Type: Application
    Filed: September 28, 2010
    Publication date: March 29, 2012
    Inventors: Andrew James Phelan, Michael Stearns, Minh H. Nguyen, Chanh V. Hua, Raghavan V. Venugopal, David Paul Mohr
  • Patent number: 7246190
    Abstract: Methods and apparatuses are disclosed for providing a bus in a computer system. In one embodiment, an apparatus comprises: a central processing unit (CPU), a bridge coupled to the CPU, a first slot configured to receive a device, where a first portion of the bridge is coupled to the first slot, a second slot configured to receive a device, where a second portion of the bridge is coupled to the second slot, and where inserting a jumper board into the first slot couples the first portion of the bridge to the second slot.
    Type: Grant
    Filed: April 21, 2004
    Date of Patent: July 17, 2007
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Vincent Nguyen, Raghavan V. Venugopal
  • Patent number: 7196903
    Abstract: An electronic system may comprise a variable speed fan, a first source coupled to the fan, and a second source coupled to the fan. Either of the first or second sources may control the speed of the fan.
    Type: Grant
    Filed: April 4, 2003
    Date of Patent: March 27, 2007
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Vinh T. Vuong, Stephen M. Zaudtke, Raghavan V. Venugopal
  • Publication number: 20040199797
    Abstract: An electronic system may comprise a variable speed fan, a first source coupled to the fan, and a second source coupled to the fan. Either of the first or second sources may control the speed of the fan.
    Type: Application
    Filed: April 4, 2003
    Publication date: October 7, 2004
    Inventors: Vinh T. Vuong, Stephen M. Zaudtke, Raghavan V. Venugopal
  • Publication number: 20040153851
    Abstract: An electronic system includes logic that couples to connectors and receives signals from the connectors. The logic may also detect the presence of an operationally impermissible configuration of said electrical cables based on said signals.
    Type: Application
    Filed: January 13, 2003
    Publication date: August 5, 2004
    Inventors: Raghavan V. Venugopal, Vinh T. Vuong