Patents by Inventor Rahul Khanna

Rahul Khanna has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140278436
    Abstract: A voice-controlled system is described that can be accessed by a mobile computing device. A user can communicate requests using natural language utterances. A microphone can collect the utterances and provide them to the mobile computing device. The mobile computing device can transmit the human utterance to a voice interface system. The voice interface system can utilize user preferences when executing the request to provide a personalized user experience. Computer-implemented methods are also described herein.
    Type: Application
    Filed: March 14, 2013
    Publication date: September 18, 2014
    Applicant: HONDA MOTOR CO., LTD.
    Inventors: Rahul Khanna, Tatsuya Kyomitsu, Xin Guan
  • Patent number: 8769295
    Abstract: Embodiments of the invention are generally directed to apparatuses, methods, and systems for a computing system feature activation mechanism. In an embodiment, a computing system receives a remotely generated feature activation information. The computing system compares the remotely generated feature activation information with a built-in feature activation mechanism. In an embodiment, a feature of the computing system is activated if the remotely generated feature activation information matches the built-in feature activation mechanism. Other embodiments are described and claimed.
    Type: Grant
    Filed: August 1, 2005
    Date of Patent: July 1, 2014
    Assignee: Intel Corporation
    Inventors: Dean Mulla, Rahul Khanna, Keith R. Pflederer
  • Patent number: 8751864
    Abstract: In one embodiment, the present invention provides an ability to handle an error occurring during a memory migration operation in a high availability system. In addition, a method can be used to dynamically remap a memory page stored in a non-mirrored memory region of memory to a mirrored memory region. This dynamic remapping may be responsive to a determination that the memory page has been accessed more than a threshold number of times, indicating a criticality of information on the page. Other embodiments are described and claimed.
    Type: Grant
    Filed: March 22, 2013
    Date of Patent: June 10, 2014
    Assignee: Intel Corporation
    Inventors: Robert C. Swanson, Mahesh S. Natu, Rahul Khanna, Murugasamy K. Nachimuthu, Sarathy Jayakumar, Anil S. Keshavamurthy, Narayan Ranganathan
  • Patent number: 8738937
    Abstract: In one embodiment, the present invention includes a power manager to receive a memory power usage value, to determine an available power based at least in part on a power budget and the memory power usage value, and to change a memory power state based at least in part on the available power, wherein the memory power state comprises a memory frequency and a memory voltage. Other embodiments are described and claimed.
    Type: Grant
    Filed: July 13, 2010
    Date of Patent: May 27, 2014
    Assignee: Intel Corporation
    Inventors: Howard S. David, Eugene Gorbatov, Ulf R. Hanebutte, Minh Le, Rahul Khanna
  • Publication number: 20140095691
    Abstract: In accordance with some embodiments, a cloud service provider may operate a data center in a way that dynamically reallocates resources across nodes within the data center based on both utilization and service level agreements. In other words, the allocation of resources may be adjusted dynamically based on current conditions. The current conditions in the data center may be a function of the nature of all the current workloads. Instead of simply managing the workloads in a way to increase overall execution efficiency, the data center instead may manage the workload to achieve quality of service requirements for particular workloads according to service level agreements.
    Type: Application
    Filed: September 28, 2012
    Publication date: April 3, 2014
    Inventors: Mrittika Ganguli, Muthuvel M. I., Ananth S. Narayan, Jaideep Moses, Andrew J. Herdrich, Rahul Khanna
  • Publication number: 20140089573
    Abstract: Embodiments of the invention describe apparatuses, systems and methods for enabling memory device access prior to bus training, thereby enabling firmware image storage in non-flash nonvolatile memory, such as DDR DRAM. The increasing size of firmware images, such as BIOS, MRC, and ME firmware, makes current non-volatile storage solutions, such as SPI flash memory, impractical; executing BIOS code in flash is slow, and having a separate non-volatile memory device increases device costs. Furthermore, solutions such as Cache-as-RAM, which are utilized for running the pre-memory BIOS code, are limited by the cache size that is not scalable to the increasing complexity of BIOS code. Embodiments of the invention enable the use of persistent memory, such as DRAM, for BIOS code execution and data transfer by allowing DRAM access before memory channel training; said firmware images may then executed to “train” memory channels for subsequent system use.
    Type: Application
    Filed: September 24, 2012
    Publication date: March 27, 2014
    Inventors: Palsamy Sakthikumar, Eswaramoorthi Nallusamy, Rahul Khanna, Kuljit S. Bains
  • Patent number: 8607040
    Abstract: Methods and apparatuses for re-instantiating a firmware environment that includes one or more firmware functions available at pre-boot time when transitioning the computing device from a first, higher power consumption state to a second, lower power consumption state. The firmware environment determines whether a cryptographic signature on a firmware volume is verified; whether hardware resources of the computing device requested by a manifest of the firmware volume are available; and whether a firmware module of the firmware volume is compatible with installed firmware of the firmware environment. If so, the firmware environment reserves space in a memory to accommodate resources used by the firmware module, and executes the firmware module with the computing device in the second, lower power consumption state.
    Type: Grant
    Filed: November 16, 2010
    Date of Patent: December 10, 2013
    Assignee: Intel Corporation
    Inventors: Vincent J. Zimmer, Abdul M. Bailey, James W. Edwards, Rahul Khanna, Yu Fu Li, Di Tang
  • Publication number: 20130311665
    Abstract: A system, device, and method for facilitating wireless communications during a pre-boot phase of a computing device includes establishing a communications interface between a unified extensible firmware interface executed on the computing device and a wireless transceiver of the computing device during a pre-boot phase of the computing device. An OOB processor of the computing device processes data communications between the unified extensible firmware interface and the wireless communication circuit during the pre-boot phase by reformatting the data communications between wired and wireless communication standards.
    Type: Application
    Filed: February 25, 2013
    Publication date: November 21, 2013
    Inventors: Abdul M. Bailey, Di Tang, Rahul Khanna, Vincent J. Zimmer, Kevin Y. Li, James W. Edwards
  • Publication number: 20130212426
    Abstract: In one embodiment, the present invention provides an ability to handle an error occurring during a memory migration operation in a high availability system. In addition, a method can be used to dynamically remap a memory page stored in a non-mirrored memory region of memory to a mirrored memory region. This dynamic remapping may be responsive to a determination that the memory page has been accessed more than a threshold number of times, indicating a criticality of information on the page. Other embodiments are described and claimed.
    Type: Application
    Filed: March 22, 2013
    Publication date: August 15, 2013
    Inventors: Robert C. Swanson, Mahesh S. Natu, Rahul Khanna, Murugasamy K. Nachimuthu, Sarathy Jayakumar, Anil S. Keshavamurthy, Narayan Ranganathan
  • Patent number: 8412479
    Abstract: Memory power estimation by means of calibrated weights and activity counters are generally presented. In this regard, in one embodiment, a memory power is introduced to read a value from a memory activity counter, to determine a memory power estimation based at least in part on the value and a calibration, and to store the memory power estimation to a register. Other embodiments are also described and claimed.
    Type: Grant
    Filed: June 29, 2010
    Date of Patent: April 2, 2013
    Assignee: Intel Corporation
    Inventors: Howard S. David, Eugene Gorbatov, Ulf R. Hanebutte, Minh Le, Rahul Khanna
  • Patent number: 8407516
    Abstract: In one embodiment, the present invention provides an ability to handle an error occurring during a memory migration operation in a high availability system. In addition, a method can be used to dynamically remap a memory page stored in a non-mirrored memory region of memory to a mirrored memory region. This dynamic remapping may be responsive to a determination that the memory page has been accessed more than a threshold number of times, indicating a criticality of information on the page. Other embodiments are described and claimed.
    Type: Grant
    Filed: December 23, 2009
    Date of Patent: March 26, 2013
    Assignee: Intel Corporation
    Inventors: Robert C. Swanson, Mahesh S. Natu, Rahul Khanna, Murugasamy K. Nachimuthu, Sarathy Jayakumar, Anil S. Keshavamurthy, Narayan Ranganathan
  • Patent number: 8386618
    Abstract: A system, device, and method for facilitating wireless communications during a pre-boot phase of a computing device includes establishing a communications interface between a unified extensible firmware interface executed on the computing device and a wireless transceiver of the computing device during a pre-boot phase of the computing device. An OOB processor of the computing device processes data communications between the unified extensible firmware interface and the wireless communication circuit during the pre-boot phase by reformatting the data communications between wired and wireless communication standards.
    Type: Grant
    Filed: September 24, 2010
    Date of Patent: February 26, 2013
    Assignee: Intel Corporation
    Inventors: Abdul M. Bailey, Di Tang, Rahul Khanna, Vincent J. Zimmer, Kevin Y. Li, James W. Edwards
  • Publication number: 20120159204
    Abstract: A system comprises a plurality of processor cores. The processor cores may comprise one or more application processor (AP) cores and a boot strap processor (BSP) core. A basic input/output system (BIOS) comprises an I/O device module to call a stall function in response to an I/O operation, a power management module that couples to the I/O device and a timer module that couples to the power management module. The power management module is to adjust a timer period of the timer module based on a stall delay of the stall function. The power management module may hook the stall function and compare the stall delay with a predetermined threshold and set the timer period to the stall delay in response to determining that the stall delay is longer. The power management module may put the BSP in a sleep mode during the timer period to save power.
    Type: Application
    Filed: May 13, 2011
    Publication date: June 21, 2012
    Inventors: Di Tang, Vincent Zimmer, James Edwards, Rahul Khanna, Yufu Li, Abdul Bailey
  • Publication number: 20120124357
    Abstract: Methods and apparatuses for re-instantiating a firmware environment that includes one or more firmware functions available at pre-boot time when transitioning the computing device from a first, higher power consumption state to a second, lower power consumption state. The firmware environment determines whether a cryptographic signature on a firmware volume is verified; whether hardware resources of the computing device requested by a manifest of the firmware volume are available; and whether a firmware module of the firmware volume is compatible with installed firmware of the firmware environment. If so, the firmware environment reserves space in a memory to accommodate resources used by the firmware module, and executes the firmware module with the computing device in the second, lower power consumption state.
    Type: Application
    Filed: November 16, 2010
    Publication date: May 17, 2012
    Inventors: Vincent J. Zimmer, Abdul M. Bailey, James W. Edwards, Rahul Khanna, Yu Fu Li, Di Tang
  • Publication number: 20120079118
    Abstract: A system, device, and method for facilitating wireless communications during a pre-boot phase of a computing device includes establishing a communications interface between a unified extensible firmware interface executed on the computing device and a wireless transceiver of the computing device during a pre-boot phase of the computing device. An OOB processor of the computing device processes data communications between the unified extensible firmware interface and the wireless communication circuit during the pre-boot phase by reformatting the data communications between wired and wireless communication standards.
    Type: Application
    Filed: September 24, 2010
    Publication date: March 29, 2012
    Inventors: Abdul M. Bailey, Di Tang, Rahul Khanna, Vincent J. Zimmer, Kevin Y. Li, James W. Edwards
  • Publication number: 20120017099
    Abstract: In one embodiment, the present invention includes a power manager to receive a memory power usage value, to determine an available power based at least in part on a power budget and the memory power usage value, and to change a memory power state based at least in part on the available power, wherein the memory power state comprises a memory frequency and a memory voltage. Other embodiments are described and claimed.
    Type: Application
    Filed: July 13, 2010
    Publication date: January 19, 2012
    Inventors: Howard S. David, Eugene Gorbatov, Ulf R. Hanebutte, Minh Le, Rahul Khanna
  • Publication number: 20110320150
    Abstract: Memory power estimation by means of calibrated weights and activity counters are generally presented. In this regard, in one embodiment, a memory power is introduced to read a value from a memory activity counter, to determine a memory power estimation based at least in part on the value and a calibration, and to store the memory power estimation to a register. Other embodiments are also described and claimed.
    Type: Application
    Filed: June 29, 2010
    Publication date: December 29, 2011
    Inventors: Howard S. David, Eugene Gorbatov, Ulf R. Hanebutte, Minh Le, Rahul Khanna
  • Patent number: 7984250
    Abstract: In some embodiments, a memory control device includes a sensor positioned remotely from a memory device, a register to store an offset value, the offset value corresponding to a difference between a temperature reading of the sensor and an estimated actual temperature of the memory device, and a controller to control an operation of the memory device, wherein the controller is configured to read the offset value from the register and control the operation of the memory device in accordance with the offset value. The controller may be configured to dynamically update the offset value during an operation of the memory device. Other embodiments are disclosed and claimed.
    Type: Grant
    Filed: December 31, 2008
    Date of Patent: July 19, 2011
    Assignee: Intel Corporation
    Inventors: Robin Steinbrecher, Christian Le, Rahul Khanna, Fernando A. Lopez, Kai Cheng
  • Publication number: 20110154104
    Abstract: In one embodiment, the present invention provides an ability to handle an error occurring during a memory migration operation in a high availability system. In addition, a method can be used to dynamically remap a memory page stored in a non-mirrored memory region of memory to a mirrored memory region. This dynamic remapping may be responsive to a determination that the memory page has been accessed more than a threshold number of times, indicating a criticality of information on the page. Other embodiments are described and claimed.
    Type: Application
    Filed: December 23, 2009
    Publication date: June 23, 2011
    Inventors: Robert C. Swanson, Mahesh S. Natu, Rahul Khanna, Murugasamy K. Nachimuthu, Sarathy Jayakumar, Anil S. Keshavamurthy, Narayan Ranganathan
  • Patent number: 7941810
    Abstract: Improved reliability, availability, and serviceability (RAS) is provided by an extensible and flexible firmware architecture. The architecture provides management for events, where an event is a response to an imminent failure of or capacity change requirement applicable to a component of the system. In response to an event, control of a system is transferred from an operating system to the firmware manager. The manager identifies an action that is specified by the event. Based on the action, the firmware manager selects a firmware handler from a plurality of firmware handlers. The firmware manager dispatches the selected firmware handler to perform the specified action. The firmware manager and the dispatched firmware handler exchange system-independent information regarding the event. The firmware manager also manages time-slices for the performance of the specified action by the dispatched firmware handler.
    Type: Grant
    Filed: December 28, 2006
    Date of Patent: May 10, 2011
    Assignee: Intel Corporation
    Inventors: Rahul Khanna, Jian Tang, Yufu Li