Abstract: A medium-voltage switchgear system includes a three-phase circuit breaker having first, second and third single-phase vacuum interrupters connected between respective first, second and third single-phase inputs and first, second and third single-phase outputs. Magnetic actuators are connected to first, second and third single-phase vacuum interrupters, which are configured to receive an interrupt signal and in response, actuate the respective vacuum interrupter connected thereto into an open circuit condition. A controller circuit is connected to each of the first, second and third magnetic actuators and generates an interrupt signal in response to a detected single-phase overcurrent or fault on a single-phase circuit and interrupt that single-phase circuit on which the single-phase overcurrent or fault occurred and maintain power on the remaining two single-phase circuits over which a single-phase overcurrent or fault was not detected.

Abstract: The innovation discloses systems, methods and computer program products that reduce complexity and associated measures that are taken to ensure trust in secured transactions as necessitated by requirements present only in an ecommerce environment that do not have a parallel with traditional bricks and mortar commercial transactions. The innovation enables a multitude of mobile wallet applications to engage and obtain services from ecommerce applications wherein backend processing by a mobile wallet server obtains and delivers funds to ecommerce applications without sharing a subset of sensitive data, associated with a mobile wallet application user for the secured transactions. The innovation further provides for a wallet network to be initiated and engaged in which the secured transactions can take place, adopting and adapting social network application connectivity.

Abstract: A method of forming a semiconductor device comprises forming a first mask that includes a longitudinally-extending first opening that has a first width on a semiconductor layer structure. A spacer is formed on sidewalls of the first mask that are exposed by the first opening to form a second mask, where the first and second masks comprise a mask structure that has a longitudinally-extending second opening that has a second width that is smaller than the first width. Dopants are implanted through the second opening to form an implanted region in the semiconductor layer structure. The spacer is at least partially removed from the sidewalls of the first mask to form a third opening in the mask structure. The semiconductor layer structure is then etched using the mask structure as an etch mask to form a gate trench in the semiconductor layer structure underneath the third opening.

Abstract: A shrinkage detection device for a polymer injection molding apparatus detects a shrinkage experienced by an injection molded element for assessing a quality of the molded element. Shrinkage, along with temperature and pressure of the melt within the mold during cooling, indicates a sufficiency of the resulting molded element for intended purposes. Sufficiency includes parameters such as flexibility, shear strength and longevity, and is accurately performed can replace conventional sample testing of molded articles that are expensive and time consuming.

Abstract: Systems, apparatus, articles of manufacture, and methods are disclosed to manage video conferencing call data. An example apparatus comprises interface circuitry, machine-readable instructions, and at least one processor circuit to be programmed by the machine-readable instructions to access input data associated with a first video conferencing device, the first video conferencing device communicatively coupled to a second video conferencing device via a network, generate a representation of the input data when a performance metric corresponding to the network satisfies a threshold value, and transmit the representation to the second video conferencing device via the network.

Abstract: A method of forming a semiconductor device includes etching a semiconductor layer to form a plurality of mesa stripes in the semiconductor layer. The plurality of mesa stripes extend in a first direction and include mesa sidewalls that extend in the first direction and mesa surfaces at opposite ends of the mesa stripes. An additional mesa region is formed at an end of at least one of the mesa stripes. The additional mesa region is electrically insulated from the at least one of the mesa stripes. A semiconductor device structure includes a plurality of mesa stripes that extend in a first direction and include mesa sidewalls that extend in the first direction and mesa end surfaces at opposite ends of the mesa stripes. An additional mesa region that is electrically insulated from the at least one of the mesa stripes is at an end of at least one of the mesa stripes.

Abstract: An example apparatus disclosed herein is to receive network data communicated via a first channel associated with the online collaboration session, the network data including received media data packets. The disclosed example apparatus is also to analyze the network data to determine first loopback data, the first loopback data including at least one of a first quality score based on a first analysis of the received media data packets or a second quality score based on a second analysis of media decoded from the received media data packets. The disclosed example apparatus is also to analyze local data obtained by a local client during the online collaboration session to determine second loopback data. The disclosed example apparatus is further to cause transmission of a loopback message to a moderator client via the second channel, the loopback message based on the first loopback data and the second loopback data.

Abstract: A semiconductor device includes a semiconductor layer having an active region and an edge termination region, and first metal regions on the semiconductor layer in the active region of the semiconductor layer. The first metal regions include a first metal. The device further includes second metal regions on the semiconductor layer in the edge termination region of the semiconductor layer. The second metal regions include the first metal. The device includes a first metal layer on the semiconductor layer in the active region of the semiconductor layer. The first metal layer includes a second metal, and the metal layer contacts the first metal regions and contacts the semiconductor layer in spaces between the first metal regions.

Abstract: Techniques for providing remote patient assistance when network connectivity is unavailable include receiving, from a provider-side side remote patient monitoring (RPM) platform, a healthcare plan assigned to a patient; and while disconnected from the provider-side RPM platform: monitoring the patient; in response to the monitoring, determining whether to provide the medical information to the patient; and presenting the medical information to the patient, wherein the medical information is based on the healthcare plan and the monitoring.

Abstract: A physical layer (PHY) is coupled to a serial, differential link that is to include a number of lanes. The PHY includes a transmitter and a receiver to be coupled to each lane of the number of lanes. The transmitter coupled to each lane is configured to embed a clock with data to be transmitted over the lane, and the PHY periodically issues a blocking link state (BLS) request to cause an agent to enter a BLS to hold off link layer flit transmission for a duration. The PHY utilizes the serial, differential link during the duration for a PHY associated task selected from a group including an in-band reset, an entry into low power state, and an entry into partial width state.

Abstract: Power semiconductor devices comprise a gate pad, a gate bus, and a gate resistor that is electrically interposed between the gate pad and the gate bus and comprises a wide band-gap semiconductor material region.

Abstract: A method of forming ohmic contacts on a semiconductor structure having a p-type region and an n-type region includes depositing a first metal on the n-type region, annealing the structure at a first contact anneal temperature to form a first ohmic contact on the n-type region, depositing a second metal on the first ohmic contact and on the p-type region, and annealing the structure at a second contact anneal temperature, less than the first contact anneal temperature, to form a second ohmic contact on the p-type region.

Abstract: A method of forming a buried implanted region in a silicon carbide semiconductor layer includes implanting first dopant ions into the silicon carbide semiconductor layer at a first dose and first implant energy to form a first channelized doping profile having a first de-channeled peak at a first depth in the silicon carbide semiconductor layer and a first channeled peak at a second depth that is greater than the first depth. Second dopant ions are implanted into the silicon carbide semiconductor layer at a second dose and second implant energy to form a second channelized doping profile. The second channelized doping profile has a second channeled peak at a third depth in the silicon carbide semiconductor layer that is between the first depth and the second depth. The first channelized doping profile and the second channelized doping profile form a combined doping profile that defines the buried implanted region.

Abstract: Transistors are provided that comprise a silicon carbide based semiconductor layer structure, a first current terminal, a second current terminal, a gate terminal, and a minimum gate terminal-to-second current terminal voltage clamp circuit in the semiconductor layer structure that is coupled between the gate terminal and the second current terminal.

Abstract: An aircraft search and rescue mission effectiveness system includes a display device, a searchlight assembly, and a searchlight processing system. The searchlight assembly emits a light beam toward, and thus illuminates, a point of interest, and supplies beam data that includes at least light beam orientation and distance from the searchlight assembly to the point of interest. The searchlight processing system receives aircraft data and is configured to: process the aircraft data and the beam data to generate and supply geographic coordinate data for the point of interest, command the display device to render an image that includes at least a graphical representation of the point of interest and the geographic coordinate data for the point of interest, receive a user input command, and in response to receiving the user input command, to transmit the geographic coordinate data to one or more aircraft avionics systems.

Abstract: A power transistor device includes a drift layer having a first conductivity type and a mesa on the drift layer. The mesa includes a channel region on the drift layer, a source layer on the channel region and a gate region in the mesa adjacent the channel region. The channel region and the source layer have the first conductivity type, and the gate region has a second conductivity type opposite the first conductivity type. The channel region includes a deep conduction region and a shallow conduction region between the deep conduction region and the gate region. The deep conduction region has a first doping concentration, and the shallow conduction region has a second doping concentration that is greater than the first doping concentration.

Abstract: A silicon carbide MOSFET device includes a gate pad area, a main MOSFET area and a secondary MOSFET area. A main source contact is electrically coupled to the source region of each of the main MOSFETs, and a separate secondary source contact is electrically coupled to the source region of each of the secondary MOSFETs. A gate contact electrically connects to each of the insulated gate members of the main and secondary MOSFETs. An asymmetric gate clamping circuit is coupled between the secondary source contact and the gate contact. In a first mode of operation of the MOSFET device the main source contact is electrically coupled with the secondary source contact to activate the gate clamping circuit. When activated, the circuit clamping a gate-to-source voltage to a first clamp voltage in an on-state of the MOSFET device, and to a second clamp voltage in an off-state of the MOSFET device.

Abstract: A Junction Barrier Schottky (JBS) diode includes an N-type epitaxial layer disposed on SiC substrate, P+ wavy regions are disposed in the epitaxial layer adjoining a top planar surface, each of which is separated from an adjacent one of the wavy regions by a Schottky barrier contact region. P+ island regions are disposed in the Schottky barrier contact regions. A top metal layer is disposed along the top planar surface in direct contact with the Schottky barrier contact regions, the P+ wavy regions, and the P+ island regions, the top metal layer comprising the anode of the JBS diode. A bottom metal layer is disposed beneath the SiC substrate. The bottom metal layer comprises the cathode of the JBS diode.

Abstract: A physical layer (PHY) is coupled to a serial, differential link that is to include a number of lanes. The PHY includes a transmitter and a receiver to be coupled to each lane of the number of lanes. The transmitter coupled to each lane is configured to embed a clock with data to be transmitted over the lane, and the PHY periodically issues a blocking link state (BLS) request to cause an agent to enter a BLS to hold off link layer flit transmission for a duration. The PHY utilizes the serial, differential link during the duration for a PHY associated task selected from a group including an in-band reset, an entry into low power state, and an entry into partial width state.

Abstract: Methods, systems, and computer program products for multi-modal construction of deep learning networks are provided herein. A computer-implemented method includes extracting, from user-provided multi-modal inputs, one or more items related to generating a deep learning network; generating a deep learning network model, wherein the generating includes inferring multiple details attributed to the deep learning network model based on the one or more extracted items; creating an intermediate representation based on the deep learning network model, wherein the intermediate representation includes (i) one or more items of data pertaining to the deep learning network model and (ii) one or more design details attributed to the deep learning network model; automatically converting the intermediate representation into source code; and outputting the source code to at least one user.