Patents by Inventor Rahul Shah

Rahul Shah has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240129353
    Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed to improve webservers using dynamic load balancers. An example method includes identifying a first and second data object type associated with media and with first and second data objects of the media. The example method also includes enqueuing first and second event data associated with the first and second data object in a first and second queue in first circuitry in a die of programmable circuitry. The example method further includes dequeuing the first and second event data into a third and fourth queue associated with a first and second core of the programmable circuitry, the first circuitry separate from the first core and the second core. The example method additionally includes causing the first and second core to execute a first and second computing operation based on the first and second event data in the third and fourth queues.
    Type: Application
    Filed: December 21, 2023
    Publication date: April 18, 2024
    Inventors: Amruta Misra, Niall McDonnell, Mrittika Ganguli, Edwin Verplanke, Stephen Palermo, Rahul Shah, Pushpendra Kumar, Vrinda Khirwadkar, Valerie Parker
  • Publication number: 20240069935
    Abstract: Systems, computer program products, and methods are described herein for providing data analysis and processing using graphical user interface position mapping identification is provided. The method includes receiving a plurality of data packets from a plurality of data sources. The data packets contain one or more data metrics associated with an entity. The method also includes causing a rendering of a user interface that presents one or more selectable icons for selecting data to use from the plurality of data packets. The method further includes receiving one or more user selections of the one or more selectable icons. The one or more user selections indicate one or more of the plurality of data sources to use for a generation of a report. The method further includes generating the report based on one of more of the plurality of data packets from the selected data sources of the plurality of data sources.
    Type: Application
    Filed: August 29, 2022
    Publication date: February 29, 2024
    Applicant: BANK OF AMERICA CORPORATION
    Inventors: Rajneesh Acharya, Ganesh Agrawal, Vikash Agarwal, Laura A. Bertarelli Hamilton, Rakesh Shah, Suresh Solomon, Susmitha Nalluri, Trishaun Tajae Blake, Mark Labbancz, Mohal Mukundbhai Sayani, Rahul Tandon, Akhil Kudal, Anju Jha, Priyanka Jyoti
  • Patent number: 11911839
    Abstract: A semiconductor device includes a first die, the first die including a first dielectric layer and a plurality of first bond pads formed within apertures in the first dielectric layer, and a second die bonded to the first die, the second die including a second dielectric layer and a plurality of second bond pads protruding from the second dielectric layer. The first die is bonded to the second die such that the plurality of second bond pads protrude into the apertures in the first dielectric layer to establish respective metallurgical bonds with the plurality of first bond pads. A reduction in the distance between the respective bond pads of the dies results in a lower temperature for establishing a hybrid bond.
    Type: Grant
    Filed: December 28, 2021
    Date of Patent: February 27, 2024
    Assignee: ADVANCED MICRO DEVICES, INC.
    Inventors: Priyal Shah, Rahul Agarwal, Raja Swaminathan, Brett P. Wilkerson
  • Publication number: 20230231809
    Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed for dynamic load balancing for multi-core computing environments. An example apparatus includes a first and a plurality of second cores of a processor, and circuitry in a die of the processor separate from the first and the second cores, the circuitry to enqueue identifiers in one or more queues in the circuitry associated with respective ones of data packets of a packet flow, allocate one or more of the second cores to dequeue first ones of the identifiers in response to a throughput parameter of the first core not satisfying a throughput threshold to cause the one or more of the second cores to execute one or more operations on first ones of the data packets, and provide the first ones to one or more data consumers to distribute the first data packets.
    Type: Application
    Filed: January 13, 2023
    Publication date: July 20, 2023
    Inventors: Stephen Palermo, Bradley Chaddick, Gage Eads, Mrittika Ganguli, Abhishek Khade, Abhirupa Layek, Sarita Maini, Niall McDonnell, Rahul Shah, Shrikant Shah, William Burroughs, David Sonnier
  • Publication number: 20230198912
    Abstract: Methods and apparatus to assign and check anti-replay sequence numbers. In one embodiment, a method includes assigning, by circuitry, sequence numbers to packets of traffic flows, wherein a first sequence number is assigned to a first packet based on a determination that the first packet is within a first traffic flow mapped to a first secure channel, and wherein the first sequence number is within a set of sequence numbers allocated to the first secure channel and maintained by the circuitry. The method continues with allocating the packets of traffic flows to be processed among a plurality of processor cores and processing the packets of traffic flows by the plurality of processor cores.
    Type: Application
    Filed: December 16, 2021
    Publication date: June 22, 2023
    Inventors: Niall MCDONNELL, Pravin PATHAK, Rahul SHAH, Declan DOHERTY
  • Patent number: 11575607
    Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed for dynamic load balancing for multi-core computing environments. An example apparatus includes a first and a plurality of second cores of a processor, and circuitry in a die of the processor separate from the first and the second cores, the circuitry to enqueue identifiers in one or more queues in the circuitry associated with respective ones of data packets of a packet flow, allocate one or more of the second cores to dequeue first ones of the identifiers in response to a throughput parameter of the first core not satisfying a throughput threshold to cause the one or more of the second cores to execute one or more operations on first ones of the data packets, and provide the first ones to one or more data consumers to distribute the first data packets.
    Type: Grant
    Filed: September 11, 2020
    Date of Patent: February 7, 2023
    Assignee: INTEL CORPORATION
    Inventors: Stephen Palermo, Bradley Chaddick, Gage Eads, Mrittika Ganguli, Abhishek Khade, Abhirupa Layek, Sarita Maini, Niall McDonnell, Rahul Shah, Shrikant Shah, William Burroughs, David Sonnier
  • Publication number: 20220286399
    Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed for hardware queue scheduling for multi-core computing environments. An example apparatus includes a first core and a second core of a processor, and circuitry in a die of the processor, at least one of the first core or the second core included in the die, the at least one of the first core or the second core separate from the circuitry, the circuitry to enqueue an identifier to a queue implemented with the circuitry, the identifier associated with a data packet, assign the identifier in the queue to a first core of the processor, and in response to an execution of an operation on the data packet with the first core, provide the identifier to the second core to cause the second core to distribute the data packet.
    Type: Application
    Filed: September 11, 2020
    Publication date: September 8, 2022
    Inventors: Niall McDonnell, Gage Eads, Mrittika Ganguli, Chetan Hiremath, John Mangan, Stephen Palermo, Bruce Richardson, Edwin Verplanke, Praveen Mosur, Bradley Chaddick, Abhishek Khade, Abhirupa Layek, Sarita Maini, Rahul Shah, Shrikant Shah, William Burroughs, David Sonnier
  • Patent number: 11385886
    Abstract: A method for validation and prediction of cloud readiness is described. Method includes identifying a sample of components from a cloud infrastructure, wherein an update is applied to the sample to generate a treated sample and the treated sample is of a statistically sufficient scale and a relevant cloud-level diversity and identifying a control sample of components from the cloud infrastructure, wherein the control sample is statistically comparable to the treated sample. The method also includes executing a set of workloads on the treated sample and the control sample. Further, the method includes predicting an impact of the update on a user experience based on a comparison of telemetry captured during execution of the set of workloads on the treated sample and the control sample.
    Type: Grant
    Filed: December 27, 2019
    Date of Patent: July 12, 2022
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Meir Shmouely, Rahul Shah, Alexander Frank
  • Publication number: 20220107838
    Abstract: Examples relate to an apparatus, device, method, and computer program for processing a sequence of units of data, and of a computer program comprising such an apparatus or device.
    Type: Application
    Filed: December 14, 2021
    Publication date: April 7, 2022
    Inventors: Niall MCDONNELL, Bruce RICHARDSON, Rahul SHAH, Pravin PATHAK, Rashmi SHETTY
  • Publication number: 20210200525
    Abstract: A method for validation and prediction of cloud readiness is described. Method includes identifying a sample of components from a cloud infrastructure, wherein an update is applied to the sample to generate a treated sample and the treated sample is of a statistically sufficient scale and a relevant cloud-level diversity and identifying a control sample of components from the cloud infrastructure, wherein the control sample is statistically comparable to the treated sample. The method also includes executing a set of workloads on the treated sample and the control sample. Further, the method includes predicting an impact of the update on a user experience based on a comparison of telemetry captured during execution of the set of workloads on the treated sample and the control sample.
    Type: Application
    Filed: December 27, 2019
    Publication date: July 1, 2021
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Meir SHMOUELY, Rahul SHAH, Alexander FRANK
  • Publication number: 20210075730
    Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed for dynamic load balancing for multi-core computing environments. An example apparatus includes a first and a plurality of second cores of a processor, and circuitry in a die of the processor separate from the first and the second cores, the circuitry to enqueue identifiers in one or more queues in the circuitry associated with respective ones of data packets of a packet flow, allocate one or more of the second cores to dequeue first ones of the identifiers in response to a throughput parameter of the first core not satisfying a throughput threshold to cause the one or more of the second cores to execute one or more operations on first ones of the data packets, and provide the first ones to one or more data consumers to distribute the first data packets.
    Type: Application
    Filed: September 11, 2020
    Publication date: March 11, 2021
    Inventors: Stephen Palermo, Bradley Chaddick, Gage Eads, Mrittika Ganguli, Abhishek Khade, Abhirupa Layek, Sarita Maini, Niall McDonnell, Rahul Shah, Shrikant Shah, William Burroughs, David Sonnier
  • Patent number: 10773867
    Abstract: An illuminating container is provided. The illuminating container allows inspection of the contents of an opaque body to provide a desirable and pleasant illumination of the contents within the container. Typically, the illumination may be triggered automatically by a sensor, though in other embodiments may be triggered by a manual switch.
    Type: Grant
    Filed: August 16, 2019
    Date of Patent: September 15, 2020
    Inventor: Rahul Shah
  • Patent number: 10755851
    Abstract: A dry type cast-coil transformer having a voltage rating of 1 Kv and above, including: at least one coil with a plurality of conductor turns; a cast comprising a polymeric resin, encompassing the coil and having a cast surface; a ferromagnetic core on which the coil with the encompassing cast is mounted; an insulated cable termination connected to the coil, wherein the connection point between the insulated cable termination and the coil is within the cast, and wherein a flexible portion of the insulated cable termination further extends from the cast surface outwards and comprises a plurality of metal wires.
    Type: Grant
    Filed: April 20, 2018
    Date of Patent: August 25, 2020
    Assignee: ABB Power Grids Switzerland AG
    Inventors: Carlos Roy, Rafael Murillo, Antonio Nogues, Lorena Cebrian, Luis Sanchez, Rahul Shah
  • Publication number: 20200126125
    Abstract: Systems and methods for autonomously generating temporally limited targeted offers and/or directed advertisements based on detected interaction between customers and products are provided. A regional monitoring system may detect the movement of a customer in the establishment. A customer that moves within a limited area of the establishment may be identified by targeted offer distribution circuitry as interested in one or more products in the area. A customer interest monitoring device detects interaction between the customer and the product. Using information obtained from the customer interest monitoring device, the targeted offer distribution circuitry autonomously generates a temporally limited targeted offer or directed advertisement. The targeted offer distribution circuitry delivers the targeted offer or directed advertisement to an output device proximate the customer or to a processor-based device or media carried or possessed by the customer.
    Type: Application
    Filed: June 30, 2017
    Publication date: April 23, 2020
    Applicant: Intel Corporation
    Inventors: Addicam V. SANJAY, Jose A. AVALOS, Shao-Wen YANG, Ke-Yu CHEN, Chieh-Yih WAN, Rahul SHAH, Ryan W. PARKER, Shailesh CHAUDHRY, Michael G. MILLSAP, Daniel GUTWEIN
  • Patent number: 10216661
    Abstract: A serial data link is to be adapted during initialization of the link. Adaptation of the link is to include receiving a pseudorandom binary sequence (PRBS) from a remote agent, analyzing the PRBS to identify characteristics of the data link, and generating metric data describing the characteristics.
    Type: Grant
    Filed: November 22, 2017
    Date of Patent: February 26, 2019
    Assignee: Intel Corporation
    Inventors: Venkatraman Iyer, Darren S. Jue, Rahul Shah, Arvind Kumar
  • Publication number: 20180247757
    Abstract: A dry type cast-coil transformer having a voltage rating of 1 Kv and above, including: at least one coil with a plurality of conductor turns; a cast comprising a polymeric resin, encompassing the coil and having a cast surface; a ferromagnetic core on which the coil with the encompassing cast is mounted; an insulated cable termination connected to the coil, wherein the connection point between the insulated cable termination and the coil is within the cast, and wherein a flexible portion of the insulated cable termination further extends from the cast surface outwards and comprises a plurality of metal wires.
    Type: Application
    Filed: April 20, 2018
    Publication date: August 30, 2018
    Inventors: Carlos Roy, Rafael Murillo, Antonio Nogues, Lorena Cebrian, Luis Sanchez, Rahul Shah
  • Patent number: 10025746
    Abstract: A signal is received, a boundary of which is to be sent in alignment with a sync counter value. A nominal latency of a link is determined based on the sync counter value. Additional latency is applied to the signal to increase the nominal latency to a target latency for the link.
    Type: Grant
    Filed: December 20, 2014
    Date of Patent: July 17, 2018
    Assignee: Intel Corporation
    Inventors: William R. Halleck, Rahul Shah, Venkatraman Iyer
  • Patent number: 9910809
    Abstract: A supersequence is sent to another device to indicate a transition from a partial width link state to another active link state. The supersequence is to be sent over one or more lanes of a link and is to include at least a portion of a start of data sequence (SDS) to include a predefined sequence and a byte number value. The byte number value is to indicate a number of bytes measured from a preceding control interval.
    Type: Grant
    Filed: December 19, 2014
    Date of Patent: March 6, 2018
    Assignee: Intel Corporation
    Inventors: William R. Halleck, Rahul Shah, Venkatraman Iyer
  • Patent number: 9892086
    Abstract: A serial data link is to be adapted during initialization of the link. Adaptation of the link is to include receiving a pseudorandom binary sequence (PRBS) from a remote agent, analyzing the PRBS to identify characteristics of the data link, and generating metric data describing the characteristics.
    Type: Grant
    Filed: June 27, 2016
    Date of Patent: February 13, 2018
    Assignee: Intel Corporation
    Inventors: Venkatraman Iyer, Darren S. Jue, Rahul Shah, Arvind Kumar
  • Patent number: D919428
    Type: Grant
    Filed: September 11, 2019
    Date of Patent: May 18, 2021
    Inventor: Rahul Shah