Abstract: To manufacture FeRAM memories in a particularly space-saving fashion and, thus, increase the storage density, a manufacturing method forms at least some of the multiplicity of capacitor devices used as storage elements with a multiplicity of individual capacitors that are connected in parallel with one another. The individual capacitors have ferroelectric or paraelectric dielectric regions with different coercitive voltages such that there is a resulting multiplicity of storage states for each of the individual capacitors.

Abstract: A method for producing self-polarized ferroelectric layers, in particular PZT layers, with a rhombohedral crystal structure includes providing a substrate and heating it to a temperature T1. Afterward the layer with a rhombohedral crystal structure is applied to the substrate by means of a sputtering method. This layer includes a Zr-deficient layer with a Curie temperature TC1 and a Zr-abundant layer with a Curie temperature TC2 wherein TC2<TC1<T1. After the ending of the application process, the heating of the substrate is also discontinued so that the substrate cools. As a result of the cooling the Zr-deficient layer and then the Zr-abundant layer reach their Curie temperature, and change into the ferroelectric phase and become self-polarized in the process. The polarization already present in the Zr-deficient layer induces the polarization in the Zr-abundant layer, with the result that both layers are self-polarized after the cooling process.

Abstract: The invention relates to a microelectronic structure. In the structure, an oxygen-containing iridium layer is embedded between a silicon-containing layer and an oxygen barrier layer. The iridium layer is especially produced by a sputter process in an oxygen atmosphere with a low oxygen content. The oxygen-containing iridium layer is stale at temperatures up to 800° C. and withstands the formation of iridium silicide upon contact with the silicon-containing layer. Such micro-electronic structures are preferably used in semiconductor memories.

Abstract: A microelectronic structure is described which contains a first conductive layer for preventing oxygen diffusion at the structure. The first conductive layer contains a base material and at least one oxygen-binding admixture that is provided with at least one element from the fourth subgroup or the lanthane group. In a preferred embodiment, the microelectronic structure is used in semiconductor storage components with a metal oxide dielectric as a condenser dielectric.

Abstract: The process provides a multistage procedure, in which, in the first step the layer is sputtered at low temperature, in the second step an RTP process is carried out in an inert atmosphere at medium or high temperature, and in the third step the layer is heat treated in an atmosphere containing oxygen at low or medium temperature. The levels of heating are considerably reduced compared with conventional processes, so that when the process is being employed for producing an integrated memory cell it is possible to prevent oxidation of an underlying barrier layer.

Abstract: The integrated semiconductor memory configuration has a semiconductor body in which selection transistors and storage capacitors are integrated. The storage capacitors have a dielectric layer configured between two electrodes. At least the upper electrode is constructed in a layered manner with a platinum layer, that is seated on the dielectric layer, and a thicker, base metal layer lying above the platinum layer.

Abstract: A memory cell configuration and a method for its production include stacked capacitors and use a vertical storage capacitor having a ferroelectric or paraelectric storage dielectric. In order to produce the storage capacitor, a dielectric layer for the storage dielectric is produced over the whole area. The dielectric layer is subsequently structured and first electrodes and second electrodes for the storage capacitors are formed. The invention is suitable for Gbit DRAMs and for nonvolatile memories.

Abstract: A microelectronic structure has an adhesion layer which is disposed between a base substrate and a barrier layer. The adhesion layer improves the adhesion of the barrier layer on the base substrate, in particular to insulation layers provided there. Microelectronic structures of this type are preferably used in semiconductor memories. A method of fabricating such a microelectronic structure is also provided.

Abstract: A layer structure has a substrate, a platinum layer and a ferroelectric layer. In order to improve adhesion between the platinum layer and the substrate, the structure has an intermediate layer of amorphous aluminum oxide. The intermediate layer also improves the morphology of the ferroelectric layer and ensures that the layer structure is uniform.

Abstract: A thin-film technology multi-layer capacitor with enhanced capacitance and/or reduced space requirement. The dielectric layers of which are alternately disposed between electrode layers on a substrate. Through alternate electrode layer connections, parallel interconnection of the individual capacitor layers is obtained. The result is that the individual capacitances are additive, while the temperature response can be optimized by a suitable choice or combination of different dielectric layers.

Abstract: A semiconductor detector for infrared radiation is manufactured by the steps of depositing an auxiliary layer on a main surface of a carrier, depositing a membrane layer provided with at least one opening onto the auxiliary layer, selectively etching the auxiliary layer through the at least one opening of the membrane layer, so that a hollow space arises in the auxiliary layer, sealing the hollow space by depositing a covering on th membrane layer, and fashioning a detector element on the covering by depositing a material sensitive to infrared radiation within a region of the covering that is bounded by the hollow space therebelow.

Abstract: A novel pyrodetector element is produced by oriented growth, with the aid of buffer layers, above a monocrystalline silicon substrate and thus enables the fabrication of an array of pyrodetectors having read-out and amplifier circuitry integrated on the common substrate. Proposed as the buffer layers are yttrium-stabilized zirconium oxide YSZ or magnesium oxide above an interlayer made of spinel.

Abstract: A method for manufacturing a pyrodetector apparatus having hole structures produced by electrochemical etching in a first principal face of a substrate of n-doped, monocrystalline silicon, so that a structured region arises in the substrate. At least one pyrodetector element is arranged on the first principal face above the structured region.