Abstract: A semiconductor device includes a chip comprising a contact element, a structured dielectric layer over the chip, and a conductive element coupled to the contact element. The conductive element comprises a first portion embedded in the structured dielectric layer, a second portion at least partially spaced apart from the first portion and embedded in the structured dielectric layer, and a third portion contacting a top of the structured dielectric layer and extending at least vertically over the first portion and the second portion.

Abstract: A semiconductor component includes a plastic housing including: plastic outer surfaces; lower outer contact surfaces arranged on an underside of the housing; upper outer contact surfaces arranged on a top side of the housing that is opposite the underside; and outer interconnects electrically connecting the lower outer contact surfaces to the upper outer contact surfaces, the outer interconnects including a layer of solder arranged on conduction paths along an outer contour of the housing.

Abstract: A wiring substrate of a semiconductor component includes: an underside with a wiring structure; a top side with cutouts; a rubber-elastic material arranged in the cutouts; and external contact pads arranged on the rubber-elastic material and configured to be coupled to external contacts. A method for producing a wiring substrate of this type, involves pressing the rubber-elastic material pads into a precursor of a polymer plastic during the production process.

Abstract: A method of manufacturing a semiconductor device is disclosed. One embodiment provides a carrier. Semiconductor chips are placed over the carrier. The semiconductor chips include contact elements. A polymer material is applied over the semiconductor chips and the carrier. The polymer material is removed until the contact elements are exposed. The carrier is removed from the semiconductor chips.

Abstract: A semiconductor device and method is disclosed. In one embodiment, the method includes placing a first semiconductor over an electrically conductive carrier. The first semiconductor is covered with a molding compound. A through hole is formed in the molding compound. A first material is deposited in the through hole.

Abstract: A semiconductor component includes a plastic housing including: plastic outer surfaces; lower outer contact surfaces arranged on an underside of the housing; upper outer contact surfaces arranged on a top side of the housing that is opposite the underside; and outer interconnects electrically connecting the lower outer contact surfaces to the upper outer contact surfaces, the outer interconnects including a layer of solder arranged on conduction paths along an outer contour of the housing.

Abstract: A semiconductor component includes a plastic housing including: plastic outer surfaces; lower outer contact surfaces arranged on an underside of the housing; upper outer contact surfaces arranged on a top side of the housing that is opposite the underside; and outer interconnects electrically connecting the lower outer contact surfaces to the upper outer contact surfaces, the outer interconnects including a layer of solder arranged on conduction paths along an outer contour of the housing.

Abstract: The invention relates to an electronic component with a housing package comprising a number of layers of plastic with at least one buried interconnect layer and with at least one semiconductor chip, which has pointed-conical external contacts distributed on an outer side. The pointed-conical external contacts penetrate through one of the layers of plastic and form contact vias with respect to the buried interconnect layer. Furthermore, the invention relates to a method for producing such an electronic component.

Abstract: A semiconductor stack and a semiconductor base device with a wiring substrate and an intermediate wiring board for a semiconductor device stack is disclosed. In one embodiment, a semiconductor chip is arranged between the intermediate wiring board and the wiring substrate which is electrically connected by way of the wiring substrate on the one hand to external contacts on the underside of the wiring substrate and on the other hand to contact terminal areas in the edge regions of the wiring substrate. The intermediate wiring board has angled-away external flat conductors, which are electrically connected in the contact terminal areas of the wiring board. Furthermore, on the upper side of the intermediate wiring board, arranged on the free ends of the internal flat conductors are external contact terminal areas, which correspond in size and arrangement to external contacts of a semiconductor device to be stacked.

Abstract: A wiring substrate of a semiconductor component includes: an underside with a wiring structure; a top side with cutouts; a rubber-elastic material arranged in the cutouts; and external contact pads arranged on the rubber-elastic material and configured to be coupled to external contacts. A method for producing a wiring substrate of this type, involves pressing the rubber-elastic material pads into a precursor of a polymer plastic during the production process.

Abstract: An electronic component includes a substrate with outer contact areas including copper. Lead-free solder bumps are disposed on the outer contact areas of the electronic component. An electronic configuration includes an electronic component and a printed circuit board. The electronic component is mounted on the printed circuit board by lead-free solder electrical connections.

Abstract: The invention relates to an electronic component with a housing package comprising a number of layers of plastic with at least one buried interconnect layer and with at least one semiconductor chip, which has pointed-conical external contacts distributed on an outer side. The pointed-conical external contacts penetrate through one of the layers of plastic and form contact vias with respect to the buried interconnect layer. Furthermore, the invention relates to a method for producing such an electronic component.

Abstract: A semiconductor component includes a plastic housing including: plastic outer surfaces; lower outer contact surfaces arranged on an underside of the housing; upper outer contact surfaces arranged on a top side of the housing that is opposite the underside; and outer interconnects electrically connecting the lower outer contact surfaces to the upper outer contact surfaces, the outer interconnects including a layer of solder arranged on conduction paths along an outer contour of the housing.

Abstract: A semiconductor component with an electromagnetic shielding device against alpha radiation, beta radiation and high-frequency electromagnetic radiation is presented. The semiconductor component includes a semiconductor chip with a circuit integrated therein with a number of electrical terminal areas and at least one ground terminal area. The semiconductor also includes a package that contains the semiconductor chip and also a chip carrier. The chip carrier has a number of external electrical terminals and an external ground terminal. The electrical terminal areas and the ground terminal areas of the semiconductor chip are electrically connected to the external electrical terminals and the external ground terminals of the chip carrier by connecting means. The semiconductor chip and the connecting means are in this case encapsulated by an electrically insulating passivation.

Abstract: A semiconductor component with an electromagnetic shielding device against alpha radiation, beta radiation and high-frequency electromagnetic radiation is presented. The semiconductor component includes a semiconductor chip with a circuit integrated therein with a number of electrical terminal areas and at least one ground terminal area. The semiconductor also includes a package that contains the semiconductor chip and also a chip carrier. The chip carrier has a number of external electrical terminals and an external ground terminal. The electrical terminal areas and the ground terminal areas of the semiconductor chip are electrically connected to the external electrical terminals and the external ground terminals of the chip carrier by connecting means. The semiconductor chip and the connecting means are in this case encapsulated by an electrically insulating passivation.