Patents by Inventor Rajarshi Mukhopadhyay

Rajarshi Mukhopadhyay has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10024887
    Abstract: Circuitry and methods for measuring the voltage at a node are disclosed. A capacitive divider is coupled to the node, wherein the capacitive divider provides a first output. A resistive divider is coupled to the node, wherein the resistive divider provides a second output.
    Type: Grant
    Filed: August 24, 2016
    Date of Patent: July 17, 2018
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Olivier Trescases, Johan Tjeerd Strydom, Rajarshi Mukhopadhyay
  • Publication number: 20180183437
    Abstract: In described examples, bootstrap diode circuits include a first diode having a first diode input coupled to a voltage supply and a first diode output. Described bootstrap diode circuits additionally include a second diode having a second diode input coupled to the first diode output and a second diode output and a plurality of zener diodes coupled in series. The series-coupled zener diodes are further coupled in parallel with the second diode.
    Type: Application
    Filed: January 24, 2018
    Publication date: June 28, 2018
    Inventors: Rajarshi Mukhopadhyay, Nathan Schemm, Xiaonan Wang
  • Patent number: 9941876
    Abstract: Bootstrap diode circuits are disclosed. Example bootstrap diode circuits disclosed herein include a first diode having a first diode input coupled to a voltage supply and a first diode output. Disclosed bootstrap diode circuits additionally include a second diode having a second diode input coupled to the first diode output and a second diode output and a plurality of zener diodes coupled in series. The plurality of series-coupled zener diodes are further coupled in parallel with the second diode.
    Type: Grant
    Filed: June 8, 2015
    Date of Patent: April 10, 2018
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Rajarshi Mukhopadhyay, Nathan Schemm, Xiaonan Wang
  • Publication number: 20180062510
    Abstract: Circuitry and methods for sampling a signal are disclosed. An example of the circuitry includes a node for coupling the circuitry to the signal being sampled and a plurality of capacitors, wherein each capacitor is selectively coupled to the node by a switch. An analog-to-digital converter is coupled to the node and is for measuring the voltages of individual ones of the plurality of capacitors and converting the voltages to digital signals. Delay circuitry is coupled to each of the switches, the delay circuitry is for closing one switch at a time for a predetermined period.
    Type: Application
    Filed: July 25, 2017
    Publication date: March 1, 2018
    Inventors: Olivier Trescases, Johan Tjeerd Strydom, Rajarshi Mukhopadhyay
  • Publication number: 20180062643
    Abstract: Methods and circuitry for driving a device through drive cycles wherein each drive cycle has a plurality of drive stages are disclosed. An example of the circuitry includes an output for coupling the circuitry to the device and a plurality of drive slices coupled in parallel to the output. Control circuitry selectively activates individual drive slices in the plurality of drive slices during each stage of a drive cycle.
    Type: Application
    Filed: August 24, 2016
    Publication date: March 1, 2018
    Inventors: Olivier Trescases, Johan Tjeerd Strydom, Rajarshi Mukhopadhyay
  • Publication number: 20180059151
    Abstract: Circuitry and methods for measuring the voltage at a node are disclosed. A capacitive divider is coupled to the node, wherein the capacitive divider provides a first output. A resistive divider is coupled to the node, wherein the resistive divider provides a second output.
    Type: Application
    Filed: August 24, 2016
    Publication date: March 1, 2018
    Inventors: Olivier Trescases, Johan Tjeerd Strydom, Rajarshi Mukhopadhyay
  • Publication number: 20170363693
    Abstract: A high bandwidth Hall sensor includes a high bandwidth path and a low bandwidth path. The relatively high offset (from sensor offset) of the high bandwidth path is estimated using a relatively low offset generated by the low bandwidth path. The relatively high offset of the high bandwidth path is substantially reduced by combining the output of the high bandwidth path with the output of the low bandwidth path to generate a high bandwidth, low offset output. The offset can be further reduced by including transimpedance amplifiers in the high bandwidth sensors to optimize the frequency response of high bandwidth Hall sensor.
    Type: Application
    Filed: June 17, 2016
    Publication date: December 21, 2017
    Inventors: Arup Polley, Srinath Ramaswamy, Baher S. Haroun, Rajarshi Mukhopadhyay
  • Publication number: 20170363445
    Abstract: A high bandwidth Hall sensor includes, for example, a Hall element for generating a first polarity Hall-signal output current. An amplifier receives, at a first input, the first polarity Hall-signal output current and outputs a feedback current of a second polarity opposite the first polarity in response. The feedback current is coupled to the first input, and the feedback current suppresses an instantaneous voltage generated by the first polarity first Hall element output current at the first input. In an embodiment, the feedback current suppresses the instantaneous voltage generated by first polarity Hall element output current such that the effects of the Hall element source impedance are reduced.
    Type: Application
    Filed: June 17, 2016
    Publication date: December 21, 2017
    Inventors: Arup Polley, Srinath Ramaswamy, Baher S. Haroun, Rajarshi Mukhopadhyay
  • Publication number: 20170353125
    Abstract: A method and device for providing isolated power transfer to a low-power load across a capacitor of a series resonance circuit are shown. The method includes comparing an output voltage received via a feedback loop with a desired output voltage. Responsive to determining that the output voltage is not equal to the desired output voltage, the method determines a sub-harmonic order of the resonant frequency of the series resonance circuit to use as a switching frequency and switches the series resonance circuit at substantially the determined subharmonic order of the resonant frequency.
    Type: Application
    Filed: August 24, 2017
    Publication date: December 7, 2017
    Inventors: Lei Chen, Rajarshi Mukhopadhyay, Mark W. Morgan, Joseph A. Sankman
  • Patent number: 9780689
    Abstract: A method and device for providing isolated power transfer to a low-power load across a capacitor of a series resonance circuit are shown. The method includes comparing an output voltage received via a feedback loop with a desired output voltage. Responsive to determining that the output voltage is not equal to the desired output voltage, the method determines a sub-harmonic order of the resonant frequency of the series resonance circuit to use as a switching frequency and switches the series resonance circuit at substantially the determined subharmonic order of the resonant frequency.
    Type: Grant
    Filed: December 7, 2015
    Date of Patent: October 3, 2017
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Lei Chen, Rajarshi Mukhopadhyay, Mark W. Morgan, Joseph A. Sankman
  • Patent number: 9762219
    Abstract: A switched driver for a power supply includes a high-side switch and a low-side switch coupled to the high-side switch. An output is coupled between the high-side switch and the low-side switch. A switch controller is coupled to either the high-side switch or the low-side switch and has a switch controller input for receiving a switch control signal and an output for controlling a switch. The switch controller initially reduces the resistance of the switch, increases the resistance of the switch, and then reduces the resistance of the switch in response to a signal received at the input.
    Type: Grant
    Filed: April 6, 2016
    Date of Patent: September 12, 2017
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Nathan Schemm, Rajarshi Mukhopadhyay
  • Patent number: 9716430
    Abstract: Circuitry and methods for sampling a signal are disclosed. An example of the circuitry includes a node for coupling the circuitry to the signal being sampled and a plurality of capacitors, wherein each capacitor is selectively coupled to the node by a switch. An analog-to-digital converter is coupled to the node and is for measuring the voltages of individual ones of the plurality of capacitors and converting the voltages to digital signals. Delay circuitry is coupled to each of the switches, the delay circuitry is for closing one switch at a time for a predetermined period.
    Type: Grant
    Filed: August 24, 2016
    Date of Patent: July 25, 2017
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Olivier Trescases, Johan Tjeerd Strydom, Rajarshi Mukhopadhyay
  • Patent number: 9667451
    Abstract: In described examples, a first isolation element electrically isolates a first circuit from a second circuit and passes AC signals between the first circuit and the second circuit. A second isolation element electrically isolates the first circuit from the second circuit and passes AC signals between the first circuit and the second circuit. A ground of the second circuit electrically floats relative to a ground of the first circuit, so that a digital signal is able to pass from the second circuit through a third isolation element to the first circuit. A supply voltage generation device converts AC signals from the first isolation element and the second isolation element into at least one DC voltage to power the second circuit.
    Type: Grant
    Filed: June 28, 2016
    Date of Patent: May 30, 2017
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Mark W. Morgan, Rajarshi Mukhopadhyay
  • Patent number: 9659844
    Abstract: An integrated circuit device includes a semiconductor substrate with a top surface, a bottom surface opposite the top surface and an intermediate portion positioned between the top and bottom surfaces. The device also includes interior substrate surfaces defined by at least one void extending from the bottom surface to the intermediate portion.
    Type: Grant
    Filed: August 31, 2015
    Date of Patent: May 23, 2017
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Rajarshi Mukhopadhyay, Daniel N. Carothers, Benjamin Cook
  • Publication number: 20170117819
    Abstract: A method and device for providing isolated power transfer to a low-power load across a capacitor of a series resonance circuit are shown. The method includes comparing an output voltage received via a feedback loop with a desired output voltage. Responsive to determining that the output voltage is not equal to the desired output voltage, the method determines a sub-harmonic order of the resonant frequency of the series resonance circuit to use as a switching frequency and switches the series resonance circuit at substantially the determined subharmonic order of the resonant frequency.
    Type: Application
    Filed: December 7, 2015
    Publication date: April 27, 2017
    Inventors: Lei Chen, Rajarshi Mukhopadhyay, Mark W. Morgan, Joseph A. Sankman
  • Publication number: 20170117356
    Abstract: An integrated circuit is formed by forming an isolation trench through at least a portion of an interconnect region, at least 40 microns deep into a substrate of the integrated circuit, leaving at least 200 microns of substrate material under the isolation trench. Dielectric material is formed in the isolation trench at a substrate temperature no greater than 320° C. to form an isolation structure which separates an isolated region of the integrated circuit from at least a portion of the substrate. The isolated region contains an isolated component. The isolated region of the integrated circuit may be a region of the substrate, and/or a region of the interconnect region. The isolated region may be a first portion of the substrate which is laterally separated from a second portion of the substrate. The isolated region may be a portion of the interconnect region above the isolation structure.
    Type: Application
    Filed: October 27, 2015
    Publication date: April 27, 2017
    Applicant: Texas Instruments Incorporated
    Inventors: Dan Carothers, Ricky Jackson, Rajarshi Mukhopadhyay, Ben Cook
  • Publication number: 20170062316
    Abstract: One embodiment of an integrated circuit device includes a semiconductor substrate with a top surface, a bottom surface opposite said top surface and an intermediate portion positioned between the top and bottom surfaces. The device also includes interior substrate surfaces defined by at least one void extending from the bottom surface to the intermediate portion.
    Type: Application
    Filed: August 31, 2015
    Publication date: March 2, 2017
    Inventors: Rajarshi Mukhopadhyay, Daniel N. Carothers, Benjamin Cook
  • Publication number: 20160359483
    Abstract: Bootstrap diode circuits are disclosed. Example bootstrap diode circuits disclosed herein include a first diode having a first diode input coupled to a voltage supply and a first diode output. Disclosed bootstrap diode circuits additionally include a second diode having a second diode input coupled to the first diode output and a second diode output and a plurality of zener diodes coupled in series. The plurality of series-coupled zener diodes are further coupled in parallel with the second diode.
    Type: Application
    Filed: June 8, 2015
    Publication date: December 8, 2016
    Inventors: Rajarshi Mukhopadhyay, Nathan Schemm, Xiaonan Wang
  • Publication number: 20160308691
    Abstract: In described examples, a first isolation element electrically isolates a first circuit from a second circuit and passes AC signals between the first circuit and the second circuit. A second isolation element electrically isolates the first circuit from the second circuit and passes AC signals between the first circuit and the second circuit. A ground of the second circuit electrically floats relative to a ground of the first circuit, so that a digital signal is able to pass from the second circuit through a third isolation element to the first circuit. A supply voltage generation device converts AC signals from the first isolation element and the second isolation element into at least one DC voltage to power the second circuit.
    Type: Application
    Filed: June 28, 2016
    Publication date: October 20, 2016
    Inventors: Mark W. Morgan, Rajarshi Mukhopadhyay
  • Patent number: 9473092
    Abstract: An amplifier receives a differential signal and, in response, generates a first negative input current and a first positive input current. In a first operating mode, the amplifier receives a second differential signal, and, in response, generates a second negative input current and a second positive input current. In a second operating mode, the amplifier receives the second differential signal, and, in response, generates a third negative input current and a third positive input current. When the device is operating in the first operating mode, the first negative input current is summed with the second negative input current and the first positive input current is summed with the second positive input current. When the device is operating in the second operating mode, the first negative input current is summed with the third negative input current and the first positive input current is summed with the third positive input current.
    Type: Grant
    Filed: December 31, 2014
    Date of Patent: October 18, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Dina Reda El-Damak, Rajarshi Mukhopadhyay, Jeffrey Anthony Morroni