Abstract: An apparatus of a multi-chip package (MCP) of a functional safety system, comprises a processor to be configured as a master chip in a master-slave arrangement with a slave chip in the MCP, and a memory coupled to the processor to store one or more infield test scan patterns. The processor includes a bock to couple the master chip to the slave chip via a high-speed input/output (IO) interface to retrieve the one or more infield test scan patterns from the memory via the master chip, and to provide the one or more infield test scan patterns to the slave chip via the high-speed IO interface in response to the functional safety system entering an infield test mode.

Abstract: An apparatus and method to monitor status of a serial data signal on a low speed serial bus is provided. A controller configures a watchdog timer in each target device, sends a heart-beat command to all of the target devices over the low speed serial bus prior to the expiration of the watchdog timer and issues a broadcast read command to any one of the target devices on the low speed serial bus. A response to the broadcast read command confirms that the low speed serial bus is functional. If a response is not received, the low speed serial bus is not functional and the controller initiates a broadcast reset command to initialize all target devices on the low speed serial bus.

Abstract: In one embodiment, an apparatus includes: a peer-to-peer (P2P) control circuit to issue a P2P communication request to a bus master of a multi-drop interconnect to request authorization to send a P2P transaction to at least one slave device coupled to the multi-drop interconnect; a transmitter to transmit the P2P transaction to the at least one slave device when the bus master grants the authorization for the P2P transaction; and another transmitter to output the clock signal to the multi-drop interconnect during the P2P transaction. Other embodiments are described and claimed.

Abstract: In one embodiment, an apparatus includes a unified adapter layer and a first bus controller. The unified adapter layer is to receive a first host data packet packetized in accordance with a host protocol and directed to a first device and decode the first host data packet to generate first and second data elements based on the first host data packet, the first device associated with a first device protocol. The first bus controller is coupled to the unified adapter layer and is to be coupled to the first device via a first bus. The first bus controller is to packetize the first data element in accordance with the first device protocol to generate a first device data packet for transmission to the first device in accordance with the first device protocol via the first bus and adjust a bus controller parameter based in part on the second data element. Other embodiments are described and claimed.

Abstract: In one embodiment, a flash sharing controller is to enable a plurality of components of a platform to share a flash memory. The flash sharing controller may include: a flash sharing class layer including a configuration controller to configure the plurality of components to be flash master devices and configure a flash sharing slave device for the flash memory; and a physical layer coupled to the flash sharing class layer to communicate with the plurality of components via a bus. Other embodiments are described and claimed.

Abstract: An apparatus is described. The apparatus includes a DIMM hub circuit. The DIMM hub circuit includes first bus interface circuitry, control circuitry and second bus interface circuitry. The first bus interface circuitry is to receive header information and payload information from a host. The control circuitry is to process the header information and recognize that the payload is to be passed to a target component that is coupled to the DIMM hub circuit through a second bus that is a same type of bus as the first bus. The second bus interface circuitry to send the payload information over the second bus to the target component, wherein, the payload information is to include embedded header information to be processed by the target component.

Abstract: An apparatus is described. The apparatus includes a DIMM hub circuit. The DIMM hub circuit includes first bus interface circuitry, control circuitry and second bus interface circuitry. The first bus interface circuitry is to receive header information and payload information from a host. The control circuitry is to process the header information and recognize that the payload is to be passed to a target component that is coupled to the DIMM hub circuit through a second bus that is a same type of bus as the first bus. The second bus interface circuitry to send the payload information over the second bus to the target component, wherein, the payload information is to include embedded header information to be processed by the target component.

Abstract: An apparatus of a multi-chip package (MCP) of a functional safety system, comprises a processor to be configured as a master chip in a master-slave arrangement with a slave chip in the MCP, and a memory coupled to the processor to store one or more infield test scan patterns. The processor includes a bock to couple the master chip to the slave chip via a high-speed input/output (IO) interface to retrieve the one or more infield test scan patterns from the memory via the master chip, and to provide the one or more infield test scan patterns to the slave chip via the high-speed IO interface in response to the functional safety system entering an infield test mode.

Abstract: In one embodiment, a host controller includes: a first credit tracker comprising at least one credit counter to maintain credit information for a first device; and a first credit handler to send a command code having a first predetermined value to indicate a credit request to request credit information from the first device, where the first credit tracker is to update the at least one credit counter based on receipt of an in-band interrupt from the first device having the credit information. Other embodiments are described and claimed.

Abstract: An apparatus of a multi-chip package (MCP) of a functional safety system, comprises a processor configurable as a master chip in a master-slave arrangement with a slave chip in the MCP, and a memory coupled to the processor to store one or more infield test scan patterns. The processor includes a block to couple the master chip to the slave chip via a high-speed input/output (IO) interface to retrieve the one or more infield test scan patterns from the memory via the master chip, and to provide the one or more infield test scan patterns to the slave chip via the high-speed TO interface in response to the functional safety system entering an infield test mode.

Abstract: In one embodiment, an apparatus includes: a peer-to-peer (P2P) control circuit to issue a P2P communication request to a bus master of a multi-drop interconnect to request authorization to send a P2P transaction to at least one slave device coupled to the multi-drop interconnect; a transmitter to transmit the P2P transaction to the at least one slave device when the bus master grants the authorization for the P2P transaction; and another transmitter to output the clock signal to the multi-drop interconnect during the P2P transaction. Other embodiments are described and claimed.

Abstract: In one embodiment, a flash sharing controller is to enable a plurality of components of a platform to share a flash memory. The flash sharing controller may include: a flash sharing class layer including a configuration controller to configure the plurality of components to be flash master devices and configure a flash sharing slave device for the flash memory; and a physical layer coupled to the flash sharing class layer to communicate with the plurality of components via a bus. Other embodiments are described and claimed.

Abstract: In embodiments, a device includes an input interface to receive a broadcast command from a host computer, the broadcast command including an access mode indication, and decoding circuitry coupled with the interface. The decoding circuitry is to determine, based at least in part on the received access mode indication, that the broadcast command is directed to access one or more pre-defined setup or control registers of one or more devices, or to access one or more internal registers of the one or more devices, and, in response to the determination, implement the access to the setup or control registers, or to the one or more internal registers. In embodiments, the device is disposed on a memory module coupled to the host computer.

Abstract: In one embodiment, a host controller includes: a first credit tracker comprising at least one credit counter to maintain credit information for a first device; and a first credit handler to send a command code having a first predetermined value to indicate a credit request to request credit information from the first device, where the first credit tracker is to update the at least one credit counter based on receipt of an in-band interrupt from the first device having the credit information. Other embodiments are described and claimed.

Abstract: An apparatus of a multi-chip package (MCP) of a functional safety system, comprises a processor to be configured as a master chip in a master-slave arrangement with a slave chip in the MCP, and a memory coupled to the processor to store one or more infield test scan patterns. The processor includes a bock to couple the master chip to the slave chip via a high-speed input/output (IO) interface to retrieve the one or more infield test scan patterns from the memory via the master chip, and to provide the one or more infield test scan patterns to the slave chip via the high-speed IO interface in response to the functional safety system entering an infield test mode.

Abstract: An apparatus is described. The apparatus includes a DIMM hub circuit. The DIMM hub circuit includes first bus interface circuitry, control circuitry and second bus interface circuitry. The first bus interface circuitry is to receive header information and payload information from a host. The control circuitry is to process the header information and recognize that the payload is to be passed to a target component that is coupled to the DIMM hub circuit through a second bus that is a same type of bus as the first bus. The second bus interface circuitry to send the payload information over the second bus to the target component, wherein, the payload information is to include embedded header information to be processed by the target component.

Abstract: Technologies for secure I/O include a computing device that further includes an I/O controller and a trusted I/O (TIO) mode manager. The TIO mode manager is to program, over a secure routing hardware of the computing device, the I/O controller of the computing device to allow or disallow trusted I/O. The I/O controller is to disable accesses to memory regions associated with one or more programmable I/O registers of an I/O controller of the computing device in response to programming the I/O controller to allow trusted I/O; perform I/O data transfers to or from an I/O device via direct memory access in response to disabling the accesses to the memory regions associated with the one or more programmable I/O registers, wherein the I/O data transfers are protected by a trusted I/O channel; and enable accesses to the address regions associated with the one or more programmable I/O registers in response to programming the I/O controller to disallow trusted I/O.

Abstract: Techniques are disclosed for enhancing user experience in video conferencing. In accordance with some embodiments, the graphical user interface (GUI) displayed on a device involved in a video conferencing session may undergo dynamic adjustment of its video composition, for example, to render video content in either a prominent or a thumbnail region of the GUI. Reorganization of the GUI's video composition may be performed, for example: (1) automatically based on detected audio activity levels of the video conferencing participants; and/or (2) upon user instruction. In accordance with some embodiments, individualized volume control over video conferencing participants may be provided. In accordance with some embodiments, the resolution and/or frame rate of video data captured at a source device involved in a video conferencing session may be adaptively varied, for example, during capture and/or processing before encoding based on the detected audio activity level of the user of that source device.

Abstract: Hydrogenated liquid organic compounds are used for storage and supply of hydrogen at near ambient conditions. The hydrogen is released from the hydrogenated liquid organic compounds through a catalytic dehydrogenation reaction using a M/support or M-M?/support catalyst. The M/support catalyst comprises a metal M selected from Pt, Pd, Rh, Ru, Ir, Os, or combination thereof, and a support selected from Y2O3 or V2O5 or combinations thereof. The M-M?/support catalyst comprises a first metal M selected from Cu, Ag, Au, or combination thereof, a second metal M? selected from Pt, Pd, Rh, Ru, Ir, Os, Fe, Ni, Re, Mo, W, V, Cr, Co or combinations thereof, and a support selected from activated carbon, alumina, alumite, zirconia, silica or combination thereof. Synergistic effects are created by using the combination of the M and M? in the catalyst, which result in shifting of the equilibrium of the reaction favorably to dehydrogenation.

Abstract: Hydrogenated liquid organic compounds are used for storage and supply of hydrogen at near ambient conditions. The hydrogen is released from the hydrogenated liquid organic compounds through a catalytic dehydrogenation reaction using a M/support or M-M?/support catalyst. The M/support catalyst comprises a metal M selected from Pt, Pd, Rh, Ru, Ir, Os, or combination thereof, and a support selected from Y2O3 or V2O5 or combinations thereof. The M-M?/support catalyst comprises a first metal M selected from Cu, Ag, Au, or combination thereof, a second metal M? selected from Pt, Pd, Rh, Ru, Ir, Os, Fe, Ni, Re, Mo, W, V, Cr, Co or combinations thereof, and a support selected from activated carbon, alumina, alumite, zirconia, silica or combination thereof. Synergistic effects are created by using the combination of the M and M? in the catalyst, which result in shifting of the equilibrium of the reaction favorably to dehydrogenation.