Patents by Inventor Rajesh Chopra

Rajesh Chopra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8954803
    Abstract: A programmable characterization-debug-test engine (PCDTE) on an integrated circuit chip. The PCDTE includes an instruction memory that receives and stores instructions provided on a chip interface, and a configuration memory that receives and stores configuration values provided on the chip interface. The PCDTE also includes a controller that configures a plurality of address counters and data registers in response to the configuration values. The controller also executes the instructions, wherein read/write addresses and write data are retrieved from the counters in response to the instructions. The retrieved read/write addresses and write data are used to access a memory under test. Multiple ports of the memory under test may be simultaneously accessed. Multiple instructions may be linked. The instructions may specify special counting functions within the counters and/or specify integrated (linked) counters.
    Type: Grant
    Filed: February 18, 2011
    Date of Patent: February 10, 2015
    Assignee: MoSys, Inc.
    Inventor: Rajesh Chopra
  • Publication number: 20150038511
    Abstract: Provided herein are methods of using compounds and compositions for modulating leukocytic activity, including activity of B cells and/or T cells monocytes, macrophages, and other lymphoid or myeloid-derived cell types, in immune-related diseases or inflammatory diseases. Pharmaceutical compositions and dosing regimens for use in the methods are also provided herein.
    Type: Application
    Filed: May 19, 2014
    Publication date: February 5, 2015
    Inventors: PETER H. SCHAFER, YING YE, DONNA J. SUTHERLAND, RAJESH CHOPRA, ANITA GANDHI
  • Patent number: 8906932
    Abstract: Provided herein are methods of treating, preventing and/or managing cancers, which comprise administering to a patient 3-(5-amino-2-methyl-4-oxo-4H-quinazolin-3-yl)-piperidine-2,6-dione, or an enantiomer or a mixture of enantiomers thereof, or a pharmaceutically acceptable salt, solvate, hydrate, co-crystal, clathrate, or polymorph thereof.
    Type: Grant
    Filed: March 9, 2012
    Date of Patent: December 9, 2014
    Assignee: Celgene Corporation
    Inventors: George W. Muller, Peter H. Schafer, Hon-Wah Man, Ling-Hua Zhang, Anita Gandhi, Rajesh Chopra
  • Publication number: 20140328832
    Abstract: Provided herein are methods for treating or preventing a cancer, comprising administering an effective amount of a substituted quinazolinone compound and an effective amount of N-(3-(5-fluoro-2-(4-(2-methoxyethoxy)phenylamino)pyrimidin-4-ylamino)phenyl)acrylamide to a patient having a cancer.
    Type: Application
    Filed: May 2, 2014
    Publication date: November 6, 2014
    Applicant: CELGENE CORPORATION
    Inventors: Rajesh CHOPRA, Kristen M. HEGE
  • Publication number: 20140314752
    Abstract: Provided herein are methods for treating or preventing a cancer, comprising administering an effective amount of a TOR kinase inhibitor and an effective amount of an IMiD® immunomodulatory drug to a patient having a cancer.
    Type: Application
    Filed: April 16, 2014
    Publication date: October 23, 2014
    Applicant: Signal Pharmaceuticals, LLC
    Inventors: ANTONIA LOPEZ-GIRONA, KRISTEN MAE HEGE, RAJESH CHOPRA
  • Publication number: 20140317460
    Abstract: A memory device with a background built-in self-repair module (BBISRM) includes a main memory, an arbiter, and a redundant memory to repair a target memory under test (TMUT). The memory device also includes a background built-in self-test module (BBISTM) to identify portions of memory needing background built-in self-repair (BBISR). The BBISRM or the BBISTM can operate simultaneously while the memory device is operational for performing external accesses during field operation. The BBISR can detect and correct a single data bit error in the data stored in the TMUT. The arbiter configured to receive a read or write access memory request including a memory address, to determine if the memory address of the read or write access memory request matches the memory address mapped to the selected portion of the redundant memory, and to read or write data from the selected portion of the redundant memory, respectively.
    Type: Application
    Filed: June 30, 2014
    Publication date: October 23, 2014
    Applicant: MOSYS, INC.
    Inventors: Bendik Kleveland, Dipak K. Sikdar, Rajesh Chopra, Jay Patel
  • Publication number: 20140314753
    Abstract: Provided herein are methods for treating or preventing a cancer, comprising administering an effective amount of a TOR kinase inhibitor and an effective amount of a 5-Substituted Quinazolinone Compound to a patient having a cancer.
    Type: Application
    Filed: April 16, 2014
    Publication date: October 23, 2014
    Applicant: Signal Pharmaceuticals, LLC.
    Inventors: KRISTEN MAE HEGE, RAJESH CHOPRA
  • Publication number: 20140314751
    Abstract: Provided herein are methods for treating or preventing a cancer, comprising administering an effective amount of a TOR kinase inhibitor and an effective amount of N-(3-(5-fluoro-2-(4-(2-methoxyethoxy)phenylamino)pyrimidin-4-ylamino)phenyl)acrylamide to a patient having a cancer.
    Type: Application
    Filed: April 16, 2014
    Publication date: October 23, 2014
    Applicant: SIGNAL PHARMACEUTICALS, LLC
    Inventors: KRISTEN MAE HEGE, RAJESH CHOPRA
  • Publication number: 20140162282
    Abstract: Use of cereblon-associated proteins as biomarkers for clinical sensitivity to cancer, inflammatory diseases, and patient response to drug treatment.
    Type: Application
    Filed: June 28, 2013
    Publication date: June 12, 2014
    Applicant: CELGENE CORPORATION
    Inventors: Peter H. SCHAFER, Rajesh Chopra, Antonia Lopez-Girona, Laura Corral, Maria Yinglin Wang, Pilgrim Jackson
  • Publication number: 20140082453
    Abstract: An integrated circuit (IC) chip for transparent and in-service or production repair of single to multiple memory cell defects in a word during the datapath transit of the word between core memory to the interface of the IC via capturing an accurate bit from a word during a write access to a known defective memory address, and by substituting in a non-defective bit into the word during a read access from a known defective memory address. The IC includes: address matching circuit (CAM), a random access memory (RAM) of substitute memory cells containing accurate associated bit data and bit location in word of defect, and data selection circuitry (MUXs) coupled together.
    Type: Application
    Filed: September 18, 2013
    Publication date: March 20, 2014
    Applicant: MOSYS, INC.
    Inventors: Dipak K. Sikdar, Rajesh Chopra
  • Publication number: 20140078841
    Abstract: An integrated circuit chip comprising at least one programmable built-in self-repair (PBISR) for repairing memory is described. The PBISR comprises an interface that receives signals external to the integrated chip. The PBISR further includes a port slave module that programs MBISR registers, program and instruction memory. The PBISR further comprises a programmable transaction engine and a programmable checker. Further, the MBISR comprises an eFUSE cache that implements logic to denote defective elements.
    Type: Application
    Filed: March 15, 2013
    Publication date: March 20, 2014
    Applicant: MOSYS, INC.
    Inventor: Rajesh Chopra
  • Publication number: 20140045844
    Abstract: Provided herein are methods of using compounds and compositions for modulating leukocytic activity, including activity of B cells and/or T cells monocytes, macrophages, and other lymphoid or myeloid-derived cell types, in immune-related diseases or inflammatory diseases. Pharmaceutical compositions and dosing regimens for use in the methods are also provided herein.
    Type: Application
    Filed: August 8, 2013
    Publication date: February 13, 2014
    Applicant: Celgene Corporation
    Inventors: Peter H. Schafer, Rajesh Chopra, Anita Gandhi
  • Patent number: 8495620
    Abstract: A system and method allow a user to extract the set of customizations performed on an application and use these to estimate the time and effort and cost of (a) migrating to a new version of the application and/or (b) consolidating systems. The user can browse the extracted data and select configuration elements for re-use. After downloading the one or more configurations and comparing them, the user selects elements of the configurations for re-use. The first step is to scan one or more application systems and extract the configuration data using a surveyor. The method according to the invention automatically identifies configuration differences. The user then selects configuration elements for re-use. A graphic user interface (GUI) can be provided which allows the user to make these selections by dragging and dropping selected elements to a “To Be” configuration. The selected configurations are then uploaded and installed on an instance of the application.
    Type: Grant
    Filed: March 6, 2008
    Date of Patent: July 23, 2013
    Assignee: International Business Machines Corporation
    Inventors: Rajesh Chopra, SweeFen Goh, Richard Thomas Goodwin, Anca-Andreea Ivan, Stephen K. Kibby, Rakesh Mohan, Igor Naumov, Thomas Dean Rosinski, George A. Schroeder
  • Publication number: 20130173970
    Abstract: A memory device with background built-in self-testing (BBIST) includes a plurality of memory blocks; a memory buffer to offload data from one of the plurality of memory blocks temporarily; and a memory block stress controller to control a stress test applied to the one of the memory blocks when the data is temporarily offloaded on the memory buffer. The stress test tests for errors in the one of the plurality of the memory blocks.
    Type: Application
    Filed: January 2, 2013
    Publication date: July 4, 2013
    Applicant: MOSYS, INC.
    Inventors: Bendik Kleveland, Dipak K. Sikdar, Rajesh Chopra, Jay Patel
  • Publication number: 20130158023
    Abstract: Provided herein are methods for predicting the LKB1 status of a patient or a biological sample, comprising the measurement of particular gene expression levels relative to a set of reference levels that represent the gene expression level of a biological wild-type sample without LKB1 gene or protein loss or mutation and the gene expression level of a reference sample with LKB1 gene or protein loss or mutation. Further provided herein are methods for treating and/or preventing a cancer or a tumor syndrome in a patient, comprising administering an effective amount of a TOR kinase inhibitor to a patient having cancer or a tumor syndrome, characterized by particular gene expression levels.
    Type: Application
    Filed: August 2, 2012
    Publication date: June 20, 2013
    Applicant: SIGNAL PHARMACEUTICALS, LLC
    Inventors: Yuhong L. Ning, Weiming Xu, Rajesh Chopra, Peter Worland, Shuichan Xu
  • Patent number: 8451035
    Abstract: The present disclosure provides an emulator mapping process on a system-on-a-chip (SoC) for debugging. The implementation reduces manual intervention and makes the emulation mapping process very generic and technology independent and hence it reduces overall project cycle time. In the present disclosure, the SoCs containing analog delay locked loops are made suitable for emulation by configuring analog delay locked loop module in parallel with a synthesizable delay logic module. Further, selection logic is provided to select any one of the module at a time.
    Type: Grant
    Filed: December 15, 2010
    Date of Patent: May 28, 2013
    Assignee: STMicroelectronics International NV
    Inventors: Prateek Sikka, Rajesh Chopra, Manoj Yadav
  • Patent number: 8291380
    Abstract: A method for configuring a software package for an enterprise includes gathering desired To-be configuration requirements for a software package through at least one questionnaire; gathering current As-Is raw data for the enterprise; displaying the To-Be configuration requirements and As-Is raw data; comparing the To-Be configuration requirements and As-Is raw data; selecting final To-Be configuration requirements; and generating and executing configuration code for the software package to pre-configure the software package with the final To-Be configuration requirements.
    Type: Grant
    Filed: March 5, 2008
    Date of Patent: October 16, 2012
    Assignee: International Business Machines Corporation
    Inventors: Tirthankar Bandyopadhyay, Kumar Bhaskaran, Rajesh Chopra, Christina Derra, Shiwa Fu, Ying Huang, Stephen K. Kibby, Santhosh Kumaran, Igor A. Naumov, Thomas D. Rosinski, Gerhard Sigl
  • Publication number: 20120230983
    Abstract: Provided herein are methods of treating, preventing and/or managing cancers, which comprise administering to a patient 3-(5-amino-2-methyl-4-oxo-4H-quinazolin-3-yl)-piperidine-2,6-dione, or an enantiomer or a mixture of enantiomers thereof, or a pharmaceutically acceptable salt, solvate, hydrate, co-crystal, clathrate, or polymorph thereof.
    Type: Application
    Filed: March 9, 2012
    Publication date: September 13, 2012
    Inventors: George W. Muller, Peter H. Schafer, Hon-Wah Man, Ling-Hua Zhang, Anita Gandhi, Rajesh Chopra
  • Patent number: 8069385
    Abstract: A PBIST architecture is described. A data path circuit is configured for bit-to-associated bit comparisons of expected result data read from a tile with the expected result data read from result memory. The data path circuit is configured to write a first type of failure indication to first failure memory responsive to a data 0 being read from the result memory and a data 1 being read from the tile for a bit-to-associated bit comparison failure. The data path circuit is further configured to write a second type of failure indication to second failure memory responsive to a data 1 being read from the result memory and a data 0 being read from the tile for the bit-to-associated bit comparison.
    Type: Grant
    Filed: July 13, 2009
    Date of Patent: November 29, 2011
    Assignee: T-RAM Semiconductor, Inc.
    Inventor: Rajesh Chopra
  • Publication number: 20110257167
    Abstract: Provided herein are methods for treating and/or preventing a cancer or a tumor syndrome in a patient, comprising administering an effective amount of a TOR kinase inhibitor to a patient having cancer or a tumor syndrome, characterized by a LKB1 and/or AMPK gene or protein loss or mutation.
    Type: Application
    Filed: February 3, 2011
    Publication date: October 20, 2011
    Inventors: Rajesh Chopra, Yuhong Ning, Sabita Sankar, Shuichan Xu, Weiming Xu