Abstract: An EPROM cell includes a control gate and a control transistor. A portion of the control transistor is formed as a portion of the control gate.

Abstract: A system and method comprising a buffer configured to receive a data stream, a parser configured to parse the data stream from the buffer, and one or more processing units configured to co-process the data stream from the buffer responsive to the parsing by the parser, and then provide at least a portion of the processed data stream back to the buffer for additional parsing by the parser.

Abstract: A devices and method for parsing a data stream comprises a parser stack configured to store one or more parsing symbols, each parsing symbol representing a different state of data stream parsing, a table interface configured to retrieve one or more production rules from a production rule table according to the parsing symbols, and a state machine configured to control the parsing of a data stream according to the retrieved production rules.

Abstract: A blower is formed with multiple sets of rotatable rings of blades coupled to each other. Multiple inlet rings are correspondingly coupled to the multiple sets of rotatable rings of blades. In one embodiment, the blades may be forward facing blades and include a volute to accomplish pressure recovery. In further embodiments, the blades are backward facing. Such backward facing blades are designed to provide a static pressure rise. In some embodiment, three or more rings of blades with corresponding inlet rings are utilized.

Abstract: A system and method for parsing a data stream comprises a production rule table populated with production rules, a parser table populated with production rule codes that correspond to production rules within the production rule table, and a direct execution parser to identify production rule codes in the parser table and to retrieve production rules from the production rule table according to the identified production rule codes, the direct execution parser is operable to parse a data stream according to the retrieved production rules.

Abstract: A system and device are disclosed for operating an interface circuit. The interface circuit comprises a buffer for buffering data, a parser interface for sending at least a portion of the buffered data to a direct execution parser, and a processing interface for sending at least a portion of the buffered data to a semantic processing unit. The system comprises a plurality of input buffers for buffering received data, a direct execution parser configured to parse the data in the input buffers in response to symbols in a parser stack, and a plurality of semantic processing units each configured to perform operations on data in the different input buffers according to commands from the direct execution parser.

Abstract: The present apparatus and method of use comprises a system that enables a cell of data to be transmitted one time over a high speed data bus to an switch system where it is then distributed to each of the destinations for which it is intended. A fabric access device and a multiplex devices are each formed to have groups of buffers for buffering signals according to type. The first group of buffers is for temporarily storing data that is to be delivered to only one destination. The second group of buffers is for holding the cells that are to be transmitted to a plurality of devices. In those embodiments in which the unicast and multicast cells are transmitted over the same line or bus a parsing unit examines a field within the header portion of each cell to determine whether the cell is a unicast or multicast cell. If the cell is a unicast cell, it is temporarily stored within the unicast receive buffer set. If the cell is a multicast cell, then it is temporarily stored in the multicast buffer set.

Abstract: In one embodiment, a lateral FET cell is formed in a body of semiconductor material. The body of semiconductor material includes alternating layers of opposite conductivity type that extend between a trench drain region and a trench gate structure. The trench gate structure controls at least one sub-surface channel region. The body of semiconductor material provides sub-surface drift regions to reduce on resistance without increasing device area.

Abstract: A uniform heat dissipating and cooling heat sink for increasing conductive cooling at locations where conductive cooling and temperature differential is reduced. The heat sink includes a base having a variable thickness with a maximum thickness at the interior thereof and a plurality of fins upstanding from the base with adjacent fins separated by a flow channel having diverging sides.

Abstract: A technique to provide well-balanced airflow in a computer data center that uses fan assisted tiles coupled to a host computer through a network. In an example embodiment, this is accomplished by disposing the fan tiles, including temperature and airflow sensors and a programmable switch to provide a Network address, in multiple locations in raised floor and ceiling of the computer data center. Further, the example embodiment includes coupling the fan tiles to the host computer through the network to control the fan tiles based on the feedback received from the temperature and airflow sensors to provide adaptive airflow balancing and thermal management in the computer data center.

Abstract: An EPROM cell includes a control gate and a control transistor. A portion of the control transistor is formed as a portion of the control gate.

Abstract: In one embodiment, a lateral FET structure (30) is formed in a body of semiconductor material (32). The structure (30) includes a plurality non-interdigitated drain regions (39) that are coupled together with a conductive layer (57), and a plurality of source regions (34) that are coupled together with a different conductive layer (51). One or more interlayer dielectrics (53,54) separate the two conductive layers (51,57). The individual source regions (34) are absent small radius fingertip regions.

Abstract: A transistor (10) is formed as a matrix of transistor cells (13) that have drain metal strips (50) for contacting drains (15) of the transistor cells and source metal strips (55) for contacting sources (35) of the transistor cells. An interconnect layer (1030) overlying the matrix of transistor cells has first portions (201) that contact one the drain metal strips with first and second vias (79) and second portions (101) that contact one of the source metal strips with third and fourth vias (78).

Abstract: A thermistor is pulsed with energy, and a time constant of decay of temperature is calculated based on measured resistance of the thermistor over a number of known intervals. The time constant is representative of the mass air flow. The ambient air temperature may be found without waiting for the thermistor to reach the ambient air temperature.

Abstract: A technique to provide well-balanced airflow in a computer data center that uses fan assisted tiles coupled to a host computer through a network. In an example embodiment, this is accomplished by disposing the fan tiles, including temperature and airflow sensors and a programmable switch to provide a Network address, in multiple locations in raised floor and ceiling of the computer data center. Further, the example embodiment includes coupling the fan tiles to the host computer through the network to control the fan tiles based on the feedback received from the temperature and airflow sensors to provide adaptive airflow balancing and thermal management in the computer data center.

Abstract: A switching system includes a switch fabric that includes groups of buffers for each port interface device that communicates with external communication devices through an Ethernet plane. The port interface device is formed to receive congestion ratings reflecting buffer usage within the switch fabric for each device coupled to transmit and receive packets through the switching fabric and to determine whether to route to the switching fabric or drop the packet based upon the congestion rating of the destination device and upon a quality of service rating for the packet.

Abstract: A transistor (10) is formed as a matrix of transistor cells (13) that have drain metal strips (50) for contacting drains (15) of the transistor cells and source metal strips (55) for contacting sources (35) of the transistor cells. An interconnect layer (1030) overlying the matrix of transistor cells has first portions (201) that contact one the drain metal strips with first and second vias (79) and second portions (101) that contact one of the source metal strips with third and fourth vias (78).

Abstract: An air flow sensor including a temperature dependent resistor device, a first circuit and a second circuit. The first circuit applies a voltage to the temperature dependent resistor device until it reaches a first temperature. The first circuit includes a first reference resistance leg, a first variable resistance leg including the temperature dependent resistor device, and a first comparator connected to both legs for determining when the temperature dependent resistor device reaches the first temperature. The second circuit includes a second reference resistance leg, a second variable resistance leg including the temperature dependent resistor device, and a second comparator connected to both legs for determining when the temperature dependent resistor device reaches a second temperature.

Abstract: A system enables a cell of data to be transmitted one time over a high speed data bus to an Ethernet switch system where it is then distributed to each of the destinations for which it is intended. A first group of buffers is for temporarily storing data that is to be delivered to only one destination. A second group of buffers is for holding the cells that are to be transmitted to a plurality of devices. In the described embodiment of the invention, the unicast and multicast cells are transmitted over the same line or bus. The invention further includes a switch processor that is formed to detect congestion within the switch fabric and to transmit a congestion rating to each device coupled to transmit and receive data through the switch fabric.

Abstract: A uniform heat dissipating and cooling heat sink for increasing conductive cooling at locations where conductive cooling and temperature differential is reduced. The heat sink includes a base having a variable thickness with a maximum thickness at the interior thereof and a plurality of fins upstanding from the base with adjacent fins separated by a flow channel having diverging sides.