Patents by Inventor Rajinder Dhindsa
Rajinder Dhindsa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240355586Abstract: Apparatus and methods for controlling the uniformity of a plasma formed using a radio frequency (RF) source power assembly that includes one or more resonant tuning circuits coupled to two or more electrodes disposed within a multi-electrode source assembly. Improved plasma uniformity control and reduced system cost are achieved by eliminating multiple RF generators and matches that power the multiple electrodes separately. Multiple frequencies may also be provided to multiple electrodes at the same time, which can include another cost savings when using a multi-frequency RF source assembly. Local plasma density and sheath voltage over a surface of a substrate are controlled with segmented electrodes disposed within the processing region of a plasma processing chamber. The ion flux and direction, as well as energetic electron flux towards the substrate, are controlled to address the plasma non-uniformity and global tilt during processing of a semiconductor substrate.Type: ApplicationFiled: April 24, 2023Publication date: October 24, 2024Inventors: Linying CUI, James ROGERS, Rajinder DHINDSA
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Publication number: 20240355587Abstract: Apparatus and methods for controlling the uniformity of a plasma formed using a radio frequency (RF) source power assembly that includes one or more resonant tuning circuits coupled to two or more electrodes disposed within a multi-electrode source assembly. Improved plasma uniformity control and reduced system cost are achieved by eliminating multiple RF generators and matches that power the multiple electrodes separately. Multiple frequencies may also be provided to multiple electrodes at the same time, which can include another cost savings when using a multi-frequency RF source assembly. Local plasma density and sheath voltage over a surface of a substrate are controlled with segmented electrodes disposed within the processing region of a plasma processing chamber. The ion flux and direction, as well as energetic electron flux towards the substrate, are controlled to address the plasma non-uniformity and global tilt during processing of a semiconductor substrate.Type: ApplicationFiled: April 24, 2023Publication date: October 24, 2024Inventors: Linying CUI, James ROGERS, Rajinder DHINDSA
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Publication number: 20240321610Abstract: The present disclosure generally relates to a method and apparatus for determining a metric related to erosion of a ring assembly used in an etching within a plasma processing chamber. In one example, the apparatus is configured to obtain a metric indicative of erosion on an edge ring disposed on a substrate support assembly in a plasma processing chamber. A sensor obtains the metric for the edge ring. The metric correlates to the quantity of erosion in the edge ring. In another example, the ring sensor may be arranged outside of a periphery of a substrate support assembly. The metric may be acquired by the ring sensor through a plasma screen.Type: ApplicationFiled: May 28, 2024Publication date: September 26, 2024Inventors: Yaoling PAN, Patrick John TAE, Michael D. WILLWERTH, Leonard M. TEDESCHI, Daniel Sang BYUN, Philip Allan KRAUS, Phillip CRIMINALE, Changhun LEE, Rajinder DHINDSA, Andreas SCHMID, Denis M. KOOSAU
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Patent number: 12094752Abstract: Apparatuses including a height-adjustable edge ring, and methods for use thereof are described herein. In one example, a process kit for processing a substrate is provided. The process kit has a support ring comprising an upper surface having an inner edge disposed at a first height and an outward edge disposed at a second height less than the first height, the inner edge having a greater thickness than the outward edge. An edge ring is disposed on the support ring, an inner surface of the edge ring interfaced with the inner edge of the support ring. A cover ring is disposed outward of the edge ring, the edge ring independently moveable relative to the support ring and the cover ring. Push pins are disposed inward of the cover ring, the push pins operable to elevate the edge ring while constraining radial movement of the support ring.Type: GrantFiled: June 17, 2022Date of Patent: September 17, 2024Assignee: Applied Materials, Inc.Inventors: Michael R. Rice, Yogananda Sarode Vishwanath, Sunil Srinivasan, Rajinder Dhindsa, Steven E. Babayan, Olivier Luere, Denis M. Koosau, Imad Yousif
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Patent number: 12057292Abstract: Embodiments of this disclosure describe a feedback loop that can be used to maintain a nearly constant sheath voltage and thus creating a mono-energetic IEDF at the surface of the substrate. The system described herein consequently enables a precise control over the shape of IEDF and the profile of the features formed in the surface of the substrate.Type: GrantFiled: May 24, 2023Date of Patent: August 6, 2024Assignee: Applied Materials, Inc.Inventors: Leonid Dorf, Evgeny Kamenetskiy, James Rogers, Olivier Luere, Rajinder Dhindsa, Viacheslav Plotnikov
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Patent number: 12009236Abstract: The present disclosure generally relates to a method and apparatus for determining a metric related to erosion of a ring assembly used in an etching within a plasma processing chamber. In one example, the apparatus is configured to obtain a metric indicative of erosion on an edge ring disposed on a substrate support assembly in a plasma processing chamber. A sensor obtains the metric for the edge ring. The metric correlates to the quantity of erosion in the edge ring. In another example, the ring sensor may be arranged outside of a periphery of a substrate support assembly. The metric may be acquired by the ring sensor through a plasma screen.Type: GrantFiled: April 22, 2019Date of Patent: June 11, 2024Assignee: Applied Materials, Inc.Inventors: Yaoling Pan, Patrick John Tae, Michael D. Willwerth, Leonard M. Tedeschi, Daniel Sang Byun, Philip Allan Kraus, Phillip A. Criminale, Changhun Lee, Rajinder Dhindsa, Andreas Schmid, Denis M. Koosau
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Patent number: 11984306Abstract: Embodiments provided herein generally include plasma processing systems configured to preferentially clean desired surfaces of a substrate support assembly by manipulating one or more characteristics of an in-situ plasma and related methods. In one embodiment, a plasma processing method includes generating a plasma in a processing region defined by a chamber lid and a substrate support assembly, exposing an edge ring and a substrate supporting surface to the plasma, and establishing a pulsed voltage (PV) waveform at the edge control electrode.Type: GrantFiled: December 27, 2021Date of Patent: May 14, 2024Assignee: Applied Materials, Inc.Inventors: Rajinder Dhindsa, Linying Cui, James Rogers
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Publication number: 20240153741Abstract: Embodiments of the disclosure provided herein include a method for processing a substrate in a plasma processing system. The method includes receiving a first synchronization waveform signal from a controller, delivering a first burst of first voltage pulses to an electrode assembly after receiving a first portion of the first synchronization waveform signal, wherein at least one first parameter of the first voltage pulses is set to a first value based on a first waveform parameter within the first portion of the first synchronization waveform signal, and delivering a second burst of second voltage pulses to the electrode assembly after receiving a second portion of the first synchronization waveform signal, wherein the at least one first parameter of the first voltage pulses is set to a second value based on a difference in the first waveform parameter within the second portion of the first synchronization waveform signal.Type: ApplicationFiled: November 9, 2022Publication date: May 9, 2024Inventors: Linying CUI, James ROGERS, Daniel Sang BYUN, Rajinder DHINDSA, Keith HERNANDEZ
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Publication number: 20240145220Abstract: Examples of a substrate support assembly are provided herein. In some examples, the substrate support assembly has a ceramic electrostatic chuck having a first side configured to support a substrate and a second side opposite the first side, wherein the ceramic electrostatic chuck includes an electrode embedded in the ceramic electrostatic chuck. The substrate support assembly has a cooling plate disposed under the second side of the ceramic electrostatic chuck, wherein the cooling plate includes an inner portion separated from an outer portion. The substrate support assembly has a bond layer coupling the ceramic electrostatic chuck to the cooling plate, wherein the bond layer is of a first material in the outer portion of the cooling plate and of a second material in the inner portion of the cooling plate, and wherein the first material has a greater thermal conductivity than that of the second material.Type: ApplicationFiled: October 26, 2022Publication date: May 2, 2024Inventors: Jaeyong CHO, Rajinder DHINDSA, Daniel Sang BYUN, Vladimir KNYAZIK
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Publication number: 20240047195Abstract: A method, apparatus and system for processing a wafer in a plasma chamber system, which includes at least a plasma generating element and a biasing electrode, include generating a plasma in the plasma chamber system by applying a source RF source power to the plasma generating element for a first period of time of a pulse period of the RF source power, after the expiration of the first period of time, removing the source RF source power, after a delay after the removal of the RF source power, applying an RF bias signal to the biasing electrode for a second period of time to bias the generated plasma towards the wafer, and after the expiration of the second period of time, removing the RF bias signal from the biasing electrode before a next pulse period of the RF source power. The generated plasma biased toward the wafer is used to process the wafer.Type: ApplicationFiled: October 10, 2023Publication date: February 8, 2024Inventors: AKHIL MEHROTRA, VINAY SHANKAR VIDYARTHI, DAKSH AGARWAL, SAMANEH SADIGHI, JASON KENNEY, RAJINDER DHINDSA
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Publication number: 20240030002Abstract: Embodiments of the disclosure provided herein include an apparatus and method for the plasma processing of a substrate in a processing chamber. More specifically, embodiments of this disclosure describe a biasing scheme that is configured to provide a pulsed-voltage (PV) waveform delivered from one or more pulsed-voltage (PV) generators to the one or more electrodes within the processing chamber. The plasma process(es) disclosed herein can be used to control the shape of an ion energy distribution function (IEDF) and the interaction of the plasma with a surface of a substrate during plasma processing.Type: ApplicationFiled: October 2, 2023Publication date: January 25, 2024Inventors: Leonid DORF, Rajinder DHINDSA, James ROGERS, Daniel Sang BYUN, Evgeny KAMENETSKIY, Yue GUO, Kartik RAMASWAMY, Valentin N. TODOROW, Olivier LUERE, Linying CUI
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Patent number: 11848176Abstract: Embodiments of the disclosure provided herein include an apparatus and method for the plasma processing of a substrate in a processing chamber. More specifically, embodiments of this disclosure describe a biasing scheme that is configured to provide a radio frequency (RF) generated RF waveform from an RF generator to one or more electrodes within a processing chamber and a pulsed-voltage (PV) waveform delivered from one or more pulsed-voltage (PV) generators to the one or more electrodes within the processing chamber. The plasma process(es) disclosed herein can be used to control the shape of an ion energy distribution function (IEDF) and the interaction of the plasma with a surface of a substrate during plasma processing.Type: GrantFiled: May 7, 2021Date of Patent: December 19, 2023Assignee: Applied Materials, Inc.Inventors: Leonid Dorf, Rajinder Dhindsa, James Rogers, Daniel Sang Byun, Evgeny Kamenetskiy, Yue Guo, Kartik Ramaswamy, Valentin N. Todorow, Olivier Luere
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Patent number: 11817312Abstract: A method, apparatus and system for processing a wafer in a plasma chamber system, which includes at least a plasma generating element and a biasing electrode, include generating a plasma in the plasma chamber system by applying a source RF source power to the plasma generating element for a first period of time of a pulse period of the RF source power, after the expiration of the first period of time, removing the source RF source power, after a delay after the removal of the RF source power, applying an RF bias signal to the biasing electrode for a second period of time to bias the generated plasma towards the wafer, and after the expiration of the second period of time, removing the RF bias signal from the biasing electrode before a next pulse period of the RF source power. The generated plasma biased toward the wafer is used to process the wafer.Type: GrantFiled: October 29, 2018Date of Patent: November 14, 2023Assignee: APPLIED MATERIALS, INC.Inventors: Akhil Mehrotra, Vinay Shankar Vidyarthi, Daksh Agarwal, Samaneh Sadighi, Jason Kenney, Rajinder Dhindsa
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Publication number: 20230360892Abstract: Embodiments described herein provide methods and apparatus used to control a processing result profile proximate to a circumferential edge of a substrate during the plasma-assisted processing thereof. In one embodiment, a substrate support assembly features a first base plate and a second base plate circumscribing the first base plate. The first and second base plates each have one or more respective first and second cooling disposed therein. The substrate support assembly further features a substrate support disposed on and thermally coupled to the first base plate, and a biasing ring disposed on and thermally coupled to the second base plate. Here, the substrate support and the biasing ring are each formed of a dielectric material. The substrate support assembly further includes an edge ring biasing electrode embedded in the dielectric material of the biasing ring and an edge ring disposed on the biasing ring.Type: ApplicationFiled: July 21, 2023Publication date: November 9, 2023Inventors: James ROGERS, Linying CUI, Rajinder DHINDSA
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Patent number: 11810768Abstract: Embodiments described herein provide methods and apparatus used to control a processing result profile proximate to a circumferential edge of a substrate during the plasma-assisted processing thereof. In one embodiment, a substrate support assembly features a first base plate and a second base plate circumscribing the first base plate. The first and second base plates each have one or more respective first and second cooling disposed therein. The substrate support assembly further features a substrate support disposed on and thermally coupled to the first base plate, and a biasing ring disposed on and thermally coupled to the second base plate. Here, the substrate support and the biasing ring are each formed of a dielectric material. The substrate support assembly further includes an edge ring biasing electrode embedded in the dielectric material of the biasing ring and an edge ring disposed on the biasing ring.Type: GrantFiled: June 18, 2021Date of Patent: November 7, 2023Assignee: Applied Materials, Inc.Inventors: James Rogers, Linying Cui, Rajinder Dhindsa
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Publication number: 20230352264Abstract: Systems and methods for creating arbitrarily-shaped ion energy distribution functions using shaped-pulse-bias. In an embodiment, a method includes applying a negative jump voltage to an electrode of a process chamber to set a wafer voltage for a wafer, modulating an amplitude of the wafer voltage to produce a train of groups of pulse bursts with different amplitudes, and repeating the modulating of the amplitude of the wafer voltage to repeat the train of the groups of pulse bursts to create an ion energy distribution function having more than one energy peak. In some embodiments, the negative jump voltage can include a single-cycle voltage waveform with a voltage ramp during an ion-current phase, in which the voltage ramp can be positive or negative and a duration of the ion-current phase can comprise more or less than fifty percent of a period of the waveform.Type: ApplicationFiled: July 11, 2023Publication date: November 2, 2023Applicant: Applied Materials, Inc.Inventors: Leonid DORF, Travis KOH, Olivier LUERE, Olivier JOUBERT, Philip A. KRAUS, Rajinder DHINDSA, James ROGERS
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Patent number: 11791140Abstract: An apparatus for confining plasma within a plasma processing chamber is provided. The plasma processing chamber includes a lower electrode for supporting a substrate and an upper electrode disposed over the lower electrode. The apparatus is a confinement ring that includes a lower horizontal section extending between an inner lower radius and an outer radius of the confinement ring. The lower horizontal section includes an extension section that bends vertically downward at the inner lower radius, and the lower horizontal section further includes a plurality of slots. The confinement ring further includes an upper horizontal section extending between an inner upper radius and the outer radius of the confinement ring and a vertical section that integrally connects the lower horizontal section with the upper horizontal section. The extension section of the lower horizontal section is configured to surround the lower electrode when installed in the plasma processing chamber.Type: GrantFiled: April 26, 2022Date of Patent: October 17, 2023Assignee: Lam Research CorporationInventors: Rajinder Dhindsa, Akira Koshiishi, Alexei Marakhatanov
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Publication number: 20230326717Abstract: Embodiments of this disclosure describe a feedback loop that can be used to maintain a nearly constant sheath voltage and thus creating a mono-energetic IEDF at the surface of the substrate. The system described herein consequently enables a precise control over the shape of IEDF and the profile of the features formed in the surface of the substrate.Type: ApplicationFiled: May 24, 2023Publication date: October 12, 2023Applicant: Applied Materials, Inc.Inventors: Leonid DORF, Evgeny KAMENETSKIY, James ROGERS, Olivier LUERE, Rajinder DHINDSA, Viacheslav PLOTNIKOV
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Publication number: 20230317412Abstract: Embodiments for processing a substrate in a pulsed plasma chamber are provided. A processing apparatus with two chambers, separated by a plate fluidly connecting the chambers, includes a continuous wave (CW) controller, a pulse controller, and a system controller. The CW controller sets the voltage and the frequency for a first radio frequency (RF) power source coupled to a top electrode. The pulse controller is operable to set voltage, frequency, ON-period duration, and OFF-period duration for a pulsed RF signal generated by a second RF power source coupled to the bottom electrode. The system controller is operable to regulate the flow of species between the chambers to assist in the negative-ion etching, to neutralize excessive positive charge on the wafer surface during afterglow in the OFF-period, and to assist in the re-striking of the bottom plasma during the ON -period.Type: ApplicationFiled: June 6, 2023Publication date: October 5, 2023Inventors: Alexei Marakhtanov, Rajinder Dhindsa, Eric Hudson, Andrew D. Bailey, III
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Patent number: 11776789Abstract: Embodiments of the disclosure provided herein include an apparatus and method for the plasma processing of a substrate in a processing chamber. More specifically, embodiments of this disclosure describe a biasing scheme that is configured to provide a radio frequency (RF) generated RF waveform from an RF generator to one or more electrodes within a processing chamber and a pulsed-voltage (PV) waveform delivered from one or more pulsed-voltage (PV) generators to the one or more electrodes within the processing chamber. The plasma process(es) disclosed herein can be used to control the shape of an ion energy distribution function (IEDF) and the interaction of the plasma with a surface of a substrate during plasma processing.Type: GrantFiled: October 3, 2022Date of Patent: October 3, 2023Assignee: Applied Materials, Inc.Inventors: Leonid Dorf, Rajinder Dhindsa, James Rogers, Daniel Sang Byun, Evgeny Kamenetskiy, Yue Guo, Kartik Ramaswamy, Valentin N. Todorow, Olivier Luere, Linying Cui