Patents by Inventor Rajiv Yadav Ranjan

Rajiv Yadav Ranjan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9081669
    Abstract: A hybrid non-volatile memory device includes a non-volatile random access memory (NVRAM) having an array of magnetic memory elements, the NVRAM being bit-accessible. The hybrid non-volatile device further includes a non-volatile page-mode memory (PMM) made of resistive memory and organized into pages, the non-volatile PMM being page-accessible. Further included in the hybrid non-volatile memory device is a direct memory access (DMA) engine that is coupled to the NVRAM and the non-volatile PMM and transfers data between the NVRAM and the non-volatile PMM during a DMA operation.
    Type: Grant
    Filed: April 28, 2014
    Date of Patent: July 14, 2015
    Assignee: AVALANCHE TECHNOLOGY, INC.
    Inventors: Ravishankar Tadepalli, Rajiv Yadav Ranjan, Mehdi Asnaashari, Ngon Van Le, Parviz Keshtbod
  • Publication number: 20150188036
    Abstract: A spin-transfer torque magnetic random access memory (STTMRAM) element includes a composite fixed layer formed on top of a substrate and a tunnel layer formed upon the fixed layer and a composite free layer formed upon the tunnel barrier layer. The magnetization direction of each of the composite free layer and fixed layer being substantially perpendicular to the plane of the substrate. The composite layers are made of multiple repeats of a bilayer unit which consists of a non-magnetic insulating layer and magnetic layer with thicknesses adjusted in a range that makes the magnetization having a preferred direction perpendicular to film plane.
    Type: Application
    Filed: March 13, 2015
    Publication date: July 2, 2015
    Inventors: Yiming Huai, Jing Zhang, Rajiv Yadav Ranjan, Yuchen Zhou, Roger Klas Malmhall
  • Publication number: 20150188035
    Abstract: A spin-transfer torque magnetic random access memory (STTMRAM) element includes a composite fixed layer formed on top of a substrate and a tunnel layer formed upon the fixed layer and a composite free layer formed upon the tunnel barrier layer. The magnetization direction of each of the composite free layer and fixed layer being substantially perpendicular to the plane of the substrate. The composite layers are made of multiple repeats of a bilayer unit which consists of a non-magnetic insulating layer and magnetic layer with thicknesses adjusted in a range that makes the magnetization having a preferred direction perpendicular to film plane.
    Type: Application
    Filed: March 13, 2015
    Publication date: July 2, 2015
    Inventors: Yiming Huai, Jing Zhang, Rajiv Yadav Ranjan, Yuchen Zhou, Roger Klas Malmhall
  • Patent number: 9070692
    Abstract: Chip packages are described with soft-magnetic shields that are included inside or attached externally to the package containing a MRAM chip. In one group of embodiments a single shield with vias for bonding wires is affixed to the surface of the MRAM chip having the contact pads. The limitation of shield to chip distance due to bonding wire is eliminated by VIA holes according to the invention which achieves minimal spacing between the shield and chip. A second shield without vias can be positioned on the opposite side of the chip from the first shield. In one group of embodiments a hardened ferro-fluid shield can be the only shield or the structure can include a shield with or without vias. One group of embodiments includes an external shield with vias for solder access to the package contact pads affixed to the outer surface of the package.
    Type: Grant
    Filed: January 12, 2013
    Date of Patent: June 30, 2015
    Assignee: Avalanche Technology, Inc.
    Inventors: Yuchen Zhou, Bernardo Sardinha, Rajiv Yadav Ranjan, Ebrahim Abedifard, Roger Klas Malmhall, Zihui Wang, Yiming Huai, Jing Zhang
  • Publication number: 20150137293
    Abstract: A perpendicular spin-transfer torque magnetic random access memory (STTMRAM) element includes a fixed layer having a magnetization that is substantially fixed in one direction and a barrier layer formed on top of the fixed layer and a free layer. The free layer has a number of alternating laminates, each laminate being made of a magnetic layer and an insulating layer. The magnetic layer is switchable and formed on top of the barrier layer. The free layer is capable of switching its magnetization to a parallel or an anti-parallel state relative to the magnetization of the fixed layer during a write operation when bidirectional electric current is applied across the STTMRAM element. Magnetic layers of the laminates are ferromagnetically coupled to switch together as a single domain during the write operation and the magnetization of the fixed and free layers and the magnetic layers of the laminates have perpendicular anisotropy.
    Type: Application
    Filed: January 30, 2015
    Publication date: May 21, 2015
    Inventors: Yiming Huai, Rajiv Yadav Ranjan, Roger K. Malmhall
  • Patent number: 9025371
    Abstract: A perpendicular spin-transfer torque magnetic random access memory (STTMRAM) element includes a fixed layer having a magnetization that is substantially fixed in one direction and a barrier layer formed on top of the fixed layer and a free layer. The free layer has a number of alternating laminates, each laminate being made of a magnetic layer and an insulating layer. The magnetic layer is switchable and formed on top of the barrier layer. The free layer is capable of switching its magnetization to a parallel or an anti-parallel state relative to the magnetization of the fixed layer during a write operation when bidirectional electric current is applied across the STTMRAM element. Magnetic layers of the laminates are ferromagnetically coupled to switch together as a single domain during the write operation and the magnetization of the fixed and free layers and the magnetic layers of the laminates have perpendicular anisotropy.
    Type: Grant
    Filed: January 30, 2015
    Date of Patent: May 5, 2015
    Assignee: Avalanche Technology, Inc.
    Inventors: Yiming Huai, Rajiv Yadav Ranjan, Roger K. Malmhall
  • Patent number: 9019758
    Abstract: A spin transfer torque magnetic random access memory (STTMRAM) element includes a composite fixed layer formed on top of a substrate and a tunnel layer formed upon the fixed layer and a composite free layer formed upon the tunnel barrier layer. The magnetization direction of each of the composite free layer and fixed layer being substantially perpendicular to the plane of the substrate. The composite layers are made of multiple repeats of a bi-layer unit which consists of a non-magnetic insulating layer and magnetic layer with thicknesses adjusted in a range that makes the magnetization having a preferred direction perpendicular to film plane.
    Type: Grant
    Filed: September 2, 2011
    Date of Patent: April 28, 2015
    Assignee: Avalanche Technology, Inc.
    Inventors: Yiming Huai, Jing Zhang, Rajiv Yadav Ranjan, Yuchen Zhou, Roger Klas Malmhall, Ioan Tudosa
  • Patent number: 8981506
    Abstract: A perpendicular spin-transfer torque magnetic random access memory (STTMRAM) element is configured to store a state when electrical current is applied thereto. The perpendicular STTMRAM element includes a magnetization layer having a first free layer and a second free layer, separated by a non-magnetic separation layer (NMSL). The direction of magnetization of the first and second free layers each is in-plane prior to the application of electrical current and after the application of electrical current, the direction of magnetization of the second free layer becomes substantially titled out-of-plane and the direction of magnetization of the first free layer switches. Upon electrical current being discontinued, the direction of magnetization of the second free layer remains in a direction that is substantially opposite to that of the first free layer.
    Type: Grant
    Filed: June 19, 2013
    Date of Patent: March 17, 2015
    Assignee: Avalanche Technology, Inc.
    Inventors: Yuchen Zhou, Yiming Huai, Jing Zhang, Rajiv Yadav Ranjan, Roger Klas Malmhall
  • Patent number: 8982616
    Abstract: A perpendicular spin transfer torque magnetic random access memory (STTMRAM) element includes a fixed layer having a magnetization that is substantially fixed in one direction and a barrier layer formed on top of the fixed layer and a free layer. The free layer has a number of alternating laminates, each laminate being made of a magnetic layer and an insulating layer. The magnetic layer is switchable and formed on top of the barrier layer. The free layer is capable of switching its magnetization to a parallel or an anti-parallel state relative to the magnetization of the fixed layer during a write operation when bidirectional electric current is applied across the STTMRAM element. Magnetic layers of the laminates are ferromagnetically coupled to switch together as a single domain during the write operation and the magnetization of the fixed and free layers and the magnetic layers of the laminates have perpendicular anisotropy.
    Type: Grant
    Filed: November 26, 2012
    Date of Patent: March 17, 2015
    Assignee: Avalanche Technology, Inc.
    Inventors: Rajiv Yadav Ranjan, Roger Klas Malmhall, Yiming Huai
  • Patent number: 8980649
    Abstract: In accordance with a method of the present invention, a method of manufacturing a magnetic random access memory (MRAM) cell and a corresponding structure thereof are disclosed to include a multi-stage manufacturing process. The multi-stage manufacturing process includes performing a front end on-line (FEOL) stage to manufacture logic and non-magnetic portions of the memory cell by forming an intermediate interlayer dielectric (ILD) layer, forming intermediate metal pillars embedded in the intermediate ILD layer, depositing a conductive metal cap on top of the intermediate ILD layer and the metal pillars, performing magnetic fabrication stage to make a magnetic material portion of the memory cell being manufactured, and performing back end on-line (BEOL) stage to make metal and contacts of the memory cell being manufactured.
    Type: Grant
    Filed: September 16, 2013
    Date of Patent: March 17, 2015
    Assignee: Avalanche Technology, Inc.
    Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod, Roger Klas Malmhall
  • Patent number: 8975088
    Abstract: Various embodiments of the invention relate to etching processes used in fabrication of MTJ cells in an MRAM device. The various embodiments can be used in combination with each other. The first embodiment adds a hard mask buffer layer between a hard mask and a top electrode. The second embodiment uses a multilayered etching hard mask. The third embodiment uses a multilayered top electrode structure including a first Cu layer under a second layer such as Ta. The fourth embodiment is a two-phase etching process used for the bottom electrode to remove re-deposited material while maintaining a more vertical sidewall etching profile. In the first phase the bottom electrode layer is removed using carbonaceous reactive ion etching until the endpoint. In the second phase an inert gas and/or oxygen plasma is used to remove the polymer that was deposited during the previous etching processes.
    Type: Grant
    Filed: July 30, 2013
    Date of Patent: March 10, 2015
    Assignee: Avalanche Technology, Inc.
    Inventors: Kimihiro Satoh, Yiming Huai, Jing Zhang, Rajiv Yadav Ranjan, Parviz Keshtbod, Roger K. Malmhall
  • Publication number: 20150061050
    Abstract: A perpendicular spin-transfer torque magnetic random access memory (STTMRAM) element is configured to store a state when electrical current is applied thereto. The perpendicular STTMRAM element includes a magnetization layer having a first free layer and a second free layer, separated by a non-magnetic separation layer (NMSL). The direction of magnetization of the first and second free layers each is in-plane prior to the application of electrical current and after the application of electrical current, the direction of magnetization of the second free layer becomes substantially titled out-of-plane and the direction of magnetization of the first free layer switches. Upon electrical current being discontinued, the direction of magnetization of the second free layer remains in a direction that is substantially opposite to that of the first free layer.
    Type: Application
    Filed: June 19, 2013
    Publication date: March 5, 2015
    Inventors: Yuchen Zhou, Yiming Huai, Jing Zhang, Rajiv Yadav Ranjan, Roger Klas Malmhall
  • Patent number: 8947919
    Abstract: One embodiment of the present invention includes a diode-addressable current-induced magnetization switching (CIMS) memory element including a magnetic tunnel junction (MTJ) and a diode formed on top of the MTJ for addressing the MTJ.
    Type: Grant
    Filed: September 3, 2013
    Date of Patent: February 3, 2015
    Assignee: Avalanche Technology, Inc.
    Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod
  • Patent number: 8917543
    Abstract: A multi-state spin-torque transfer magnetic random access memory (STTMRAM) is formed on a film and includes a first magnetic tunneling junctions (MTJ) having a first fixed layer, a first sub-magnetic tunnel junction (sub-MTJ) layer and a first free layer. The first fixed layer and first free layer each have a first magnetic anisotropy. The STTMRAM further includes a non-magnetic spacing layer formed on top of the first MTJ layer and a second MTJ formed on top of the non-magnetic spacing layer. The second MTJ has a second fixed layer, a second sub-MTJ layer and a second free layer. The second fixed and second free layers each have a second magnetic anisotropy, wherein at least one of the first or second magnetic anisotropy is perpendicular to the plane of the film.
    Type: Grant
    Filed: May 13, 2013
    Date of Patent: December 23, 2014
    Assignee: Avalanche Technology, Inc.
    Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod
  • Patent number: 8885395
    Abstract: A magnetoresistive logic cell (MRLC) is described that includes two MTJs in series that share a common free layer (CFL). The relative magnetization orientations of the CFL and the switchable reference layer (SRL) in MTJ-1 dominate the overall resistance of the MRLC without regard to the fixed magnetization orientation of the nonswitchable reference layer in MTJ-2. The high resistance state of the MRLC occurs when the switchable reference and common free layers have opposite magnetization orientations. The low resistance state occurs when the orientations are the same. This behavior allows the MRLC to be used as a logical comparator. The CFL is switched by STT effect by application of selected relatively short voltage pulses that do not switch the SRL. The SRL is switched with reference to the CFL by a voltage effect generated by a selected longer voltage pulse that does not switch the CFL.
    Type: Grant
    Filed: February 22, 2012
    Date of Patent: November 11, 2014
    Assignee: Avalanche Technology, Inc.
    Inventors: Yuchen Zhou, Zihui Wang, Yiming Huai, Rajiv Yadav Ranjan, Roger K. Malmhall
  • Patent number: 8860158
    Abstract: A STTMRAM element includes a magnetization layer made of a first free layer and a second free layer, separated by a non-magnetic separation layer (NMSL), with the first and second free layers each having in-plane magnetizations that act on each other through anti-parallel coupling. The direction of the magnetization of the first and second free layers each is in-plane prior to the application of electrical current to the STTMRAM element and thereafter, the direction of magnetization of the second free layer becomes substantially titled out-of-plane and the direction of magnetization of the first free layer switches. Upon electrical current being discontinued to the STTMRAM element, the direction of magnetization of the second free layer remains in a direction that is substantially opposite to that of the first free layer.
    Type: Grant
    Filed: June 19, 2013
    Date of Patent: October 14, 2014
    Assignee: Avalanche Technology, Inc.
    Inventors: Yuchen Zhou, Yiming Huai, Jing Zhang, Rajiv Yadav Ranjan, Roger Klas Malmhall
  • Publication number: 20140254245
    Abstract: A hybrid non-volatile memory device includes a non-volatile random access memory (NVRAM) having an array of magnetic memory elements, the NVRAM being bit-accessible. The hybrid non-volatile device further includes a non-volatile page-mode memory (PMM) made of resistive memory and organized into pages, the non-volatile PMM being page-accessible. Further included in the hybrid non-volatile memory device is a direct memory access (DMA) engine that is coupled to the NVRAM and the non-volatile PMM and transfers data between the NVRAM and the non-volatile PMM during a DMA operation.
    Type: Application
    Filed: April 28, 2014
    Publication date: September 11, 2014
    Applicant: Avalanche Technology, Inc.
    Inventors: Ravishankar Tadepalli, Rajiv Yadav Ranjan, Mehdi Asnaashari, NGON VAN LE, Parviz Keshtbod
  • Patent number: 8802451
    Abstract: Methods of fabricating MTJ arrays using two orthogonal line patterning steps are described. Embodiments are described that use a self-aligned double patterning method for one or both orthogonal line patterning steps to achieve dense arrays of MTJs with feature dimensions one half of the minimum photo lithography feature size (F). In one set of embodiments, the materials and thicknesses of the stack of layers that provide the masking function are selected so that after the initial set of mask pads have been patterned, a sequence of etching steps progressively transfers the mask pad shape through the multiple mask layer and down through all of the MTJ cell layers to the form the complete MTJ pillars. In another set of embodiments, the MTJ/BE stack is patterned into parallel lines before the top electrode layer is deposited.
    Type: Grant
    Filed: September 11, 2012
    Date of Patent: August 12, 2014
    Assignee: Avalanche Technology Inc.
    Inventors: Roger Klas Malmhall, Kimihiro Satoh, Jing Zhang, Parviz Keshtbod, Rajiv Yadav Ranjan
  • Publication number: 20140197505
    Abstract: Chip packages are described with soft-magnetic shields that are included inside or attached externally to the package containing a MRAM chip. In one group of embodiments a single shield with vias for bonding wires is affixed to the surface of the MRAM chip having the contact pads. The limitation of shield to chip distance due to bonding wire is eliminated by VIA holes according to the invention which achieves minimal spacing between the shield and chip. A second shield without vias can be positioned on the opposite side of the chip from the first shield. In one group of embodiments a hardened ferro-fluid shield can be the only shield or the structure can include a shield with or without vias. One group of embodiments includes an external shield with vias for solder access to the package contact pads affixed to the outer surface of the package.
    Type: Application
    Filed: January 12, 2013
    Publication date: July 17, 2014
    Applicant: AVALANCHE TECHNOLOGY INC.
    Inventors: Yuchen Zhou, Bernardo Sardinha, Rajiv Yadav Ranjan, Ebrahim Abedifard, Roger Klas Malmhall, Zihui Wang, Yiming Huai, Jing Zhang
  • Patent number: 8779537
    Abstract: A spin transfer torque memory random access memory (STTMRAM) element is capable of switching states when electrical current is applied thereto for storing data and includes the following layers. An anti-ferromagnetic layer, a fixed layer formed on top of the anti-ferromagnetic layer, a barrier layer formed on top of the second magnetic layer of the fixed layer, and a free layer including a first magnetic layer formed on top of the barrier layer, a second magnetic layer formed on top of the first magnetic layer, a nonmagnetic insulating layer formed on top of the second magnetic layer and a third magnetic layer formed on top of the non-magnetic insulating layer. A capping layer is formed on top of the non-magnetic insulating layer.
    Type: Grant
    Filed: September 16, 2013
    Date of Patent: July 15, 2014
    Assignee: Avalanche Technology, Inc.
    Inventors: Yiming Huai, Rajiv Yadav Ranjan, Roger Klas Malmhall, Yuchen Zhou