Patents by Inventor Rajiv Yadav Ranjan

Rajiv Yadav Ranjan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120068236
    Abstract: A non-uniform switching based non-volatile magnetic memory element includes a fixed layer, a barrier layer formed on top of the fixed layer, a first free layer formed on top of the barrier layer, a non-uniform switching layer (NSL) formed on top of the first free layer, and a second free layer formed on top of the non-uniform switching layer. Switching current is applied, in a direction that is substantially perpendicular to the fixed layer, barrier layer, first free layer, non-uniform switching layer and the second free layer causing switching between states of the first free layer, second free layer and non-uniform switching layer with substantially reduced switching current.
    Type: Application
    Filed: November 28, 2011
    Publication date: March 22, 2012
    Applicant: AVALANCHE TECHNOLOGY, INC.
    Inventors: Rajiv Yadav Ranjan, Petro Estakhri, Mahmud Assar, Parviz Keshtbod
  • Publication number: 20120063218
    Abstract: A spin-torque transfer memory random access memory (STTMRAM) element includes a composite fixed layer formed on top of a substrate and a tunnel layer formed upon the fixed layer and a composite free layer formed upon the tunnel barrier layer, the magnetization direction of each of the composite free layer and fixed layer being substantially perpendicular to the plane of the substrate. The composite layers are made of multiple repeats of a bi-layer unit which consists of a non-magnetic insulating layer and magnetic layer with thicknesses adjusted in a range that makes the magnetization have a preferred direction perpendicular to film plane.
    Type: Application
    Filed: September 2, 2011
    Publication date: March 15, 2012
    Applicant: Avalanche Technology, Inc.
    Inventors: Yiming Huai, Jing Zhang, Rajiv Yadav Ranjan, Yuchen Zhou, Roger Klas Malmhall, Ioan Tudosa
  • Patent number: 8120949
    Abstract: A flash-RAM memory includes non-volatile random access memory (RAM) formed on a monolithic die and non-volatile page-mode memory formed on top of the non-volatile RAM, the non-volatile page-mode memory and the non-volatile RAM reside on the monolithic die.
    Type: Grant
    Filed: July 30, 2008
    Date of Patent: February 21, 2012
    Assignee: Avalanche Technology, Inc.
    Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod, Mahmud Assar
  • Publication number: 20120025338
    Abstract: A non-volatile magnetic memory element includes a number of layers one of which is a free layer which is graded. The graded free layer may include various elements with each element having a different anisotropy or it may include nonmagnetic compounds and magnetic regions with the non-magnetic compounds forming graded contents forming a unique shape such as cone shaped, diamond shaped or other shapes and whose thickness is based on the reactivity of the magnetic compound.
    Type: Application
    Filed: October 5, 2011
    Publication date: February 2, 2012
    Applicant: AVALANCHE TECHNOLOGY, INC.
    Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod, Roger Klas Malmhall
  • Publication number: 20120026785
    Abstract: A non-volatile magnetic memory element includes a number of layers one of which is a free layer which is graded. The graded free layer may include various elements with each element having a different anisotropy or it may include nonmagnetic compounds and magnetic regions with the non-magnetic compounds forming graded contents forming a unique shape such as cone shaped, diamond shaped or other shapes and whose thickness is based on the reactivity of the magnetic compound.
    Type: Application
    Filed: October 5, 2011
    Publication date: February 2, 2012
    Applicant: AVALANCHE TECHNOLOGY, INC.
    Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod, Roger Klas Malmhall
  • Publication number: 20120018823
    Abstract: A spin transfer torque memory random access memory (STTMRAM) element is capable of switching states when electrical current is applied thereto for storing data and includes the following layers. An anti-ferromagnetic layer, a fixed layer formed on top of the anti-ferromagnetic layer, a barrier layer formed on top of the second magnetic layer of the fixed layer, and a free layer including a first magnetic layer formed on top of the barrier layer, a second magnetic layer formed on top of the first magnetic layer, a non-magnetic insulating layer formed on top of the second magnetic layer and a third magnetic layer formed on top of the non-magnetic insulating layer. A capping layer is formed on top of the non-magnetic insulating layer.
    Type: Application
    Filed: May 2, 2011
    Publication date: January 26, 2012
    Applicant: AVALANCHE TECHNOLOGY, INC.
    Inventors: Yiming Huai, Rajiv Yadav Ranjan, Ioan Tudosa, Roger Klas Malmhall, Yuchen Zhou
  • Publication number: 20120002463
    Abstract: A multi-state current-switching magnetic memory element includes a stack of magnetic tunneling junction (MTJ) separated by a non-magnetic layer for storing more than one bit of information, wherein different levels of current applied to the memory element cause switching to different states.
    Type: Application
    Filed: September 16, 2011
    Publication date: January 5, 2012
    Applicant: AVALANCHE TECHNOLOGY, INC.
    Inventors: Rajiv Yadav Ranjan, Mahmud Assar, Parviz Keshtbod
  • Publication number: 20120003757
    Abstract: A multi-state current-switching magnetic memory element includes a stack of magnetic tunneling junction (MTJ) separated by a non-magnetic layer for storing more than one bit of information, wherein different levels of current applied to the memory element cause switching to different states.
    Type: Application
    Filed: September 16, 2011
    Publication date: January 5, 2012
    Applicant: AVALANCHE TECHNOLOGY, INC.
    Inventors: Rajiv Yadav Ranjan, Mahmud Assar, Parviz Keshtbod
  • Patent number: 8084835
    Abstract: A non-uniform switching based non-volatile magnetic memory element includes a fixed layer, a barrier layer formed on top of the fixed layer, a first free layer formed on top of the barrier layer, a non-uniform switching layer (NSL) formed on top of the first free layer, and a second free layer formed on top of the non-uniform switching layer. Switching current is applied, in a direction that is substantially perpendicular to the fixed layer, barrier layer, first free layer, non-uniform switching layer and the second free layer causing switching between states of the first free layer, second free layer and non-uniform switching layer with substantially reduced switching current.
    Type: Grant
    Filed: February 12, 2007
    Date of Patent: December 27, 2011
    Assignee: Avalanche Technology, Inc.
    Inventors: Rajiv Yadav Ranjan, Petro Estakhri, Mahmud Assar, Parviz Keshtbod
  • Publication number: 20110303998
    Abstract: A multi-state current-switching magnetic memory element has a magnetic tunneling junction (MTJ), for storing more than one bit of information. The MTJ includes a fixed layer, a barrier layer, and a non-uniform free layer. In one embodiment, having 2 bits per cell, when one of four different levels of current is applied to the memory element, the applied current causes the non-uniform free layer of the MTJ to switch to one of four different magnetic states. The broad switching current distribution of the MTJ is a result of the broad grain size distribution of the non-uniform free layer.
    Type: Application
    Filed: August 18, 2011
    Publication date: December 15, 2011
    Applicant: AVALANCHE TECHNOLOGY, INC.
    Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod, Roger Klas Malmhall
  • Publication number: 20110305078
    Abstract: A multi-state current-switching magnetic memory element has a magnetic tunneling junction (MTJ), for storing more than one bit of information. The MTJ includes a fixed layer, a barrier layer, and a non-uniform free layer. In one embodiment, having 2 bits per cell, when one of four different levels of current is applied to the memory element, the applied current causes the non-uniform free layer of the MTJ to switch to one of four different magnetic states. The broad switching current distribution of the MTJ is a result of the broad grain size distribution of the non-uniform free layer.
    Type: Application
    Filed: August 24, 2011
    Publication date: December 15, 2011
    Applicant: AVALANCHE TECHNOLOGY, INC.
    Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod, Roger Klas Malmhall
  • Patent number: 8063459
    Abstract: A non-volatile magnetic memory element includes a number of layers one of which is a free layer which is graded. The graded free layer may include various elements with each element having a different anisotropy or it may include nonmagnetic compounds and magnetic regions with the non-magnetic compounds forming graded contents forming a unique shape such as cone shaped, diamond shaped or other shapes and whose thickness is based on the reactivity of the magnetic compound.
    Type: Grant
    Filed: July 12, 2007
    Date of Patent: November 22, 2011
    Assignee: Avalanche Technologies, Inc.
    Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod, Roger Klas Malmhall
  • Patent number: 8058696
    Abstract: A multi-state current-switching magnetic memory element includes a stack of magnetic tunneling junction (MTJ) separated by a non-magnetic layer for storing more than one bit of information, wherein different levels of current applied to the memory element cause switching to different states.
    Type: Grant
    Filed: February 23, 2007
    Date of Patent: November 15, 2011
    Assignee: Avalanche Technology, Inc.
    Inventors: Rajiv Yadav Ranjan, Mahmud Assar, Parviz Keshtbod
  • Publication number: 20110223445
    Abstract: A method of forming a uniform thickness layer of a selected material on a surface of a substrate comprises steps of: (a) providing a multi-stage cathode sputtering apparatus comprising a group of spaced-apart cathode/target assemblies and a means for transporting at least one substrate/workpiece past each cathode/target assembly, each cathode/target assembly comprising a sputtering surface oriented substantially parallel to the first surface of the substrate during transport past the group of cathode/target assemblies, the group of cathode/target assemblies adapted for providing different angular sputtered film thickness profiles; and (b) transporting the substrate past each cathode/target assembly while providing different sputtered film thickness profiles from at least some of the cathode/target assemblies, such that a plurality of sub-layers is deposited on the surface of the substrate/workpiece which collectively form a uniform thickness layer of the selected material.
    Type: Application
    Filed: September 14, 2010
    Publication date: September 15, 2011
    Applicant: SEAGATE TECHNOLOGY LLC
    Inventors: Rajiv Yadav Ranjan, Jeffrey Shane Reiter, Thomas Patrick Nolan
  • Patent number: 8018011
    Abstract: A multi-state current-switching magnetic memory element has a magnetic tunneling junction (MTJ), for storing more than one bit of information. The MTJ includes a fixed layer, a barrier layer, and a non-uniform free layer. In one embodiment, having 2 bits per cell, when one of four different levels of current is applied to the memory element, the applied current causes the non-uniform free layer of the MTJ to switch to one of four different magnetic states. The broad switching current distribution of the MTJ is a result of the broad grain size distribution of the non-uniform free layer.
    Type: Grant
    Filed: September 24, 2007
    Date of Patent: September 13, 2011
    Assignee: Avalanche Technology, Inc.
    Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod, Roger Klas Malmhall
  • Publication number: 20110103143
    Abstract: A multi-state low-current-switching magnetic memory element (magnetic memory element) comprising a free layer, two stacks, and a magnetic tunneling junction is disclosed. The stacks and magnetic tunneling junction are disposed upon surfaces of the free layer, with the magnetic tunneling junction located between the stacks. The stacks pin magnetic domains within the free layer, creating a free layer domain wall. A current passed from stack to stack pushes the domain wall, repositioning the domain wall within the free layer. The position of the domain wall relative to the magnetic tunnel junction corresponds to a unique resistance value, and passing current from a stack to the magnetic tunnel junction reads the magnetic memory element's resistance. Thus, unique memory states may be achieved by moving the domain wall.
    Type: Application
    Filed: January 7, 2011
    Publication date: May 5, 2011
    Applicant: AVALANCHE TECHNOLOGY INC.
    Inventors: Rajiv Yadav RANJAN, Roger Klas MALMHALL, Parviz KESHTBOD
  • Publication number: 20110096593
    Abstract: A multi-state low-current-switching magnetic memory element (magnetic memory element) comprising a free layer, two stacks, and a magnetic tunneling junction is disclosed. The stacks and magnetic tunneling junction are disposed upon surfaces of the free layer, with the magnetic tunneling junction located between the stacks. The stacks pin magnetic domains within the free layer, creating a free layer domain wall. A current passed from stack to stack pushes the domain wall, repositioning the domain wall within the free layer. The position of the domain wall relative to the magnetic tunnel junction corresponds to a unique resistance value, and passing current from a stack to the magnetic tunnel junction reads the magnetic memory element's resistance. Thus, unique memory states may be achieved by moving the domain wall.
    Type: Application
    Filed: January 5, 2011
    Publication date: April 28, 2011
    Applicant: AVALANCHE TECHNOLOGY INC.
    Inventors: Rajiv Yadav RANJAN, Roger Klas MALMHALL, Parviz KESHTBOD
  • Publication number: 20110089511
    Abstract: A method of making a magnetic random access memory cell includes forming a magnetic tunnel junction (MTJ) on top of a wafer, depositing oxide on top of the MTJ, depositing a photo-resist layer on top of the oxide layer, forming a trench in the photo-resist layer and oxide layer where the trench has a width that is substantially the same as that of the MTJ. Then, the photo-resist layer is removed and a hard mask layer is deposited on top of the oxide layer in the trench and the wafer is planarized to remove the portion of the hard mask layer that is not in the trench to substantially level the top of oxide layer and the hard layer on the wafer. The remaining oxide layer is etched and the the MTJ is etched to remove the portion of the MTJ which is not covered by the hard mask layer.
    Type: Application
    Filed: December 21, 2010
    Publication date: April 21, 2011
    Applicant: AVALANCHE TECHNOLOGY, INC.
    Inventors: Parviz KESHTBOD, Roger Klas MALMHALL, Rajiv Yadav RANJAN
  • Patent number: 7869266
    Abstract: A multi-state low-current-switching magnetic memory element (magnetic memory element) comprising a free layer, two stacks, and a magnetic tunneling junction is disclosed. The stacks and magnetic tunneling junction are disposed upon surfaces of the free layer, with the magnetic tunneling junction located between the stacks. The stacks pin magnetic domains within the free layer, creating a free layer domain wall. A current passed from stack to stack pushes the domain wall, repositioning the domain wall within the free layer. The position of the domain wall relative to the magnetic tunnel junction corresponds to a unique resistance value, and passing current from a stack to the magnetic tunnel junction reads the magnetic memory element's resistance. Thus, unique memory states may be achieved by moving the domain wall.
    Type: Grant
    Filed: October 21, 2008
    Date of Patent: January 11, 2011
    Assignee: Avalanche Technology, Inc.
    Inventors: Rajiv Yadav Ranjan, Roger Klas Malmhall, Parviz Keshtbod
  • Patent number: 7837836
    Abstract: A method of forming a uniform thickness layer of a selected material on a surface of a substrate comprises steps of: (a) providing a multi-stage cathode sputtering apparatus comprising a group of spaced-apart cathode/target assemblies and a means for transporting at least one substrate/workpiece past each cathode/target assembly, each cathode/target assembly comprising a sputtering surface oriented substantially parallel to the first surface of the substrate during transport past the group of cathode/target assemblies, the group of cathode/target assemblies adapted for providing different angular sputtered film thickness profiles; and (b) transporting the substrate past each cathode/target assembly while providing different sputtered film thickness profiles from at least some of the cathode/target assemblies, such that a plurality of sub-layers is deposited on the surface of the substrate/workpiece which collectively form a uniform thickness layer of the selected material.
    Type: Grant
    Filed: February 12, 2004
    Date of Patent: November 23, 2010
    Assignee: Seagate Technology LLC
    Inventors: Rajiv Yadav Ranjan, Jeffrey Shane Reiter, Thomas Patrick Nolan