Abstract: Methods of forming wiring structures and methods of manufacturing semiconductor devices include forming a lower structure on a substrate, forming an interlayer insulating film including an opening on the lower structure, forming a liner film on an inner surface of the opening, treating a surface of the liner film by an ion bombardment, and forming a first conductive film on the liner film. The first conductive film is formed to be at least partially filled in the opening through a reflow process. Related wiring structures and semiconductor devices are also discussed.

Abstract: A semiconductor device and a method of fabricating the same are provided. The semiconductor device includes a first interlayer insulating layer including a first trench, on a substrate a first liner layer formed along a side wall and a bottom surface of the first trench and including noble metal, the noble metal belonging to one of a fifth period and a sixth period of a periodic chart that follows numbering of International Union of Pure and Applied Chemistry (IUPAC) and belonging to one of eighth to tenth groups of the periodic chart, and a first metal wire filling the first trench on the first liner layer, a top surface of the first metal wire having a convex shape toward a bottom surface of the first trench.

Abstract: Described herein are printable structures and methods for making, assembling and arranging electronic devices. A number of the methods described herein are useful for assembling electronic devices where one or more device components are embedded in a polymer which is patterned during the embedding process with trenches for electrical interconnects between device components. Some methods described herein are useful for assembling electronic devices by printing methods, such as by dry transfer contact printing methods. Also described herein are GaN light emitting diodes and methods for making and arranging GaN light emitting diodes, for example for display or lighting systems.

Abstract: Described herein are printable structures and methods for making, assembling and arranging electronic devices. A number of the methods described herein are useful for assembling electronic devices where one or more device components are embedded in a polymer which is patterned during the embedding process with trenches for electrical interconnects between device components. Some methods described herein are useful for assembling electronic devices by printing methods, such as by dry transfer contact printing methods. Also described herein are GaN light emitting diodes and methods for making and arranging GaN light emitting diodes, for example for display or lighting systems.

Abstract: Described herein are flexible and stretchable LED arrays and methods utilizing flexible and stretchable LED arrays. Assembly of flexible LED arrays alongside flexible plasmonic crystals is useful for construction of fluid monitors, permitting sensitive detection of fluid refractive index and composition. Co-integration of flexible LED arrays with flexible photodetector arrays is useful for construction of flexible proximity sensors. Application of stretchable LED arrays onto flexible threads as light emitting sutures provides novel means for performing radiation therapy on wounds.

Abstract: A capacitor and method of manufacturing the same include an insulating interlayer, a lower electrode, a protection structure, a dielectric layer and an upper electrode. The insulating interlayer may include a conductive pattern formed on a substrate. The lower electrode may be electrically connected to the conductive pattern. The protection structure may be formed on an outer sidewall of the cylindrical lower electrode and on the insulating interlayer.

Abstract: Described herein are printable structures and methods for making, assembling and arranging electronic devices. A number of the methods described herein are useful for assembling electronic devices where one or more device components are embedded in a polymer which is patterned during the embedding process with trenches for electrical interconnects between device components. Some methods described herein are useful for assembling electronic devices by printing methods, such as by dry transfer contact printing methods. Also described herein are GaN light emitting diodes and methods for making and arranging GaN light emitting diodes, for example for display or lighting systems.

Abstract: A capacitor and method of manufacturing the same include an insulating interlayer, a lower electrode, a protection structure, a dielectric layer and an upper electrode. The insulating interlayer may include a conductive pattern formed on a substrate. The lower electrode may be electrically connected to the conductive pattern. The protection structure may be formed on an outer sidewall of the cylindrical lower electrode and on the insulating interlayer.

Abstract: In a capacitor having a high dielectric constant, the capacitor includes a cylindrical lower electrode, a dielectric layer and an upper electrode. A metal oxide layer is formed on inner, top and outer surfaces of the lower electrode as the dielectric layer. A first sub-electrode is formed on a surface of the dielectric layer along the profile of the lower electrode and a second sub-electrode is continuously formed on the first sub-electrode corresponding to the top surface of the lower electrode, so an opening portion of the lower electrode is covered with the second sub-electrode. The first and second sub-electrodes include first and second metal nitride layers in which first and second stresses are applied, respectively. Directions of the first and second stresses are opposite to each other. Accordingly, cracking is minimized in the upper electrode with the high dielectric constant, thereby reducing current leakage.

Abstract: A capacitor and method of manufacturing the same include an insulating interlayer, a lower electrode, a protection structure, a dielectric layer and an upper electrode. The insulating interlayer may include a conductive pattern formed on a substrate. The lower electrode may be electrically connected to the conductive pattern. The protection structure may be formed on an outer sidewall of the cylindrical lower electrode and on the insulating interlayer.

Abstract: A metal layer can be formed in an integrated circuit by forming a metal-nitride layer in a recess including a first concentration of nitrogen in the metal-nitride layer at a bottom of the recess that is less than a second concentration of nitrogen in the metal-nitride layer proximate an opening of the recess. A metal layer can be formed on the metal-nitride layer including in the recess.

Abstract: A method of fabricating a storage capacitor includes depositing a first titanium nitride layer on a dielectric layer using a chemical vapor deposition technique or an atomic layer deposition technique performed at a first temperature with reactant gases of titanium chloride (TiCl4) gas and ammonia (NH3) gas at a predetermined flow ratio and depositing a second titanium nitride layer on the first titanium nitride layer using a chemical vapor deposition process performed at a second temperature that is greater than the first temperature with reactant gases of titanium chloride (TiCl4) gas and ammonia (NH3) gas.

Abstract: A semiconductor memory device and a method of manufacturing the semiconductor memory device, in which a bit line can have a low resistance without an increase in the thickness of the bit line. In the semiconductor memory device, an insulating layer having a contact hole that exposes a conductive region is formed on a semiconductor substrate having the conductive region. A barrier metal layer is formed along the surface of the insulating layer and the surface of the contact hole. A grain control layer is formed between the barrier metal layer and the tungsten layer. A tungsten layer is formed on the grain control layer. A grain size of the tungsten layer is increased by the grain control layer.

Abstract: In a capacitor having a high dielectric constant, the capacitor includes a cylindrical lower electrode, a dielectric layer and an upper electrode. A metal oxide layer is formed on inner, top and outer surfaces of the lower electrode as the dielectric layer. A first sub-electrode is formed on a surface of the dielectric layer along the profile of the lower electrode and a second sub-electrode is continuously formed on the first sub-electrode corresponding to the top surface of the lower electrode, so an opening portion of the lower electrode is covered with the second sub-electrode. The first and second sub-electrodes include first and second metal nitride layers in which first and second stresses are applied, respectively. Directions of the first and second stresses are opposite to each other. Accordingly, cracking is minimized in the upper electrode with the high dielectric constant, thereby reducing current leakage.

Abstract: In a capacitor having a high dielectric constant, the capacitor includes a cylindrical lower electrode, a dielectric layer and an upper electrode. A metal oxide layer is formed on inner, top and outer surfaces of the lower electrode as the dielectric layer. A first sub-electrode is formed on a surface of the dielectric layer along the profile of the lower electrode and a second sub-electrode is continuously formed on the first sub-electrode corresponding to the top surface of the lower electrode, so an opening portion of the lower electrode is covered with the second sub-electrode. The first and second sub-electrodes include first and second metal nitride layers in which first and second stresses are applied, respectively. Directions of the first and second stresses are opposite to each other. Accordingly, cracking is minimized in the upper electrode with the high dielectric constant, thereby reducing current leakage.

Abstract: A memory device using a phase change material and a method for forming the same are disclosed. One embodiment of a memory device includes a first insulating layer provided on a substrate and defining an opening; a first conductor including a first portion and a second portion, the first portion provided on a bottom of the opening, the second portion being continuously provided along a sidewall of the opening; a variable resistor connected to the second portion of the first conductor and provided along the sidewall of the opening; and a second conductor provided on the variable resistor.

Abstract: Methods of forming a storage capacitor include forming an interlayer insulation layer having an opening there through on a semiconductor substrate, forming a contact plug in the opening, forming a molding oxide layer on the interlayer insulation layer and the contact plug, selectively removing portions of the molding oxide layer to form a recess above the contact plug, forming a titanium layer on a bottom surface and side surfaces of the recess, forming a titanium nitride layer on the titanium layer, and forming a titanium oxide nitride layer on the titanium nitride layer. A storage capacitor includes a semiconductor substrate, an interlayer insulation layer having a contact plug therein on the substrate, and a storage electrode on the contact plug including a titanium silicide layer, a titanium nitride layer on the titanium silicide layer, and a titanium oxide nitride layer on the titanium nitride layer.

Abstract: Methods of forming a storage capacitor include forming an interlayer insulation layer having an opening therethrough on a semiconductor substrate, forming a contact plug in the opening, forming a molding oxide layer on the interlayer insulation layer and the contact plug, selectively removing portions of the molding oxide layer to form a recess above the contact plug, forming a titanium layer on a bottom surface and side surfaces of the recess, forming a titanium nitride layer on the titanium layer, and forming a titanium oxide nitride layer on the titanium nitride layer. A storage capacitor includes a semiconductor substrate, an interlayer insulation layer having a contact plug therein on the substrate, and a storage electrode on the contact plug including a titanium silicide layer, a titanium nitride layer on the titanium silicide layer, and a titanium oxide nitride layer on the titanium nitride layer.

Abstract: Provided is a method of forming a barrier metal layer of a semiconductor device. In the method, a barrier metal layer is formed on a top surface of a semiconductor substrate and then an electrode layer is formed on the semiconductor substrate. Forming the barrier metal layer includes performing a cyclic process repeatedly at least twice. The cyclic process includes depositing a titanium layer and nitriding the deposited titanium layer.

Abstract: According to an embodiment of the present invention, a method for cleaning a process chamber includes removing a TiAlN layer from an inner wall of the process chamber using a first cleaning gas containing a TiCl4 gas. According to principles of this invention, dry cleaning, without wet cleaning, is possible for cleaning the process chamber.