Patents by Inventor Ralf Jonczyk
Ralf Jonczyk has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20210288207Abstract: A method includes etching silicon using a mixture of nitric acid and hydrofluoric acid in which less than 6 mols of hydrofluoric acid is used to etch one mol of silicon. The etching may be conducted at an elevated temperature, such as a temperature of at least 70 degrees Celsius.Type: ApplicationFiled: March 15, 2021Publication date: September 16, 2021Inventors: Ralf JONCZYK, Patrick MCMAHON
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Patent number: 10770613Abstract: A semiconductor wafer forms on a mold containing a dopant. The dopant dopes a melt region adjacent the mold. There, dopant concentration is higher than in the melt bulk. A wafer starts solidifying. Dopant diffuses poorly in solid semiconductor. After a wafer starts solidifying, dopant can not enter the melt. Afterwards, the concentration of dopant in the melt adjacent the wafer surface is less than what was present where the wafer began to form. New wafer regions grow from a melt region whose dopant concentration lessens over time. This establishes a dopant gradient in the wafer, with higher concentration adjacent the mold. The gradient can be tailored. A gradient gives rise to a field that can function as a drift or back surface field. Solar collectors can have open grid conductors and better optical reflectors on the back surface, made possible by the intrinsic back surface field.Type: GrantFiled: September 4, 2019Date of Patent: September 8, 2020Assignee: 1366 TECHNOLOGIES INC.Inventors: Ralf Jonczyk, Brian D. Kernan, G.D. Stephen Hudelson, Adam M. Lorenz, Emanuel M. Sachs
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Patent number: 10633765Abstract: A main crucible of molten semiconductor is replenished from a supply crucible maintained such that there are always two phases of solid and liquid semiconductor within the supply crucible. Heat added to melt the solid material results in the solid material changing phase to liquid, but will not result in any significant elevation in temperature of the liquid within the supply crucible. The temperature excursions are advantageously small, being less than that which would cause problems with the formed product. The solid product material acts as a sort of temperature buffer, to maintain the supply liquid temperature automatically and passively at or very near to the phase transition temperature. For silicon, excursions are kept to less than 90° C., and even as small as 50° C. The methods also are useful with germanium. Prior art silicon methods that entirely melt the semiconductor experience excursions exceeding 100° C.Type: GrantFiled: April 28, 2016Date of Patent: April 28, 2020Assignee: 1366 TECHNOLOGIES, INC.Inventors: Ralf Jonczyk, Richard L Wallace, David S Harvey
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Publication number: 20190393375Abstract: A semiconductor wafer forms on a mold containing a dopant. The dopant dopes a melt region adjacent the mold. There, dopant concentration is higher than in the melt bulk. A wafer starts solidifying. Dopant diffuses poorly in solid semiconductor. After a wafer starts solidifying, dopant can not enter the melt. Afterwards, the concentration of dopant in the melt adjacent the wafer surface is less than what was present where the wafer began to form. New wafer regions grow from a melt region whose dopant concentration lessens over time. This establishes a dopant gradient in the wafer, with higher concentration adjacent the mold. The gradient can be tailored. A gradient gives rise to a field that can function as a drift or back surface field. Solar collectors can have open grid conductors and better optical reflectors on the back surface, made possible by the intrinsic back surface field.Type: ApplicationFiled: September 4, 2019Publication date: December 26, 2019Inventors: RALF JONCZYK, BRIAN D. KERNAN, G.D. STEPHEN HUDELSON, ADAM M. LORENZ, EMANUEL M. SACHS
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Patent number: 10439095Abstract: A semiconductor wafer forms on a mold containing a dopant. The dopant dopes a melt region adjacent the mold. There, dopant concentration is higher than in the melt bulk. A wafer starts solidifying. Dopant diffuses poorly in solid semiconductor. After a wafer starts solidifying, dopant cannot enter the melt. Afterwards, the concentration of dopant in the melt adjacent the wafer surface is less than what was present where the wafer began to form. New wafer regions grow from a melt region whose dopant concentration lessens over time. This establishes a dopant gradient in the wafer, with higher concentration adjacent the mold. The gradient can be tailored. A gradient gives rise to a field that can function as a drift or back surface field. Solar collectors can have open grid conductors and better optical reflectors on the back surface, made possible by the intrinsic back surface field.Type: GrantFiled: October 14, 2015Date of Patent: October 8, 2019Assignee: 1366 TECHNOLOGIES, INC.Inventors: Ralf Jonczyk, Brian D. Kernan, G. D. Stephen Hudelson, Adam M. Lorenz, Emanuel M. Sachs
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Patent number: 10072351Abstract: Semi-conductor wafers with thin and thicker regions at controlled locations may be for Photovoltaics. The interior may be less than 180 microns or thinner, to 50 microns, with a thicker portion, at 180-250 microns. Thin wafers have higher efficiency. A thicker perimeter provides handling strength. Thicker stripes, landings and islands are for metallization coupling. Wafers may be made directly from a melt upon a template with regions of different heat extraction propensity arranged to correspond to locations of relative thicknesses. Interstitial oxygen is less than 6×1017 atoms/cc, preferably less than 2×1017, total oxygen less than 8.75×1017 atoms/cc, preferably less than 5.25×1017. Thicker regions form adjacent template regions having relatively higher heat extraction propensity; thinner regions adjacent regions with lesser extraction propensity. Thicker template regions have higher extraction propensity. Functional materials upon the template also have differing extraction propensities.Type: GrantFiled: April 17, 2015Date of Patent: September 11, 2018Assignee: 1366 Technologies, Inc.Inventors: Emanuel M. Sachs, Ralf Jonczyk, Adam L. Lorenz, Richard L. Wallace, G. D. Stephen Hudelson
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Publication number: 20180119309Abstract: A main crucible of molten semiconductor is replenished from a supply crucible maintained such that there are always two phases of solid and liquid semiconductor within the supply crucible. Heat added to melt the solid material results in the solid material changing phase to liquid, but will not result in any significant elevation in temperature of the liquid within the supply crucible. The temperature excursions are advantageously small, being less than that which would cause problems with the formed product. The solid product material acts as a sort of temperature buffer, to maintain the supply liquid temperature automatically and passively at or very near to the phase transition temperature. For silicon, excursions are kept to less than 90° C., and even as small as 50° C. The methods also are useful with germanium. Prior art silicon methods that entirely melt the semiconductor experience excursions exceeding 100° C.Type: ApplicationFiled: April 28, 2016Publication date: May 3, 2018Applicant: 1366 TECHNOLOGIES, INC.Inventors: RALF JONCZYK, RICHARD L WALLACE, DAVID S HARVEY
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Publication number: 20180019365Abstract: A semiconductor wafer forms on a mold containing a dopant. The dopant dopes a melt region adjacent the mold. There, dopant concentration is higher than in the melt bulk. A wafer starts solidifying. Dopant diffuses poorly in solid semiconductor. After a wafer starts solidifying, dopant can not enter the melt. Afterwards, the concentration of dopant in the melt adjacent the wafer surface is less than what was present where the wafer began to form. New wafer regions grow from a melt region whose dopant concentration lessens over time. This establishes a dopant gradient in the wafer, with higher concentration adjacent the mold. The gradient can be tailored. A gradient gives rise to a field that can function as a drift or back surface field. Solar collectors can have open grid conductors and better optical reflectors on the back surface, made possible by the intrinsic back surface field.Type: ApplicationFiled: October 14, 2015Publication date: January 18, 2018Applicant: 1366 TECHNOLOGIES, INC.Inventors: RALF JONCZYK, KERNAN D BRIAN, G.D. STEPHEN HUDELSON, RICHARD L. WALLACE, ADAM M LORENZ
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Patent number: 9643342Abstract: A pressure differential can be applied across a mold sheet and a semiconductor (e.g. silicon) wafer (e.g. for solar cell) is formed thereon. Relaxation of the pressure differential can allow release of the wafer. The mold sheet may be cooler than the melt. Heat is extracted through the thickness of the forming wafer. The temperature of the solidifying body is substantially uniform across its width, resulting in low stresses and dislocation density and higher crystallographic quality. The mold sheet can allow flow of gas through it. The melt can be introduced to the sheet by: full area contact with the top of a melt; traversing a partial area contact of melt with the mold sheet, whether horizontal or vertical, or in between; and by dipping the mold into a melt. The grain size can be controlled by many means.Type: GrantFiled: April 11, 2014Date of Patent: May 9, 2017Assignee: 1366 Technologies, Inc.Inventors: Emanuel M. Sachs, Richard L. Wallace, Eerik T. Hantsoo, Adam M. Lorenz, G. D. Stephen Hudelson, Ralf Jonczyk
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Publication number: 20170051429Abstract: Semi-conductor wafers with thin and thicker regions at controlled locations may be for Photovoltaics. The interior may be less than 180 microns or thinner, to 50 microns, with a thicker portion, at 180-250 microns. Thin wafers have higher efficiency. A thicker perimeter provides handling strength. Thicker stripes, landings and islands are for metallization coupling. Wafers may be made directly from a melt upon a template with regions of different heat extraction propensity arranged to correspond to locations of relative thicknesses. Interstitial oxygen is less than 6×1017 atoms/cc, preferably less than 2×1017, total oxygen less than 8.75×1017 atoms/cc, preferably less than 5.25×1017. Thicker regions form adjacent template regions having relatively higher heat extraction propensity; thinner regions adjacent regions with lesser extraction propensity. Thicker template regions have higher extraction propensity. Functional materials upon the template also have differing extraction propensities.Type: ApplicationFiled: April 17, 2015Publication date: February 23, 2017Applicant: 1366 TECHNOLOGIES, INC.Inventors: EMANUEL M. SACHS, RALF JONCZYK, ADAM L. LORENZ, RICHARD L. WALLACE, G.D. STEPHEN HUDELSON
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Patent number: 9419167Abstract: An interposer sheet can be used for making semiconductor bodies, such as of silicon, such as for solar cell use. It is free-standing, very thin, flexible, porous and able to withstand the chemical and thermal environment of molten semiconductor without degradation. It is typically of a ceramic material, such as silica, silicon nitride, silicon oxynitride, silicon oxycarbide, silicon carbide, silicon carbonitride, silicon oxycarbonitride and others. It is provided between a forming surface of a mold sheet, and the molten material from which a semiconductor body will be formed. It may be secured to the forming surface or deposited upon the melt. The interposer sheet suppresses grain nucleation, and limits heat flow from the melt. It promotes separation of the semiconductor body from the forming surface. It can be fabricated before its use. Because free-standing and not adhered to the forming surface, problems of mismatch of CTE are minimized.Type: GrantFiled: December 1, 2011Date of Patent: August 16, 2016Assignee: 1366 Technologies, Inc.Inventors: Ralf Jonczyk, Emanuel M. Sachs
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Publication number: 20140220171Abstract: A pressure differential can be applied across a mold sheet and a semiconductor (e.g. silicon) wafer (e.g. for solar cell) is formed thereon. Relaxation of the pressure differential can allow release of the wafer. The mold sheet may be cooler than the melt. Heat is extracted through the thickness of the forming wafer. The temperature of the solidifying body is substantially uniform across its width, resulting in low stresses and dislocation density and higher crystallographic quality. The mold sheet can allow flow of gas through it. The melt can be introduced to the sheet by: full area contact with the top of a melt; traversing a partial area contact of melt with the mold sheet, whether horizontal or vertical, or in between; and by dipping the mold into a melt. The grain size can be controlled by many means.Type: ApplicationFiled: April 11, 2014Publication date: August 7, 2014Applicant: 1366 TECHNOLOGIES, INC.Inventors: Emanuel M. Sachs, Richard L. Wallace, Eerik T. Hantsoo, Adam M. Lorenz, G.D. Stephen Hudelson, Ralf Jonczyk
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Publication number: 20140113156Abstract: An interposer sheet can be used for making semiconductor bodies, such as of silicon, such as for solar cell use. It is free-standing, very thin, flexible, porous and able to withstand the chemical and thermal environment of molten semiconductor without degradation. It is typically of a ceramic material, such as silica, silicon nitride, silicon oxynitride, silicon oxycarbide, silicon carbide, silicon carbonitride, silicon oxycarbonitride and others. It is provided between a forming surface of a mold sheet, and the molten material from which a semiconductor body will be formed. It may be secured to the forming surface or deposited upon the melt. The interposer sheet suppresses grain nucleation, and limits heat flow from the melt. It promotes separation of the semiconductor body from the forming surface. It can be fabricated before its use. Because free-standing and not adhered to the forming surface, problems of mismatch of CTE are minimized.Type: ApplicationFiled: December 1, 2011Publication date: April 24, 2014Applicant: 1366 Technologies, Inc.Inventors: Ralf Jonczyk, Emanuel M. Sachs
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Patent number: 8696810Abstract: A pressure differential is applied across a mold sheet and a semiconductor (e.g. silicon) wafer (e.g. for solar cell) is formed thereon. Relaxation of the pressure differential allows release of the wafer. The mold sheet may be cooler than the melt. Heat is extracted almost exclusively through the thickness of the forming wafer. The liquid and solid interface is substantially parallel to the mold sheet. The temperature of the solidifying body is substantially uniform across its width, resulting in low stresses and dislocation density and higher crystallographic quality. The mold sheet must allow flow of gas through it. The melt can be introduced to the sheet by: full area contact with the top of a melt; traversing a partial area contact of melt with the mold sheet, whether horizontal or vertical, or in between; and by dipping the mold into a melt. The grain size can be controlled by many means.Type: GrantFiled: October 18, 2012Date of Patent: April 15, 2014Assignee: 1366 Technologies, Inc.Inventors: Eerik T. Hantsoo, G. D. Stephen Hudelson, Ralf Jonczyk, Adam M. Lorenz, Emanuel M. Sachs, Richard L. Wallace
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Patent number: 8334194Abstract: Methods and apparatus for fabricating a semiconductor sheet are provided. In one aspect, a method for fabricating a semiconductor wafer includes applying a layer of semiconductor material across a portion of a setter material, introducing the setter material and the semiconductor material to a predetermined thermal gradient to form a melt, wherein the thermal gradient includes a predetermined nucleation and growth region, and forming at least one local cold spot in the nucleation and growth region to facilitate inducing crystal nucleation at the at least one desired location.Type: GrantFiled: February 6, 2008Date of Patent: December 18, 2012Assignee: Motech Americas, LLCInventors: Ralf Jonczyk, James Rand
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Patent number: 8293009Abstract: A pressure differential is applied across a mold sheet and a semiconductor (e.g. silicon) wafer (e.g. for solar cell) is formed thereon. Relaxation of the pressure differential allows release of the wafer. The mold sheet may be cooler than the melt. Heat is extracted almost exclusively through the thickness of the forming wafer. The liquid and solid interface is substantially parallel to the mold sheet. The temperature of the solidifying body is substantially uniform across its width, resulting in low stresses and dislocation density and higher crystallographic quality. The mold sheet must allow flow of gas through it. The melt can be introduced to the sheet by: full area contact with the top of a melt; traversing a partial area contact of melt with the mold sheet, whether horizontal or vertical, or in between; and by dipping the mold into a melt. The grain size can be controlled by many means.Type: GrantFiled: November 17, 2011Date of Patent: October 23, 2012Assignee: 1366 Technologies Inc.Inventors: Emanuel M. Sachs, Richard L. Wallace, Eerik T. Hantsoo, Adam M. Lorenz, G. D. Stephen Hudelson, Ralf Jonczyk
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Publication number: 20120067273Abstract: A pressure differential is applied across a mold sheet and a semiconductor (e.g. silicon) wafer (e.g. for solar cell) is formed thereon. Relaxation of the pressure differential allows release of the wafer. The mold sheet may be cooler than the melt. Heat is extracted almost exclusively through the thickness of the forming wafer. The liquid and solid interface is substantially parallel to the mold sheet. The temperature of the solidifying body is substantially uniform across its width, resulting in low stresses and dislocation density and higher crystallographic quality. The mold sheet must allow flow of gas through it. The melt can be introduced to the sheet by: full area contact with the top of a melt; traversing a partial area contact of melt with the mold sheet, whether horizontal or vertical, or in between; and by dipping the mold into a melt. The grain size can be controlled by many means.Type: ApplicationFiled: November 17, 2011Publication date: March 22, 2012Applicant: 1366 TECHNOLOGIES INC.Inventors: Emanuel M. Sachs, Richard L. Wallace, Eerik T. Hantsoo, Adam M. Lorenz, G. D. Stephen Hudelson, Ralf Jonczyk
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Patent number: 8062704Abstract: A method of making a release coating includes the following steps: forming a mixture that includes (a) solid components comprising (i) 20-99% silicon by weight and (ii) 1-80% silicon nitride by weight and (b) a solvent; applying the mixture to an inner portion of a crucible or graphite board adapted to form an ingot or wafer comprising silicon; and annealing the mixture in a nitrogen atmosphere at a temperature ranging from 1000 to 2000° C. The invention may also relate to release coatings and methods of making a silicon ingot or wafer including the use of a release coating.Type: GrantFiled: August 2, 2007Date of Patent: November 22, 2011Assignee: Motech Americas, LLCInventor: Ralf Jonczyk
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Publication number: 20110247549Abstract: A pressure differential is applied across a mold sheet and a semiconductor (e.g. silicon) wafer is formed thereon. Relaxation of the pressure differential allows release of the wafer. The mold sheet may be cooler than the melt. Heat is extracted almost exclusively through the thickness of the forming wafer. The liquid and solid interface is substantially parallel to the mold sheet. The temperature of the solidifying body is substantially uniform across its width, resulting in low stresses and dislocation density and higher crystallographic quality. The mold sheet must allow flow of gas through it. The melt can be introduced to the sheet by: full area contact with the top of a melt; traversing a partial area contact of melt with the mold sheet, whether horizontal or vertical, or in between; and by dipping the mold into a melt. The grain size can be controlled by many means.Type: ApplicationFiled: March 9, 2010Publication date: October 13, 2011Applicant: 1366 TECHNOLOGIES INC.Inventors: Emanuel M. Sachs, Richard L. Wallace, Eerik T. Hantsoo, Adam M. Lorenz, G. D. Stephen Hudelson, Ralf Jonczyk
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Patent number: 8003882Abstract: Methods and systems for photovoltaic roofing systems are provided. The system includes a back sheet including a length, L, a width, W, and a thickness, T, the back sheet including an overlap portion extending along length L having a width, WO and an active portion extending along length L having a width, WA. The system also includes a photovoltaic cell formed on a surface of the active portion, the photovoltaic cell including a photovoltaic member electrically responsive to an absorption of photons, a negative electrode coupled to a surface of the photovoltaic member, and a positive electrode coupled to the surface of the photovoltaic member, wherein the thickness T is selected such that thickness T plus a thickness of the photoelectric cell substantially match a thickness of a proximate non-photovoltaic roofing member when the photovoltaic roofing system is installed.Type: GrantFiled: November 7, 2006Date of Patent: August 23, 2011Assignee: General Electric CompanyInventors: Stephen George Pisklak, James Allan Rand, Ralf Jonczyk, Alysha Grenko