Patents by Inventor Ramakrishna Huggahalli

Ramakrishna Huggahalli has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7360027
    Abstract: An arrangement is provided for an external agent to initiate data prefetches from a system memory to a cache associated with a target processor, which needs the data to execute a program, in a computing system. When the external agent has data, it may create and issue a prefetch directive. The prefetch directive may be sent along with system interconnection transactions or sent as a separate transaction to devices including the target processor in the system. When receiving and recognizing the prefetch directive, a hardware prefetcher associated with the target processor may issue a request to the system memory to prefetch data to the cache. The target processor can access data in the cache more efficiently than it accesses data in the system memory. Some pre-processing may also be associated with the data prefetch.
    Type: Grant
    Filed: October 15, 2004
    Date of Patent: April 15, 2008
    Assignee: Intel Corporation
    Inventors: Ramakrishna Huggahalli, Brannon J. Batson, Raymond S. Tetrick, Robert G. Blankenship
  • Publication number: 20070156968
    Abstract: Embodiments of an apparatus, method, and system for encoding direct cache access transactions based on a memory access data structure are disclosed. In one embodiment, an apparatus includes memory access logic and transaction logic. The memory access logic is to determine whether to allow a memory access based on a memory access data structure. The transaction logic is to assign direct cache access attributes to a transaction based on the memory access data structure.
    Type: Application
    Filed: December 30, 2005
    Publication date: July 5, 2007
    Inventors: Rajesh Madukkarumukumana, Sridhar Muthrasanallur, Ramakrishna Huggahalli, Rameshkumar Illikkal
  • Publication number: 20060085602
    Abstract: An arrangement is provided for an external agent to initiate data prefetches from a system memory to a cache associated with a target processor, which needs the data to execute a program, in a computing system. When the external agent has data, it may create and issue a prefetch directive. The prefetch directive may be sent along with system interconnection transactions or sent as a separate transaction to devices including the target processor in the system. When receiving and recognizing the prefetch directive, a hardware prefetcher associated with the target processor may issue a request to the system memory to prefetch data to the cache. The target processor can access data in the cache more efficiently than it accesses data in the system memory. Some pre-processing may also be associated with the data prefetch.
    Type: Application
    Filed: October 15, 2004
    Publication date: April 20, 2006
    Inventors: Ramakrishna Huggahalli, Brannon Batson, Raymond Tetrick, Robert Blankenship