Abstract: A system is disclosed. An upstream interface enables communication with a processor; a downstream interface enables communication with a storage device. The system may also include an acceleration module implemented using hardware to execute an acceleration instruction. The storage device may include an endpoint of the storage device for communicating with the acceleration module, a controller to manage operations of the storage device, storage for data, and a storage device acceleration module to assist the acceleration module in executing the acceleration instruction.

Abstract: Systems and methods for executing a data processing function are disclosed. A first processing device of a storage accelerator loads a first instruction set associated with a first application of a host computing device. A second processing device of the storage accelerator loads a second instruction set associated with the first application. A command is received from the host computing device. The command may be associated with data associated with the first application. The first processing device identifies at least a first criterion or a second criterion associated with the data. The first processing device processes the data according to the first instruction set in response to identifying the first criterion. The first processing device writes the data to a buffer of the second processing device in response to identifying the second criterion. The second processing device processes the data in the buffer according to the second instruction set.

Abstract: Systems and methods for processing storage transactions are disclosed. A transaction between a storage device and a host computing device is identified. The storage device determines that the transaction satisfies a criterion, and inserts data into a packet associated with the transaction. The data may be for identifying a memory subsystem of the host computing device. The storage device transmits the packet, including the data, to the host computing device for storing the packet in the memory subsystem based on the data.

Abstract: A device includes a communications circuit configured to communicate with a storage device controller and a host device. The device further includes a processing device configured to receive a request from the storage device controller through the communications circuit. The request requests encrypted data be written to a memory address of the host device. The processing device is further configured to identify a key associated with the write request based on the memory address. The processing device is further configured to generate a decrypted version of the data based on the key. The processing device is further configured to initiate transfer, through the communications circuit, of the decrypted version of the data to the host device.

Abstract: A system is disclosed. An upstream interface enables communication with a processor; a downstream interface enables communication with a storage device. The system may also include an acceleration module implemented using hardware to execute an acceleration instruction. The storage device may include an endpoint of the storage device for communicating with the acceleration module, a controller to manage operations of the storage device, storage for data, and a storage device acceleration module to assist the acceleration module in executing the acceleration instruction.

Abstract: A storage device may include a storage medium, a storage device controller coupled to the storage medium, a host interface coupled to the storage device controller, and an attachable module interface configured to connect an attachable compute module to the storage device controller. The attachable module interface may include a data interface, a side-band interface, and/or a power interface. The attachable module interface may include a connector configured to connect the attachable compute module to the storage device controller. The storage device may include an enclosure having an opening configured to enable the attachable compute module to be connected to the attachable module interface through the opening. The storage device controller may be configured to utilize one or more resources of the attachable compute module. The storage device controller may be configured to communicate with the attachable compute module through one or more command extensions of a storage protocol.

Abstract: A system includes a plurality of storage processing accelerators (SPAs), at least one SPA of the plurality of SPAs including a plurality of programmable processors or storage processing engines (SPEs), the plurality of SPEs including n SPEs (n is a natural number greater than zero), where 1st to (n?1) SPEs of the n SPEs are configured to provide an output of the SPE to a next SPE of the n SPEs in a pipeline to be used as an input of the next SPE; and an acceleration platform manager (APM) connected to the plurality of the SPAs and the plurality of SPEs, and configured to control data processing in the plurality of SPAs and the plurality of SPEs.

Abstract: A storage device is disclosed. The storage device may include storage to store data and a controller to manage reading data from and writing data to the storage. The controller may also include a receiver to receive a plurality of requests, information determination logic to determine information about the plurality of requests, storage for the information about a plurality of requests, and sharing logic to share the information with a management controller.

Abstract: A system and a method to detect malicious software written to an Ethernet solid-state drive (eSSD). The system includes an Ethernet switch, at least one SSD, and a baseboard management controller (BMC). The Ethernet switch receives write data from a communication network in response to a write command. The at least one SSD receives the write data from the Ethernet switch and stores the received write data. The BMC receives from the at least one SSD the received write data. The BMC determines whether the received write data contains malicious software. The received write data may be contained in a plurality of Ethernet packets in which case the BMC stores the received write data in a scan buffer in an order that is based on an assembled order of the received write data.

Abstract: A system is disclosed. An upstream interface enables communication with a processor; a downstream interface enables communication with a storage device. The system may also include an acceleration module implemented using hardware to execute an acceleration instruction. The storage device may include an endpoint of the storage device for communicating with the acceleration module, a controller to manage operations of the storage device, storage for data, and a storage device acceleration module to assist the acceleration module in executing the acceleration instruction.

Abstract: Provided are systems, methods, and apparatuses for providing storage-efficient sensors. A method can include: using a discovery service to determine one or more parameters associated with a storage device via a network over a medium; transmitting data from at least one sensor to a storage device via the network over the medium; processing the data and storing at least a portion of the data at the storage device; and transmitting at least a second portion of the data via the network to at least one host.

Abstract: According to one general aspect, a device may include a host interface circuit configured to communicate with a host device via a data protocol that employs data messages. The device may include a storage element configured to store data in response to a data message. The host interface circuit may be configured to detect when a tunneling command is embedded within the data message; extract a tunneled message address information from the data message; retrieve, via the tunneled message address information, a tunneled message stored in a memory of the host device; and route the tunneled message to an on-board processor and/or data processing logic. The on-board processor and/or data processing logic may be configured to execute one or more instructions in response to the tunneled message.

Abstract: A multiple function storage device is disclosed. The multiple function storage device may include an enclosure, a storage device associated with the enclosure, and an bridging device associated with the enclosure. The storage device may include a connector to receive a first message using a first protocol originating at a host, a physical function (PF) and a virtual function (VF) exposed by the storage device via the connector, storage for data relating to the first message, and a controller to manage writing a write data to the storage and reading a read data from the storage.

Abstract: A method may include receiving, at a storage device, a command for a data transfer between the storage device and a host, determining a specified data rate for the data transfer, and performing the data transfer between the storage device and the host based on the command, wherein the storage device may control the data transfer based on the specified data rate. The data transfer may include a peak portion and an idle portion. The method may further include controlling, at the storage device, a peak portion and an idle portion of the data transfer based on the specified data rate. The method may further include controlling, at the storage device, the data transfer based on a peak burst size. The specified data rate may be received from the host and/or determined by the storage device by monitoring one or more parameters of a data transfer.

Abstract: A Lightweight Bridge (LWB) is disclosed. The LWB may be a circuit. An endpoint of the LWB that may expose a plurality of Physical Functions (PFs) to a host. A root port of the LWB may connect to a device and determine the PFs and Virtual Functions (VFs) exposed by the device. An Application Layer-Endpoint (APP-EP) and an Application Layer-Root Port (APP-RP) may translate between the PFs exposed by the endpoint and the PFs/VFs exposed by the device. The APP-EP and the APP-RP may implement a mapping between the PFs exposed by the endpoint and the PFs/VFs exposed by the device.

Abstract: Provided are systems, methods, and apparatuses for providing storage-efficient sensors. A method can include: using a discovery service to determine one or more parameters associated with a storage device via a network over a medium; transmitting data from at least one sensor to a storage device via the network over the medium; processing the data and storing at least a portion of the data at the storage device; and transmitting at least a second portion of the data via the network to at least one host.

Abstract: A system includes a plurality of storage processing accelerators (SPAs), at least one SPA of the plurality of SPAs including a plurality of programmable processors or storage processing engines (SPEs), the plurality of SPEs including n SPEs (n is a natural number greater than zero), where 1st to (n?1) SPEs of the n SPEs are configured to provide an output of the SPE to a next SPE of the n SPEs in a pipeline to be used as an input of the next SPE; and an acceleration platform manager (APM) connected to the plurality of the SPAs and the plurality of SPEs, and configured to control data processing in the plurality of SPAs and the plurality of SPEs.

Abstract: A system is disclosed that provides emergency backup power to a solid-state drive (SSD) that may not contain any internal supercapacitors. The SSD may include a first connector and a hold-up power supply. The first connector may have a predetermined form factor and may being capable of being connected to a corresponding connector of a midplane of a storage system. The first connector may include a main power connection that is connected to a main power supply of the midplane if the first connector is connected to the corresponding connector of the midplane. The hold-up power supply may be internal to the SSD, and may receive hold-up energy from an external energy source for a predetermined amount of time after the first connector has been disconnected from the main power connection of the midplane so that the SSD may store any host data write requests that the SSD has acknowledged.

Abstract: A Lightweight Bridge (LWB) is disclosed. The LWB may be a circuit. An endpoint of the LWB that may expose a plurality of Physical Functions (PFs) to a host. A root port of the LWB may connect to a device and determine the PFs and Virtual Functions (VFs) exposed by the device. An Application Layer-Endpoint (APP-EP) and an Application Layer-Root Port (APP-RP) may translate between the PFs exposed by the endpoint and the PFs/VFs exposed by the device. The APP-EP and the APP-RP may implement a mapping between the PFs exposed by the endpoint and the PFs/VFs exposed by the device.

Abstract: According to one general aspect, a device may include a host interface circuit configured to communicate with a host device via a data protocol that employs data messages. The device may include a storage element configured to store data in response to a data message. The host interface circuit may be configured to detect when a tunneling command is embedded within the data message; extract a tunneled message address information from the data message; retrieve, via the tunneled message address information, a tunneled message stored in a memory of the host device; and route the tunneled message to an on-board processor and/or data processing logic. The on-board processor and/or data processing logic may be configured to execute one or more instructions in response to the tunneled message.