Patents by Inventor Ramesh Raghavan

Ramesh Raghavan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260155164
    Abstract: Disclosed are a word line (WL) driver and a memory structure including a WL driver system with multiple WL drivers. The WL driver includes a write WL voltage (VWL) control node, a read VWL control node, and an output node. First and second transistors are connected in series between the write VWL control node and the output node. Third and fourth transistors are connected in parallel between the read VWL control node and the output node. The first, second, and third transistors are P-type field effect transistors (PFETs) and the fourth transistor is an N-type field effect transistor (NFET). Additional NFETs are connected between the output node and ground and, optionally, between the gate and source of the second transistor. All transistors are the same gate dielectric type.
    Type: Application
    Filed: December 2, 2024
    Publication date: June 4, 2026
    Inventors: Ramesh Raghavan, Dharmaraju Vasantada, Amit Kumar Shukla, Bipul C. Paul
  • Publication number: 20260101503
    Abstract: Disclosed is a dual-antifuse (DAF) device with two electrically isolated antifuses. The DAF device includes a gate structure including a dielectric layer lining a recess in a semiconductor layer between first and second conductive regions and a conductor layer on the dielectric layer. A gate cut isolation structure extends through the conductor layer, dividing the conductor layer into first and second conductor sections. As a result, the device includes a first antifuse (i.e., the first conductor section, the first conductive region, and the dielectric layer therebetween) and a second antifuse (i.e., a second conductor section, the second conductive region, and the dielectric layer therebetween), which is isolated from the first antifuse. Thus, the two antifuses are independently programable.
    Type: Application
    Filed: October 9, 2024
    Publication date: April 9, 2026
    Inventors: Ramesh Raghavan, Bipul C. Paul, Siva Kumar Chinthu
  • Patent number: 12571530
    Abstract: A solid-state lighting fixture assembly having a lighting fixture with a socket configured to receive a plug associated with one or more accessories to allow for easy in-field mounting of accessories, e.g., controls, onto installed lighting fixtures. The socket may be internally electrically connected to an auxiliary power output of a driver and/or to a battery power pack within the lighting fixture assembly, thereby providing direct-current voltage power for the accessory and, also, allowing for signal transmission to and from the accessory. Each accessory includes one or more sensors and communication components to provide the connected lighting fixture assembly with specific capabilities including, but not limited to, motion detection, ambient light level detection, ambient temperature measurement and wireless communications.
    Type: Grant
    Filed: August 15, 2025
    Date of Patent: March 10, 2026
    Assignee: MAXLITE, INC.
    Inventors: Ramesh Raghavan, Aymen Chami, Eric Clohosey, Stephen Andrew Entrekin, Xiaoming Dai
  • Publication number: 20260047085
    Abstract: Disclosed is a memory cell including a dual-antifuse device between a first pass-gate transistor and a second pass-gate transistor. The dual-antifuse device includes first and second antifuses having a common terminal and each also having an additional terminal opposite the common terminal. The first pass-gate transistor is connected between a first bitline and the additional terminal of the first pass-gate transistor. The second pass-gate transistor is connected between a second bitline and the additional terminal of the second pass-gate transistor. The common terminal of the first and second antifuses and gates of the first and second pass-gate transistors are connected to a wordline. Also disclosed is a memory structure including an array of such memory cells and an associated operating method. Within the array, different wordline and bitline bias conditions can be employed in order to reliably perform programming or read operations of a selected antifuse in a selected cell.
    Type: Application
    Filed: August 12, 2024
    Publication date: February 12, 2026
    Inventors: Ramesh Raghavan, Bipul C. Paul, Thirunavukkarasu Ranganathan
  • Patent number: 12532746
    Abstract: Embodiments of the disclosure provide a structure and related method for a gate over semiconductor regions that are not aligned. Structures according to the disclosure include a first semiconductor region extending from a first widthwise end to a second widthwise end within a substrate. A second semiconductor region is adjacent the first semiconductor region and extends from a first widthwise end to a second widthwise end within the substrate. The second widthwise end of the second semiconductor region is non-aligned with the second widthwise end of the first semiconductor region. A gate structure is over the substrate and extends widthwise over the first semiconductor region and the second semiconductor region.
    Type: Grant
    Filed: August 31, 2023
    Date of Patent: January 20, 2026
    Assignee: GlobalFoundries U.S. Inc.
    Inventors: David Charles Pritchard, Ramesh Raghavan, Thirunavukkarasu Ranganathan, Rajesh Reddy Tummuru, Benoit Francois Claude Ramadout, Luca Pirro
  • Publication number: 20250383074
    Abstract: A solid-state lighting fixture assembly having a lighting fixture with a socket configured to receive a plug associated with one or more accessories to allow for easy in-field mounting of accessories, e.g., controls, onto installed lighting fixtures. The socket may be internally electrically connected to an auxiliary power output of a driver and/or to a battery power pack within the lighting fixture assembly, thereby providing direct-current voltage power for the accessory and, also, allowing for signal transmission to and from the accessory. Each accessory includes one or more sensors and communication components to provide the connected lighting fixture assembly with specific capabilities including, but not limited to, motion detection, ambient light level detection, ambient temperature measurement and wireless communications.
    Type: Application
    Filed: August 15, 2025
    Publication date: December 18, 2025
    Inventors: Ramesh Raghavan, Aymen Chami, Eric Clohosey, Stephen Andrew Entrekin, Xiaoming Dai
  • Patent number: 12455070
    Abstract: A solid-state lighting fixture assembly having a lighting fixture with a socket configured to receive a plug associated with one or more accessories to allow for easy in-field mounting of accessories, e.g., controls, onto installed lighting fixtures. The socket may be internally electrically connected to an auxiliary power output of a driver and/or to a battery power pack within the lighting fixture assembly, thereby providing direct-current voltage power for the accessory and, also, allowing for signal transmission to and from the accessory. Each accessory includes one or more sensors and communication components to provide the connected lighting fixture assembly with specific capabilities including, but not limited to, motion detection, ambient light level detection, ambient temperature measurement and wireless communications.
    Type: Grant
    Filed: June 23, 2025
    Date of Patent: October 28, 2025
    Assignee: MAXLITE, INC.
    Inventors: Ramesh Raghavan, Aymen Chami, Eric Clohosey, Stephen Andrew Entrekin, Xiaoming Dai
  • Publication number: 20250320993
    Abstract: A solid-state lighting fixture assembly having a lighting fixture with a socket configured to receive a plug associated with one or more accessories to allow for easy in-field mounting of accessories, e.g., controls, onto installed lighting fixtures. The socket may be internally electrically connected to an auxiliary power output of a driver and/or to a battery power pack within the lighting fixture assembly, thereby providing direct-current voltage power for the accessory and, also, allowing for signal transmission to and from the accessory. Each accessory includes one or more sensors and communication components to provide the connected lighting fixture assembly with specific capabilities including, but not limited to, motion detection, ambient light level detection, ambient temperature measurement and wireless communications.
    Type: Application
    Filed: June 23, 2025
    Publication date: October 16, 2025
    Inventors: Ramesh Raghavan, Aymen Chami, Eric Clohosey, Stephen Andrew Entrekin, Xiaoming Dai
  • Patent number: 12387796
    Abstract: Embodiments of the disclosure provide a memory assembly with body biasing and related methods to operate such a structure. A structure according to the disclosure includes a memory cell having a pair of memory transistors each having a gate coupled to a word line. A pair of diode-connected transistors each have a source/drain (S/D) terminal coupled to a respective S/D terminal of one of the pair of memory transistors through a multiplexer. A bias voltage source is coupled to each body of the pair of diode-connected transistors or each body of the pair of memory transistors. The bias voltage source applies a different bias voltage to each body of the pair of diode-connected transistors or each body of the pair of memory transistors.
    Type: Grant
    Filed: March 6, 2023
    Date of Patent: August 12, 2025
    Assignee: GlobalFoundries U.S. Inc.
    Inventors: Ramesh Raghavan, Chandrahasa Reddy Dinnipati, Philipp Bernhard Mosch
  • Patent number: 12338984
    Abstract: A solid-state lighting fixture assembly having a lighting fixture with a socket configured to receive a plug associated with one or more accessories to allow for easy in-field mounting of accessories, e.g., controls, onto installed lighting fixtures. The socket may be internally electrically connected to an auxiliary power output of a driver and/or to a battery power pack within the lighting fixture assembly, thereby providing direct-current voltage power for the accessory and, also, allowing for signal transmission to and from the accessory. Each accessory includes one or more sensors and communication components to provide the connected lighting fixture assembly with specific capabilities including, but not limited to, motion detection, ambient light level detection, ambient temperature measurement and wireless communications.
    Type: Grant
    Filed: May 15, 2024
    Date of Patent: June 24, 2025
    Assignee: MAXLITE, INC
    Inventors: Ramesh Raghavan, Aymen Chami, Eric Clohosey, Stephen Andrew Entrekin, Xiaoming Dai
  • Publication number: 20250079343
    Abstract: Embodiments of the disclosure provide a structure and related method for a gate over semiconductor regions that are not aligned. Structures according to the disclosure include a first semiconductor region extending from a first widthwise end to a second widthwise end within a substrate. A second semiconductor region is adjacent the first semiconductor region and extends from a first widthwise end to a second widthwise end within the substrate. The second widthwise end of the second semiconductor region is non-aligned with the second widthwise end of the first semiconductor region. A gate structure is over the substrate and extends widthwise over the first semiconductor region and the second semiconductor region.
    Type: Application
    Filed: August 31, 2023
    Publication date: March 6, 2025
    Inventors: David Charles Pritchard, Ramesh Raghavan, Thirunavukkarasu Ranganathan, Rajesh Reddy Tummuru, Benoit Francois Claude Ramadout, Luca Pirro
  • Patent number: 12176053
    Abstract: The present disclosure relates to integrated circuits, and more particularly, to a wordline system architecture supporting an erase operation and current-voltage (I-V) characterization and methods of manufacture and operation. In particular, the present disclosure relates to a structure including: a twin cell circuit which is connected to a wordline of a memory array; a sourceline driver which is connected to a sourceline of the memory array for providing a cell level current-voltage (I-V) access of the twin cell circuit; and an integrated analog multiplexor which is connected to the twin cell circuit.
    Type: Grant
    Filed: July 20, 2021
    Date of Patent: December 24, 2024
    Assignee: GLOBALFOUNDRIES U.S. Inc.
    Inventors: Ramesh Raghavan, Balaji Jayaraman, Ming Yin
  • Publication number: 20240302032
    Abstract: A solid-state lighting fixture assembly having a lighting fixture with a socket configured to receive a plug associated with one or more accessories to allow for easy in-field mounting of accessories, e.g., controls, onto installed lighting fixtures. The socket may be internally electrically connected to an auxiliary power output of a driver and/or to a battery power pack within the lighting fixture assembly, thereby providing direct-current voltage power for the accessory and, also, allowing for signal transmission to and from the accessory. Each accessory includes one or more sensors and communication components to provide the connected lighting fixture assembly with specific capabilities including, but not limited to, motion detection, ambient light level detection, ambient temperature measurement and wireless communications.
    Type: Application
    Filed: May 15, 2024
    Publication date: September 12, 2024
    Inventors: Ramesh Raghavan, Aymen Chami, Eric Clohosey, Stephen Andrew Entrekin, Xiaoming Dai
  • Publication number: 20240304258
    Abstract: Embodiments of the disclosure provide a memory assembly with body biasing and related methods to operate such a structure. A structure according to the disclosure includes a memory cell having a pair of memory transistors each having a gate coupled to a word line. A pair of diode-connected transistors each have a source/drain (S/D) terminal coupled to a respective S/D terminal of one of the pair of memory transistors through a multiplexer. A bias voltage source is coupled to each body of the pair of diode-connected transistors or each body of the pair of memory transistors. The bias voltage source applies a different bias voltage to each body of the pair of diode-connected transistors or each body of the pair of memory transistors.
    Type: Application
    Filed: March 6, 2023
    Publication date: September 12, 2024
    Inventors: Ramesh Raghavan, Chandrahasa Reddy Dinnipati, Philipp Bernhard Mosch
  • Patent number: 12051465
    Abstract: Disclosed is a sense circuit with first and second branches connected to first and second inputs of an amplifier. The first branch includes series-connected first transistors between a voltage rail and a data line and a first node between two first transistors and connected to the first input. First transistors on either side of the first node receive corresponding gate bias voltages. The second branch includes series-connected second transistors between the voltage rail and a reference device and a second node between two second transistors and connected to the second input. One first transistor and one second transistor share a common control signal. The first and second branches independently and concurrently generate data and reference voltages on the first and second nodes and the difference between them is sensed by the amplifier. Also disclosed are a non-volatile memory structure incorporating the sense circuit and a method.
    Type: Grant
    Filed: July 14, 2022
    Date of Patent: July 30, 2024
    Assignee: GlobalFoundries U.S. Inc.
    Inventors: Chandrahasa Reddy Dinnipati, Bipul C. Paul, Ramesh Raghavan
  • Patent number: 11988370
    Abstract: A solid-state lighting fixture assembly having a lighting fixture with a socket configured to receive a plug associated with one or more accessories to allow for easy in-field mounting of accessories, e.g., controls, onto installed lighting fixtures. The socket may be internally electrically connected to an auxiliary power output of a driver and/or to a battery power pack within the lighting fixture assembly, thereby providing direct-current voltage power for the accessory and, also, allowing for signal transmission to and from the accessory. Each accessory includes one or more sensors and communication components to provide the connected lighting fixture assembly with specific capabilities including, but not limited to, motion detection, ambient light level detection, ambient temperature measurement and wireless communications.
    Type: Grant
    Filed: December 7, 2022
    Date of Patent: May 21, 2024
    Assignee: MAXLITE, INC
    Inventors: Ramesh Raghavan, Aymen Chami, Eric Clohosey, Stephen Andrew Entrekin, Xiaoming Dai
  • Patent number: 11881241
    Abstract: A structure includes an array of nonvolatile memory cells, wordlines and bitlines connected to the nonvolatile memory cells, sense amplifiers connected to the nonvolatile memory cells, and reference cells connected to the sense amplifiers. Each of the reference cells has a transistor connected to a variable resistor, one of the wordlines, a reference bitline separate from the bitlines, and the sense amplifiers.
    Type: Grant
    Filed: March 31, 2022
    Date of Patent: January 23, 2024
    Assignee: GlobalFoundries U.S. Inc.
    Inventors: Chandrahasa Reddy Dinnipati, Ramesh Raghavan, Bipul C. Paul
  • Patent number: 11881258
    Abstract: Embodiments of the present disclosure provide an apparatus including: a sense amplifier coupled to a memory array and having a set of output terminals, a latch coupled to a first output terminal of the sense amplifier, and a comparator coupled to the latch and a second output terminal of the sense amplifier.
    Type: Grant
    Filed: July 16, 2021
    Date of Patent: January 23, 2024
    Assignee: GlobalFoundries U.S. Inc.
    Inventors: Ramesh Raghavan, Balaji Jayaraman, Chandrahasa Reddy Dinnipati
  • Publication number: 20240021243
    Abstract: Disclosed is a sense circuit with first and second branches connected to first and second inputs of an amplifier. The first branch includes series-connected first transistors between a voltage rail and a data line and a first node between two first transistors and connected to the first input. First transistors on either side of the first node receive corresponding gate bias voltages. The second branch includes series-connected second transistors between the voltage rail and a reference device and a second node between two second transistors and connected to the second input. One first transistor and one second transistor share a common control signal. The first and second branches independently and concurrently generate data and reference voltages on the first and second nodes and the difference between them is sensed by the amplifier. Also disclosed are a non-volatile memory structure incorporating the sense circuit and a method.
    Type: Application
    Filed: July 14, 2022
    Publication date: January 18, 2024
    Inventors: Chandrahasa Reddy Dinnipati, Bipul C. Paul, Ramesh Raghavan
  • Publication number: 20230317130
    Abstract: A structure includes an array of nonvolatile memory cells, wordlines and bitlines connected to the nonvolatile memory cells, sense amplifiers connected to the nonvolatile memory cells, and reference cells connected to the sense amplifiers. Each of the reference cells has a transistor connected to a variable resistor, one of the wordlines, a reference bitline separate from the bitlines, and the sense amplifiers.
    Type: Application
    Filed: March 31, 2022
    Publication date: October 5, 2023
    Applicant: GlobalFoundries U.S. Inc.
    Inventors: Chandrahasa Reddy Dinnipati, Ramesh Raghavan, Bipul C. Paul