Abstract: A network device includes a packet processor that: determines at least one egress port via which a received packet is to be transmitted by the network device; modifies one or more fields in a header of the packet to generate a modified header; determines, based at least in part on the modified header, whether the packet a) is to be transmitted or b) is to be discarded; and stores the modified header in a packet memory. In response to the determination that the packet is to be transmitted, a transmit processor of the network device: retrieves a payload of the packet from the packet memory; retrieves the modified header from the packet memory; generates a transmit packet at least by combining the payload of the packet with the modified header; and transmits the transmit packet via the determined at least one egress port of the network device.

Abstract: A network device includes a rate measurement circuit that is configured to measure respective egress rates at which respective data is being transmitted via respective ports associated with the network device. A marking ratio determination circuit is configured to select respective marking ratios based on respective measured egress rates, the marking ratios for marking packets to be transmitted via the respective ports to indicate respective levels of congestion corresponding to the respective ports. Different marking ratios correspond to different measured egress rates. A packet editor circuit is configured to mark selected packets to be transmitted via respective ports according to the respective selected marking ratios. The respective selected marking ratios indicate to other communication devices that respective network paths via which the selected packets travelled experienced congestion, and the respective marking ratios indicate respective levels of congestion.

Abstract: Packets to be transmitted from a network device are buffered in queues in a first packet memory. In response to detecting congestion in a queue in the first packet memory, groups of multiple packets are transferred from the first packet memory to a second packet memory, the second packet memory configured to buffer a portion of traffic bandwidth supported by the network device. Prior to transmission of the packets among the one or more groups of multiple packets from the network device, packets among the one or more groups of multiple packets are transferred from the second packet memory back to the first packet memory. The packets transferred from the second packet memory back to the first packet memory are retrieved from the first packet memory and are forwarded to one or more network ports for transmission of the packets from the network device.

Abstract: At least a payload of a packet that is received by a network device is stored in a packet memory. The packet is processed at least to determine at least one egress port via which the packet is to be transmitted, modify a header of the packet to generate a modified header, and determine, based at least in part on the modified header, whether the packet is to be transmitted or to be discarded by the network device. In response to determining that the packet is to be transmitted, the at least the payload of the packet is retrieved from the packet memory, a transmit packet is generated at least by combining the at least the payload of the packet with the modified header, and the transmit packet is transmitted via the determined at least one egress port of the network device.

Abstract: Flow state information that is stored in a first memory among a plurality of memories for maintaining flow state information at a network device is updated based on packets ingressing the network device. The memories are arranged in a hierarchical arrangement in which memories at progressively higher levels of hierarchy are configured to maintain flow state information corresponding to progressively larger sets of flows processed by the network device. When it is determined that a fullness level of the first memory exceeds a first threshold, flow state information associated with at least one flow, among a first set of flows for which flow state information is currently being maintained in the first memory, is transferred from the first memory to a second memory, the second memory being at a higher hierarchical level than the first memory. A new flow is instantiated in space freed up in the first memory.

Abstract: A network device includes a transmit buffer from which data is transmitted to a network, and a packet buffer from which data chunks are transmitted to the transmit buffer in response to read requests. The packet buffer has a maximum read latency from receipt of a read request to transmission of a responsive data chunk, and receives read requests including a read request for a first data chunk of a network packet and a plurality of additional read requests for additional data chunks of the network packet. A latency timer monitors elapsed time from receipt of the first read request, and outputs a latency signal when the elapsed time reaches the first maximum read latency. Transmission logic waits until the elapsed time equals the first maximum read latency, and then transmits the first data chunk from the transmit buffer, without regard to a fill level of the transmit buffer.

Abstract: A source switching device in a switching system receives information measured by a target switching device in the switching system. The information is indicative of an amount of data received in a given amount of time by the target switching device via each of two or more first links coupled to the target switching device. The source switching device determines, based at least in part on the information received from the target device, a path, from among multiple paths from the source switching device to the target switching device, for transmission of a packet flow directed to the target switching device. The source switching device transmits, via the determined path for transmission of the packet flow to the target device, one or more packets belonging to the packet flow.

Abstract: In a network device, a flow classification hardware engine is configured to: store flow state information regarding known flows of packets in a flow information table in association with respective assigned flow identifiers (IDs). The assigned flow IDs are from an ordered set of M flow IDs, where M is a positive integer. In response to detecting new flows of packets, the flow classification hardware engine: i) assigns respective flow IDs, from the ordered set of M flow IDs, to the new flows, and ii) creates respective entries in the flow information table for the new flows. An embedded processor periodically, as part of a background process: i) identifies an oldest assigned flow ID, from the ordered set of M flow IDs, and ii) makes storage space in the flow information table corresponding to the oldest assigned flow ID available for a new flow.

Abstract: A network device for a communications network includes a port configured to transmit data to the network at a maximum transmit data rate. The device also includes a transmit buffer configured to buffer data units that are ready for transmission to the network, and a packet buffer configured to buffer data units before the data units are ready for transmission. The packet buffer is configured to output data units at a maximum packet buffer transmission rate faster than the maximum transmit data rate. The device includes a rate controller configured to control a transmission rate of data from the packet buffer to the transmit buffer so that averaged over a period, the transmission rate from the packet buffer to the transmit buffer is at most equal to the maximum transmit data rate, while allowing the transmission rate, at one or more time intervals, to exceed the maximum transmit data rate.

Abstract: A network device includes a transmit buffer from which data is transmitted to a network, and a packet buffer from which data chunks are transmitted to the transmit buffer in response to read requests. The packet buffer has a maximum read latency from receipt of a read request to transmission of a responsive data chunk, and receives read requests including a read request for a first data chunk of a network packet and a plurality of additional read requests for additional data chunks of the network packet. A latency timer monitors elapsed time from receipt of the first read request, and outputs a latency signal when the elapsed time reaches the first maximum read latency. Transmission logic waits until the elapsed time equals the first maximum read latency, and then transmits the first data chunk from the transmit buffer, without regard to a fill level of the transmit buffer.

Abstract: A network device for a communications network includes a port configured to transmit data to the network at a maximum transmit data rate. The device also includes a transmit buffer configured to buffer data units that are ready for transmission to the network, and a packet buffer configured to buffer data units before the data units are ready for transmission. The packet buffer is configured to output data units at a maximum packet buffer transmission rate faster than the maximum transmit data rate. The device includes a rate controller configured to control a transmission rate of data from the packet buffer to the transmit buffer so that averaged over a period, the transmission rate from the packet buffer to the transmit buffer is at most equal to the maximum transmit data rate, while allowing the transmission rate, at one or more time intervals, to exceed the maximum transmit data rate.

Abstract: A packet received by a network device via a network. A first portion of the packet is stored in a packet memory, the first portion including at least a payload of the packet. The packet is processed based on information from a header of the packet. After the packet is processed, a second portion of the packet is stored in the packet memory, the second portion including at least a portion of the header of the packet. When the packet is to be transmitted the first portion of the packet and the second portion of the packet are retrieved from the packet memory, and the first portion and the second portion are combined to generate a transmit packet. The transmit packet is forwarded to a port of the network device for transmission of the transmit packet via port of the network device.

Abstract: A network device comprises a network interface configured to transmit packets via a network link, and timestamp circuitry configured to modify a packet that is to be transmitted by the network interface circuitry by embedding a future timestamp in the packet. The future timestamp corresponds to a transmit time at which the packet is to be transmitted by the network interface circuitry, and the transmit time occurs after the timestamp circuitry embeds the timestamp in the packet. Time gating circuitry is configured to i) receive the packet, ii) determine when a current time indicated by a clock circuit reaches the transmit time, iii) hold the packet from proceeding to the network interface circuitry prior to the current time reaching the transmit time, and iv) release the packet in response to the current time reaching the transmit time.

Abstract: At least a packet header of a packet received by a network device is provided to a programmable header alteration engine that includes a hardware input processor implemented in hardware and a programmable header alteration processor configured to execute computer readable instructions stored in a program memory. The hardware input processor determines whether the packet header is to be provided to a processing path coupled to the programmable header alteration processor or to be diverted to a bypass path that bypasses the programmable header alteration processor, and the packet header is provided to the processing path or to the bypass path based on the determination. The packet header is selectively i) processed by the programmable header alteration processor when the packet header is provided to the processing path and ii) not processed by the programmable header alteration processor when the packet header is provided to the bypass path.

Abstract: A network device includes a transfer buffer having a plurality of memory banks, and a transfer buffer controller configured to perform a first number of write operations to write processed packets into a memory bank of the transfer buffer, monitor occupancy of the transfer buffer, and when occupancy of the transfer buffer is at least equal to a threshold, perform a predetermined number of read operations during each memory cycle, and when occupancy of the transfer buffer is less than the threshold, perform a second number of read operations, greater than the predetermined number, during each memory cycle. The device concurrently performs multiple read operations and multiple write operations in a single cycle using a plurality of ports. The buffer controller distributes data among the memory banks by allocating write addresses to keep memory occupancy substantially uniform among the memory banks, thereby freeing ports to allow performance of read operations.

Abstract: At least a payload of a packet that is received by a network device is stored in a packet memory. The packet is processed at least to determine at least one egress port via which the packet is to be transmitted, modify a header of the packet to generate a modified header, and determine, based at least in part on the modified header, whether the packet is to be transmitted or to be discarded by the network device. In response to determining that the packet is to be transmitted, the at least the payload of the packet is retrieved from the packet memory, a transmit packet is generated at least by combining the at least the payload of the packet with the modified header, and the transmit packet is transmitted via the determined at least one egress port of the network device.

Abstract: A packet received by a network device via a network. A first portion of the packet is stored in a packet memory, the first portion including at least a payload of the packet. The packet is processed based on information from a header of the packet. After the packet is processed, a second portion of the packet is stored in the packet memory, the second portion including at least a portion of the header of the packet. When the packet is to be transmitted the first portion of the packet and the second portion of the packet are retrieved from the packet memory, and the first portion and the second portion are combined to generate a transmit packet.

Abstract: A method for processing network packets in a network device is described. A network packet is stored in a transient buffer as the network packet is being received at an ingress port of the network device. After at least a first portion of the network packet has been received and before the entire network packet has been received: the first portion is processed to identify an egress port of the network device from which the network packet is to be transmitted; a congestion state of the egress port is determined; and the network packet is selectively transferred from the transient buffer to the identified egress port for transmission from the network device or a different action is performed on the network packet, based on the congestion state.

Abstract: A packet is received at a network device. The packet is processed by the network device to determine at least one egress port via which to transmit the packet, and to perform egress classification of the packet based at least in part on information determined for the packet during processing of the packet. Egress classification includes determining whether the packet should not be transmitted by the network device. When it is not determined that the packet should not be transmitted by the network device, a copy of the packet is generated for mirroring of the packet to a destination other than the determined at least one egress port, and the packet is enqueued in an egress queue corresponding to the determined at least one egress port. The packet is subsequently transferred to the determined at least one egress port for transmission of the packet.

Abstract: A network device comprises time measurement units configured to measure receipt times and transmit times of packets received/transmitted via network interfaces. One or more memories store configuration information that indicates certain network interface pairs and/or certain packet flows that are enabled for latency measurement. A packet processor includes a latency monitoring trigger unit configured to select, using the configuration information, packets that are forwarded between the certain network interface pairs and/or that belong to the certain packet flows for latency monitoring.