Abstract: An amplifier includes a negative gain amplifier, a load element, and a transconductance device. The negative gain amplifier has an input and an output. The load element has a first terminal coupled to a power supply voltage terminal, and a second terminal. The transconductance device has a first current electrode coupled to the second terminal of the load element, a control electrode coupled to the output of the negative gain amplifier, and a second current electrode coupled to the input of the negative gain amplifier.

Abstract: A receiver circuit includes an analog front-end and a digital processing unit. The analog front-end includes an input for receiving a radio frequency (RF) signal, a first control input for receiving a gain adjustment signal, a second control input for receiving a timing signal, and a signal output for providing a digital intermediate frequency (IF) signal. The analog front-end updates gains of a plurality of gain stages according to the gain adjustment signal and in synchronism with the timing signal. The digital processing unit is configured to produce at least one output signal derived from the digital IF signal. The digital processing unit includes a timing recovery circuit configured to generate the timing signal based on the digital IF signal to control timing of the updating gains of each of the plurality of adjustable gain stages.

Abstract: In one embodiment, an internal buffer may be provided within an integrated circuit (IC) to convert a signal to an output current to be output via a pin of the IC, under control of a switch which can be controlled based on a configuration setting of the IC, and may selectively directly couple the signal to the pin when the IC is coupled to an external driver circuit.

Abstract: A frequency synthesizer includes a controlled oscillator configured to extend a temperature range and phase noise of the synthesizer without compromising the frequency coverage of the synthesizer. The frequency synthesizer also includes bias generation circuitry that sets a bias current of a charge pump to reduce bandwidth variations of the synthesizer. The frequency synthesizer further includes switching circuitry to dynamically turn a charge pump on and off to reduce effects of current leakage in the charge pump.

Abstract: An integrated receiver includes a first signal processing path, a second signal processing path, and a controller. The first signal processing path has an input and an output for providing a first processed signal, and comprises a first tracking bandpass filter having a first integrated inductor formed with windings in a first number of metal layers of the integrated receiver. The second signal processing path has an input and an output for providing a second processed signal, and comprises a second tracking bandpass filter having a second integrated inductor formed with windings in a second number of metal layers of the integrated receiver. The second number of windings is lower than the first number. The controller enables one of the first and second signal processing paths corresponding to a selected channel of a radio frequency (RF) input signal to provide an output signal.

Abstract: In one embodiment, an internal buffer may be provided within an integrated circuit (IC) to convert a signal to an output current to be output via a pin of the IC, under control of a switch which can be controlled based on a configuration setting of the IC, and may selectively directly couple the signal to the pin when the IC is coupled to an external driver circuit.

Abstract: A receiver includes an input section, a plurality of RF sections, an output circuit, and a controller. The input section receives and amplifies a radio frequency (RF) input signal to provide an amplified RF signal, and has a gain input. The plurality of RF sections each have an input for receiving the amplified RF signal, and an output for providing an intermediate frequency signal. The output circuit provides an intermediate frequency output signal in response to an output of at least one of the plurality of RF sections. The controller has an output coupled to the gain input of the input section.

Abstract: In one embodiment, an internal buffer may be provided within an integrated circuit (IC) to convert a signal to an output current to be output via a pin of the IC, under control of a switch which can be controlled based on a configuration setting of the IC, and may selectively directly couple the signal to the pin when the IC is coupled to an external driver circuit.

Abstract: A low noise amplifier (LNA) for use in a receiver circuit includes an adjustable impedance network including an input for receiving a radio frequency signal, a plurality of control inputs, and an output. The LNA further includes a controller coupled to the plurality of control inputs and configured to control an impedance of the adjustable impedance network. The controller controls the adjustable impedance network to provide a relatively low impedance in a terrestrial mode and to provide a relatively high impedance in a cable mode.

Abstract: A shielded differential inductor forms a high quality factor (high-Q) inductor that is configured to attenuate frequency spurs and/or noise from magnetic coupling generated by electrical structures on or off of a substrate as well as interference received by other components from magnetic coupling generated by the inductor. The shielded differential inductor includes a differential inductor and a shield that substantially isolates the electrical field between the inductor and the substrate to reduce substrate current loss. The shield includes sets of finger structures that extend beyond the width of the inductor and a hub and spoke configuration of ground conductors that connect the sets of finger structures to ground.

Abstract: A receiver includes an input section, a plurality of RF sections, an output circuit, and a controller. The input section receives and amplifies a radio frequency (RF) input signal to provide an amplified RF signal, and has a gain input. The plurality of RF sections each have an input for receiving the amplified RF signal, and an output for providing an intermediate frequency signal. The output circuit provides an intermediate frequency output signal in response to an output of at least one of the plurality of RF sections. The controller has an output coupled to the gain input of the input section.

Abstract: An integrated wideband receiver includes first and second signal processing paths and a controller. The first signal processing path has an input, and an output for providing a first processed signal, and comprises a first tracking bandpass filter having a first integrated inductor. The second signal processing path has an input, and an output for providing a second processed signal, and comprises a second tracking bandpass filter having a second integrated inductor. The controller is for enabling one of the first and second signal processing paths corresponding to a selected channel of a radio frequency (RF) input signal to provide an output signal. The controller, the first integrated inductor, and said second integrated inductor are formed on a single integrated circuit chip.

Abstract: A receiver (100) includes a first element (110) with a signal input, a control input, a signal output, and gain steps of a first magnitude, a signal processing circuit (120-168) with a signal input coupled to the first element, and a signal output, a second element (180) that has a signal input coupled to signal processing circuit, a control input, a signal output, and gain steps of a second magnitude smaller than the first magnitude, and a controller (180) that has a control output coupled to the first element (110), a control output coupled to the second element (180), and that adjusts receiver (100) gain by changing the first element (110) gain by a first magnitude, changing the second element (180) gain by substantially an inverse first magnitude, and subsequently changing the gain of the second element (180) by steps of the second magnitude to achieve a desired gain.

Abstract: In one embodiment, a set of tracking filters to be coupled between an amplifier and a mixer is provided. The tracking filters may be differently configured depending on band of operation. For example, a first set of the filters can be configured to maintain a substantially constant Q value across their operating bandwidth while a second set of the filters can be configured to maintain a substantially constant bandwidth across their operating bandwidth.

Abstract: A low noise amplifier (LNA) for use in a receiver circuit includes an adjustable impedance network including an input for receiving a radio frequency signal, a plurality of control inputs, and an output. The LNA further includes a controller coupled to the plurality of control inputs and configured to control an impedance of the adjustable impedance network. The controller controls the adjustable impedance network to provide a relatively low impedance in a terrestrial mode and to provide a relatively high impedance in a cable mode.

Abstract: A low-noise amplifier includes first and second transconductance paths and first and second variable capacitive dividers. The first transconductance path has a first terminal for receiving a first input signal, a control terminal, and a second terminal for providing a first output signal. The second transconductance path has a first terminal for receiving a second input signal, a control terminal, and a second terminal for providing a second output signal. The first variable capacitive divider has a first terminal for receiving the first input signal, a second terminal coupled to a reference voltage terminal, and an intermediate terminal coupled to the control terminal of the second transconductance path. The second variable capacitive divider has a first terminal for receiving the second input signal, a second terminal coupled to the reference voltage terminal, and an intermediate terminal coupled to the control terminal of the first transconductance path.

Abstract: A low-noise amplifier includes first and second transconductance paths and first and second variable capacitive dividers. The first transconductance path has a first terminal for receiving a first input signal, a control terminal, and a second terminal for providing a first output signal. The second transconductance path has a first terminal for receiving a second input signal, a control terminal, and a second terminal for providing a second output signal. The first variable capacitive divider has a first terminal for receiving the first input signal, a second terminal coupled to a reference voltage terminal, and an intermediate terminal coupled to the control terminal of the second transconductance path. The second variable capacitive divider has a first terminal for receiving the second input signal, a second terminal coupled to the reference voltage terminal, and an intermediate terminal coupled to the control terminal of the first transconductance path.

Abstract: An integrated circuit includes a tuner, a digital television (DTV) demodulator, an analog television (ATV) demodulator, and a controller. The tuner includes an input for receiving a radio frequency (RF) signal including at least one of an analog television signal and digital television signal, and including a first output terminal and a second output terminal. The DTV demodulator includes a DTV input coupled to the first output terminal of the tuner and includes a DTV output terminal. The ATV demodulator includes an ATV input coupled to the second output terminal of the tuner and includes an ATV output terminal. The controller is coupled to the tuner, the DTV demodulator, and the ATV demodulator to configure the tuner and at least one of the DTV demodulator and the ATV demodulator for receiving television content in a selected television format.

Abstract: A receiver (400) includes a tracking bandpass filter (420) and a signal processing circuit (430-480). The tracking bandpass filter (420) has a first input for receiving a radio frequency (RF) signal, and an output, and includes a first portion (731) on a semiconductor die (730), and at least one inductor (721). The at least one inductor (721) is operatively coupled to the first portion of the tracking bandpass filter (420). The signal processing circuit (430-480) has an input coupled to the output of the tracking bandpass filter (420), and an output for providing a processed signal. The semiconductor die (730) and the at least one inductor (721) are integrated into a single multi-chip module (MCM) (710).

Abstract: A receiver (400) includes a tracking bandpass filter (420), a tunable lowpass filter (434), a local oscillator (442), and a mixer (444). The tracking bandpass filter (420) has an input for receiving a radio frequency (RF) input signal, and an output. The tunable lowpass filter (434) has an input coupled to the output of the tracking bandpass filter (420), and an output. The local oscillator (422) has a first output for providing a local oscillator signal, which is characterized as being a square wave signal at the desired intermediate frequency (IF). The mixer (444) has a first input coupled to the output of the tunable lowpass filter (434), a second input coupled to the output of the local oscillator (442), and a first output for providing an IF signal at the desired IF. The tunable lowpass filter (434) is configured to substantially attenuate a third harmonic of the frequency of the local oscillator signal.