Patents by Inventor Ramin Zanbaghi

Ramin Zanbaghi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11500406
    Abstract: Current monitoring techniques are included in an electronic system that provides power to a load from a power output stage that supplies power to a load. Multiple current control devices form the power output stage in series with multiple sense resistors that provide corresponding sense voltages indicative of current provided through the multiple current control devices to the load in the same or different time intervals. A calibration control circuit controls injection of current through the multiple sense resistors individually and measures the corresponding sense voltages generated by the current to determine resistance values of the multiple sense resistors. A correction subsystem computes a first ratio of a first resistance to a second resistance and a second ratio of a third resistance to a fourth resistance of the multiple sense resistors, and controls compensation for a difference between the first ratio and the second ratio to remove the measurement error.
    Type: Grant
    Filed: March 25, 2021
    Date of Patent: November 15, 2022
    Assignee: CIRRUS LOGIC, INC.
    Inventors: Ramin Zanbaghi, Eric Kimball
  • Publication number: 20220308613
    Abstract: Current monitoring techniques are included in an electronic system that provides power to a load from a power output stage that supplies power to a load. Multiple current control devices form the power output stage in series with multiple sense resistors that provide corresponding sense voltages indicative of current provided through the multiple current control devices to the load in the same or different time intervals. A calibration control circuit controls injection of current through the multiple sense resistors individually and measures the corresponding sense voltages generated by the current to determine resistance values of the multiple sense resistors. A correction subsystem computes a first ratio of a first resistance to a second resistance and a second ratio of a third resistance to a fourth resistance of the multiple sense resistors, and controls compensation for a difference between the first ratio and the second ratio to remove the measurement error.
    Type: Application
    Filed: March 25, 2021
    Publication date: September 29, 2022
    Inventors: Ramin Zanbaghi, Eric Kimball
  • Publication number: 20220247367
    Abstract: Class-D amplifier circuits provide operation with low-distortion zero crossings outside of a unipolar power supply voltage range. The amplifiers include a first H-bridge driver circuit and a second H-bridge driver circuit. The class-D amplifier circuits also include a control circuit having an input for receiving an input signal to be reproduced by the class-D amplifier circuit. The control circuit has outputs coupled to inputs of the first and second H-bridge drivers, and includes one or more modulators. The control circuit selects between actively operating a selected one of the driver circuits or both, according to the signal to be reproduced, while setting an unselected driver circuit to turn either a high-side switch or a low-side switch of the unselected one of the first driver circuit or the second driver circuit fully on for at least some cycles of the one or more modulators.
    Type: Application
    Filed: January 31, 2022
    Publication date: August 4, 2022
    Inventors: John L. Melanson, Cory J. Peterson, Chandra Prakash, Ramin Zanbaghi, Eric Kimball
  • Publication number: 20220190789
    Abstract: A method for use in an analog circuit having a plurality of differential pairs of elements, wherein for each pair of the plurality of differential pairs of elements, the elements of the pair are designed to match but may have mismatch that induces error. The method includes, for each pair of at least two pairs of the plurality of differential pairs of elements: spectrally separating the mismatch-induced error of the pair from mismatch-induced error of a remainder of the plurality of differential pairs of elements, monitoring, by an analog-to-digital converter (ADC), an output of the analog circuit, and analyzing the monitored output to measure the mismatch-induced error of the pair.
    Type: Application
    Filed: December 11, 2020
    Publication date: June 16, 2022
    Inventors: Ramin Zanbaghi, John L. Melanson, Edmund M. Schneider
  • Publication number: 20220190794
    Abstract: A method for matching a pair of composite circuit elements (CEs) included in a circuit includes fabricating N CEs (e.g., resistors, transistors, current sources, capacitors) designed to match and switches configurable, according to M different combinations, to connect N/2 of the N CEs to form a first composite CE and to connect a remaining N/2 of the N CEs to form a second composite CE. Sequentially in time, for each combination of the M combinations, the switches are configured to form the first and second composite CEs according to the combination and a characteristic of the circuit is measured that includes the formed first and second composite CEs. The characteristic indicates how well the formed composite CEs match. A final combination of the M combinations is chosen whose measured characteristic indicates a best match and the final combination is used to configure the switches to form the composite CEs.
    Type: Application
    Filed: May 26, 2021
    Publication date: June 16, 2022
    Inventors: Edmund M. Schneider, Ramin Zanbaghi, Terence C. Bowness, Eric Kimball
  • Publication number: 20220158597
    Abstract: A system may include a Class-D stage comprising a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage, a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage, a first low-side switch coupled between a ground voltage and the first output terminal, and a second low-side switch coupled between the ground voltage and the second output terminal. The system may also include current sensing circuitry comprising a sense resistor, such that an output current through a load coupled between the first output terminal and the second output terminal causes a first sense voltage proportional to the output current across the sense resistor.
    Type: Application
    Filed: February 8, 2022
    Publication date: May 19, 2022
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Ramin ZANBAGHI, Cory J. PETERSON, Eric KIMBALL
  • Patent number: 11329617
    Abstract: Class-D amplifiers and modulators therefor provide control of the DC operating point of the outputs of the amplifiers. The modulators generate a sum and difference signal using combiners and introduce the sum signal to a reference input of the quantizer, while the quantization input of the quantizer receives the difference signal. A difference mode loop filter circuit may filter the difference signal and a common mode loop filter may filter the sum signal. Outputs of the quantizer operate a pair of switching circuits to provide either a differential output with the sum signal set to a constant voltage and the difference signal provided by the signal to be reproduced, or a pair of single-ended outputs with the individual input signals used to generate the sum and difference signal, and selection of a differential or dual single-ended operating mode may be performed by a control circuit that reconfigures the combiners.
    Type: Grant
    Filed: January 19, 2021
    Date of Patent: May 10, 2022
    Assignee: CIRRUS LOGIC, INC.
    Inventors: Cory J. Peterson, Chandra Prakash, Ramin Zanbaghi, Eric Kimball
  • Patent number: 11316508
    Abstract: A system may include an output driving stage comprising a first switch configured to selectively open and close an electrical path between a first supply voltage and an output terminal of the output driving stage and a second switch configured to selectively open and close an electrical path between a second supply voltage and the output terminal of the output driving stage, wherein the second supply voltage is lower than the first supply voltage. The system may also include detection and protection circuitry configured to monitor a physical quantity indicative of the second supply voltage and responsive to the physical quantity exceeding an overvoltage threshold, electrically isolate the output terminal from the second supply voltage.
    Type: Grant
    Filed: March 17, 2020
    Date of Patent: April 26, 2022
    Assignee: Cirrus Logic, Inc.
    Inventors: Ramin Zanbaghi, Cory J. Peterson
  • Patent number: 11309853
    Abstract: A class-D amplifier includes a first differential modulator circuit, a first driver circuit including a first high-side switch and a first low-side switch. An input of the first driver circuit may be coupled to a first output of the first differential modulator circuit so that the first differential modulator circuit controls the first driver circuit. The class-D amplifier may also include a second driver circuit including a second high-side switch and a second low-side switch coupling the second and control logic that selects between a single-ended operating state and a differential operating state of the class-D amplifier circuit. The control logic may selectively determine the input of the second driver circuit in conformity with a current operating state of the class-D amplifier circuit so that the first differential modulator circuit controls the second driver circuit when the differential operating state is selected.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: April 19, 2022
    Assignee: CIRRUS LOGIC, INC.
    Inventors: Cory J. Peterson, Chandra Prakash, Ramin Zanbaghi, Eric Kimball
  • Patent number: 11296685
    Abstract: A PWM modulator has a quantizer that generates a PWM output signal to speaker driver. When a first voltage swing range is supplied to the speaker driver, the quantizer analog gain is controlled to be a first gain value. When a second PWM drive voltage swing range is supplied to the speaker driver, the analog gain is controlled to be a second gain value. The first and second gain values of the analog gain of the quantizer cause the combined gain of the quantizer and driver to be approximately equal in the two modes. The quantizer has at least two gain-affecting measurable non-ideal characteristics. The quantizer is adjustable using measured first and second values to correct for first and second of the at least two non-ideal characteristics. The gain of the quantizer is calibratable while the quantizer is adjusted using the measured first and second measured values.
    Type: Grant
    Filed: August 18, 2020
    Date of Patent: April 5, 2022
    Assignee: Cirrus Logic, Inc.
    Inventors: Ramin Zanbaghi, Anuradha Parsi, Kyehyung Lee, John L. Melanson
  • Patent number: 11296663
    Abstract: A system may include a Class-D stage comprising a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage, a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage, a first low-side switch coupled between a ground voltage and the first output terminal, and a second low-side switch coupled between the ground voltage and the second output terminal. The system may also include current sensing circuitry comprising a first sense resistor coupled between the first low-side switch and the ground voltage, such that an output current through a load coupled between the first output terminal and the second output terminal causes a first sense voltage proportional to the output current across the first sense resistor when the first low-side switch is activated.
    Type: Grant
    Filed: May 1, 2020
    Date of Patent: April 5, 2022
    Assignee: Cirrus Logic, Inc.
    Inventors: Ramin Zanbaghi, Cory J. Peterson, Anand Ilango, Eric Kimball
  • Patent number: 11290070
    Abstract: A system may include a Class-D stage comprising a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage, a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage, a first low-side switch coupled between a ground voltage and the first output terminal, and a second low-side switch coupled between the ground voltage and the second output terminal. The system may also include current sensing circuitry comprising a sense resistor, such that an output current through a load coupled between the first output terminal and the second output terminal causes a first sense voltage proportional to the output current across the sense resistor.
    Type: Grant
    Filed: May 7, 2020
    Date of Patent: March 29, 2022
    Assignee: Cirrus Logic, Inc.
    Inventors: Ramin Zanbaghi, Cory J. Peterson, Eric Kimball
  • Patent number: 11290071
    Abstract: A system may include a Class-D stage comprising a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage, a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage, a first low-side switch coupled between a ground voltage and the first output terminal, and a second low-side switch coupled between the ground voltage and the second output terminal. The system may also include current sensing circuitry comprising a first sense resistor coupled between the first high-side switch and the supply voltage, such that an output current through a load coupled between the first output terminal and the second output terminal causes a first sense voltage proportional to the output current across the first sense resistor when the first high-side switch is activated.
    Type: Grant
    Filed: August 26, 2020
    Date of Patent: March 29, 2022
    Assignee: Cirrus Logic, Inc.
    Inventors: Ramin Zanbaghi, Cory J. Peterson, Anand Ilango, Eric Kimball
  • Patent number: 11237065
    Abstract: A temperature sensor having a two-state input current, an element whose temperature is sensed based on a change in voltage across the element induced by the two states of the input current, a charge-to-digital converter, and a capacitor continuously connected between the element and the charge-to-digital converter. The capacitor experiences a charge difference due to the change in voltage across the element induced by the two states of the input current, and the charge-to-digital converter converts the charge difference to a digital value indicative of the temperature of the element. A two-state DC-shifting current having opposite polarity of the two-state input current, a pull-down resistor whose voltage varies with the two-states of the DC-shifting current, and a second capacitor continuously connected between the pull-down resistor and the charge-to-digital converter operate to shift down a DC operating point of the charge-to-voltage converter to increase its dynamic range.
    Type: Grant
    Filed: April 16, 2019
    Date of Patent: February 1, 2022
    Assignee: Cirrus Logic, Inc.
    Inventors: Ramin Zanbaghi, John L. Melanson
  • Patent number: 11190148
    Abstract: A system may include a forward signal path having a forward gain and configured to receive an input signal at an input and generate an output signal at an output as a function of the input signal, a feedback signal path having a feedback gain and coupled between the output and the input, and a control subsystem configured to operate the forward signal path and the feedback signal path in at least two modes comprising a first mode in which the forward gain is a first forward gain and the feedback gain is a first feedback gain and a second mode in which the forward gain is a second forward gain smaller than the first forward gain and the feedback gain is a second feedback gain larger than the first feedback gain. The control subsystem may cause operation in the first mode when signal content is present in the input signal and may cause operation in the second mode when signal content is absent from the input signal.
    Type: Grant
    Filed: January 2, 2020
    Date of Patent: November 30, 2021
    Assignee: Cirrus Logic, Inc.
    Inventors: Eric Kimball, Chandra Prakash, Ramin Zanbaghi, Cory J. Peterson
  • Publication number: 20210351751
    Abstract: A system may include a Class-D stage comprising a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage, a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage, a first low-side switch coupled between a ground voltage and the first output terminal, and a second low-side switch coupled between the ground voltage and the second output terminal. The system may also include current sensing circuitry comprising a sense resistor, such that an output current through a load coupled between the first output terminal and the second output terminal causes a first sense voltage proportional to the output current across the sense resistor.
    Type: Application
    Filed: May 7, 2020
    Publication date: November 11, 2021
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Ramin ZANBAGHI, Cory J. PETERSON, Eric KIMBALL
  • Publication number: 20210344310
    Abstract: A system may include a Class-D stage comprising a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage, a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage, a first low-side switch coupled between a ground voltage and the first output terminal, and a second low-side switch coupled between the ground voltage and the second output terminal. The system may also include current sensing circuitry comprising a first sense resistor coupled between the first high-side switch and the supply voltage, such that an output current through a load coupled between the first output terminal and the second output terminal causes a first sense voltage proportional to the output current across the first sense resistor when the first high-side switch is activated.
    Type: Application
    Filed: August 26, 2020
    Publication date: November 4, 2021
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Ramin ZANBAGHI, Cory J. PETERSON, Anand ILANGO, Eric KIMBALL
  • Publication number: 20210344309
    Abstract: A system may include a Class-D stage comprising a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage, a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage, a first low-side switch coupled between a ground voltage and the first output terminal, and a second low-side switch coupled between the ground voltage and the second output terminal. The system may also include current sensing circuitry comprising a first sense resistor coupled between the first low-side switch and the ground voltage, such that an output current through a load coupled between the first output terminal and the second output terminal causes a first sense voltage proportional to the output current across the first sense resistor when the first low-side switch is activated.
    Type: Application
    Filed: May 1, 2020
    Publication date: November 4, 2021
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Ramin ZANBAGHI, Cory J. PETERSON, Anand ILANGO, Eric KIMBALL
  • Publication number: 20210297072
    Abstract: A system may include an output driving stage comprising a first switch configured to selectively open and close an electrical path between a first supply voltage and an output terminal of the output driving stage and a second switch configured to selectively open and close an electrical path between a second supply voltage and the output terminal of the output driving stage, wherein the second supply voltage is lower than the first supply voltage. The system may also include detection and protection circuitry configured to monitor a physical quantity indicative of the second supply voltage and responsive to the physical quantity exceeding an overvoltage threshold, electrically isolate the output terminal from the second supply voltage.
    Type: Application
    Filed: March 17, 2020
    Publication date: September 23, 2021
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Ramin ZANBAGHI, Cory J. PETERSON
  • Patent number: 11119134
    Abstract: A detector for measuring a resistance of a variable resistance sensor (VRS) that varies with respect to a time-varying stimulus (e.g., temperature) includes a voltage reference having variation with respect to operating conditions and a linearized digital-to-analog converter (LIDAC) having a known transconductance that uses the voltage reference to generate a current for pumping into the VRS to cause the VRS to generate a voltage sensed by the detector. The sensed voltage includes error due to the variation of the voltage reference. The detector also includes a programmable gain amplifier (PGA) that gains up the sensed voltage to generate an output signal, an ADC that converts the output signal to a digital value, and a digital processor that computes the resistance of the VRS using the digital value and the known transconductance. The PGA is non-varying with respect to the time-varying stimulus.
    Type: Grant
    Filed: August 2, 2019
    Date of Patent: September 14, 2021
    Assignee: Cirrus Logic, Inc.
    Inventors: Cory Jay Peterson, Chandra B. Prakash, Anand Ilango, Ramin Zanbaghi, Dejun Wang