Abstract: A PWM modulator has a quantizer that generates a PWM output signal to speaker driver. When a first voltage swing range is supplied to the speaker driver, the quantizer analog gain is controlled to be a first gain value. When a second PWM drive voltage swing range is supplied to the speaker driver, the analog gain is controlled to be a second gain value. The first and second gain values of the analog gain of the quantizer cause the combined gain of the quantizer and driver to be approximately equal in the two modes. The quantizer has at least two gain-affecting measurable non-ideal characteristics. The quantizer is adjustable using measured first and second values to correct for first and second of the at least two non-ideal characteristics. The gain of the quantizer is calibratable while the quantizer is adjusted using the measured first and second measured values.

Abstract: A system may include a Class-D stage comprising a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage, a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage, a first low-side switch coupled between a ground voltage and the first output terminal, and a second low-side switch coupled between the ground voltage and the second output terminal. The system may also include current sensing circuitry comprising a first sense resistor coupled between the first high-side switch and the supply voltage, such that an output current through a load coupled between the first output terminal and the second output terminal causes a first sense voltage proportional to the output current across the first sense resistor when the first high-side switch is activated.

Abstract: A system may include a Class-D stage comprising a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage, a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage, a first low-side switch coupled between a ground voltage and the first output terminal, and a second low-side switch coupled between the ground voltage and the second output terminal. The system may also include current sensing circuitry comprising a sense resistor, such that an output current through a load coupled between the first output terminal and the second output terminal causes a first sense voltage proportional to the output current across the sense resistor.

Abstract: A temperature sensor having a two-state input current, an element whose temperature is sensed based on a change in voltage across the element induced by the two states of the input current, a charge-to-digital converter, and a capacitor continuously connected between the element and the charge-to-digital converter. The capacitor experiences a charge difference due to the change in voltage across the element induced by the two states of the input current, and the charge-to-digital converter converts the charge difference to a digital value indicative of the temperature of the element. A two-state DC-shifting current having opposite polarity of the two-state input current, a pull-down resistor whose voltage varies with the two-states of the DC-shifting current, and a second capacitor continuously connected between the pull-down resistor and the charge-to-digital converter operate to shift down a DC operating point of the charge-to-voltage converter to increase its dynamic range.

Abstract: A system may include a forward signal path having a forward gain and configured to receive an input signal at an input and generate an output signal at an output as a function of the input signal, a feedback signal path having a feedback gain and coupled between the output and the input, and a control subsystem configured to operate the forward signal path and the feedback signal path in at least two modes comprising a first mode in which the forward gain is a first forward gain and the feedback gain is a first feedback gain and a second mode in which the forward gain is a second forward gain smaller than the first forward gain and the feedback gain is a second feedback gain larger than the first feedback gain. The control subsystem may cause operation in the first mode when signal content is present in the input signal and may cause operation in the second mode when signal content is absent from the input signal.

Abstract: A system may include a Class-D stage comprising a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage, a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage, a first low-side switch coupled between a ground voltage and the first output terminal, and a second low-side switch coupled between the ground voltage and the second output terminal. The system may also include current sensing circuitry comprising a sense resistor, such that an output current through a load coupled between the first output terminal and the second output terminal causes a first sense voltage proportional to the output current across the sense resistor.

Abstract: A system may include a Class-D stage comprising a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage, a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage, a first low-side switch coupled between a ground voltage and the first output terminal, and a second low-side switch coupled between the ground voltage and the second output terminal. The system may also include current sensing circuitry comprising a first sense resistor coupled between the first low-side switch and the ground voltage, such that an output current through a load coupled between the first output terminal and the second output terminal causes a first sense voltage proportional to the output current across the first sense resistor when the first low-side switch is activated.

Abstract: A system may include a Class-D stage comprising a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage, a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage, a first low-side switch coupled between a ground voltage and the first output terminal, and a second low-side switch coupled between the ground voltage and the second output terminal. The system may also include current sensing circuitry comprising a first sense resistor coupled between the first high-side switch and the supply voltage, such that an output current through a load coupled between the first output terminal and the second output terminal causes a first sense voltage proportional to the output current across the first sense resistor when the first high-side switch is activated.

Abstract: A system may include an output driving stage comprising a first switch configured to selectively open and close an electrical path between a first supply voltage and an output terminal of the output driving stage and a second switch configured to selectively open and close an electrical path between a second supply voltage and the output terminal of the output driving stage, wherein the second supply voltage is lower than the first supply voltage. The system may also include detection and protection circuitry configured to monitor a physical quantity indicative of the second supply voltage and responsive to the physical quantity exceeding an overvoltage threshold, electrically isolate the output terminal from the second supply voltage.

Abstract: A detector for measuring a resistance of a variable resistance sensor (VRS) that varies with respect to a time-varying stimulus (e.g., temperature) includes a voltage reference having variation with respect to operating conditions and a linearized digital-to-analog converter (LIDAC) having a known transconductance that uses the voltage reference to generate a current for pumping into the VRS to cause the VRS to generate a voltage sensed by the detector. The sensed voltage includes error due to the variation of the voltage reference. The detector also includes a programmable gain amplifier (PGA) that gains up the sensed voltage to generate an output signal, an ADC that converts the output signal to a digital value, and a digital processor that computes the resistance of the VRS using the digital value and the known transconductance. The PGA is non-varying with respect to the time-varying stimulus.

Abstract: A system may include a forward signal path having a forward gain and configured to receive an input signal at an input and generate an output signal at an output as a function of the input signal, a feedback signal path having a feedback gain and coupled between the output and the input, and a control subsystem configured to operate the forward signal path and the feedback signal path in at least two modes comprising a first mode in which the forward gain is a first forward gain and the feedback gain is a first feedback gain and a second mode in which the forward gain is a second forward gain smaller than the first forward gain and the feedback gain is a second feedback gain larger than the first feedback gain. The control subsystem may cause operation in the first mode when signal content is present in the input signal and may cause operation in the second mode when signal content is absent from the input signal.

Abstract: A system has an output and receives an input signal. An operational amplifier has an input, an output and an offset at the input. A switched capacitor network samples the input signal at a switched capacitor frequency. An autozeroing capacitor connected to the input of the operational amplifier captures the offset during an offset capture interval according to an autozeroing frequency. Chopping and autozeroing switches, connected between the autozeroing capacitor and the switched capacitor network, chop the sampled input signal according to a chopping frequency and autozero the captured offset according to the autozeroing frequency. De-chopping switches, connected between the output of the operational amplifier and the output of the system, operate on the output of the operational amplifier at the chopping frequency to chop the autozeroed captured offset and de-chop the chopped sampled input signal processed by the operational amplifier.

Abstract: Non-overlap generation circuitry may include a first portion configured to condition an input signal to generate a first predriver signal, the first portion comprising a first switching threshold logic path and a second switching threshold logic path in parallel with the first switching threshold logic path, wherein the first portion is configured to select between the first switching threshold logic path and the second switching threshold logic path based on the input signal. The non-overlap generation circuit may also include a second portion configured to condition the input signal to generate a second predriver signal, the second portion comprising a third switching threshold logic path and a fourth switching threshold logic path in parallel with the third switching threshold logic path, wherein the second portion is configured to select between the third switching threshold logic path and the fourth switching threshold logic path based on the input signal.

Abstract: A system has an output and receives an input signal. An operational amplifier has an input, an output and an offset at the input. A switched capacitor network samples the input signal at a switched capacitor frequency. An autozeroing capacitor connected to the input of the operational amplifier captures the offset during an offset capture interval according to an autozeroing frequency. Chopping and autozeroing switches, connected between the autozeroing capacitor and the switched capacitor network, chop the sampled input signal according to a chopping frequency and autozero the captured offset according to the autozeroing frequency. De-chopping switches, connected between the output of the operational amplifier and the output of the system, operate on the output of the operational amplifier at the chopping frequency to chop the autozeroed captured offset and de-chop the chopped sampled input signal processed by the operational amplifier.

Abstract: A PWM modulator has a quantizer that generates a PWM output signal to speaker driver. When a first voltage swing range is supplied to the speaker driver, the quantizer analog gain is controlled to be a first gain value. When a second PWM drive voltage swing range is supplied to the speaker driver, the analog gain is controlled to be a second gain value. The first and second gain values of the analog gain of the quantizer cause the combined gain of the quantizer and driver to be approximately equal in the two modes. The quantizer has at least two gain-affecting measurable non-ideal characteristics. The quantizer is adjustable using measured first and second values to correct for first and second of the at least two non-ideal characteristics. The gain of the quantizer is calibratable while the quantizer is adjusted using the measured first and second measured values.

Abstract: A detector for measuring a resistance of a variable resistance sensor (VRS) that varies with respect to a time-varying stimulus (e.g., temperature) includes a voltage reference having variation with respect to operating conditions and a linearized digital-to-analog converter (LIDAC) having a known transconductance that uses the voltage reference to generate a current for pumping into the VRS to cause the VRS to generate a voltage sensed by the detector. The sensed voltage includes error due to the variation of the voltage reference. The detector also includes a programmable gain amplifier (PGA) that gains up the sensed voltage to generate an output signal, an ADC that converts the output signal to a digital value, and a digital processor that computes the resistance of the VRS using the digital value and the known transconductance. The PGA is non-varying with respect to the time-varying stimulus.

Abstract: A system includes a first sensed voltage generated as a product of the first voltage reference and an unknown scalar, a second sensed voltage generated as a product of the first voltage reference and a known scalar, and an amplifier having gain error that generates a second voltage reference (first voltage reference or scaled version thereof). An ADC uses the second voltage reference to generate first and second digital values, representing the first and second sensed voltages, that contain error caused by the second voltage reference gain error. A processor uses the known scalar and a ratio based on the first and second digital values to remove the error from the first digital value. The first sensed voltage may be generated by pumping a current into a variable resistance sensor (VRS) whose resistance varies with respect to a time-varying stimulus (e.g., temperature) and is proportional to the unknown scalar.

Abstract: A PWM modulator has a quantizer that generates a PWM output signal to speaker driver. When a first voltage swing range is supplied to the speaker driver, the quantizer analog gain is controlled to be a first gain value. When a second PWM drive voltage swing range is supplied to the speaker driver, the analog gain is controlled to be a second gain value. The first and second gain values of the analog gain of the quantizer cause the combined gain of the quantizer and driver to be approximately equal in the two modes. The quantizer has at least two gain-affecting measurable non-ideal characteristics. The quantizer is adjustable using measured first and second values to correct for first and second of the at least two non-ideal characteristics. The gain of the quantizer is calibratable while the quantizer is adjusted using the measured first and second measured values.

Abstract: A temperature sensor having a two-state input current, an element whose temperature is sensed based on a change in voltage across the element induced by the two states of the input current, a charge-to-digital converter, and a capacitor continuously connected between the element and the charge-to-digital converter. The capacitor experiences a charge difference due to the change in voltage across the element induced by the two states of the input current, and the charge-to-digital converter converts the charge difference to a digital value indicative of the temperature of the element. A two-state DC-shifting current having opposite polarity of the two-state input current, a pull-down resistor whose voltage varies with the two-states of the DC-shifting current, and a second capacitor continuously connected between the pull-down resistor and the charge-to-digital converter operate to shift down a DC operating point of the charge-to-voltage converter to increase its dynamic range.

Abstract: A method for generating a periodic ramp waveform may include in a sampling phase of each period of operation of a ramp-generation circuit, sampling a reference voltage onto a sampling capacitor. The method may also include in a transfer phase of each period of operation of the ramp-generation circuit: discharging the reference voltage from the sampling capacitor through at least one resistor to generate a current and generating the periodic ramp waveform by integrating the current with at least one integrating capacitor, wherein a duration of the transfer phase is significantly smaller than a time constant defined by a capacitance of the sampling capacitor and a resistance of the at least one resistor, such that the reference voltage discharges linearly from the sampling capacitor as a function of time during the transfer phase.