Patents by Inventor Ramkishore Ganti
Ramkishore Ganti has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9124354Abstract: A protection circuit protects a receiver from high-energy signals. In one exemplary embodiment, the protection circuit comprises a snapback transistor and a controller. The snapback transistor comprises a gate, a drain connected to an input of the receiver and a source connected to ground. The controller configured to connect the gate to a bias voltage to close the gate in a transmit mode, and to disconnect the gate from the bias voltage to open the gate in a receive mode. The snapback transistor is configured to enter into snapback responsive to a high energy signal at the drain to provide a current path from the drain to the source even when the gate is open and thus protect the receiver.Type: GrantFiled: April 6, 2012Date of Patent: September 1, 2015Assignee: ST-ERICSSON SAInventors: Ramkishore Ganti, Sanjeev Ranganathan, Srinath Sridharan
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Patent number: 8892159Abstract: A multi-standard transceiver comprises a common balun, a controller, at least one first switch, and at least one second switch. The common balun comprises a primary coil and a secondary coil. The at least one first switch connects the primary coil of the balun to a first signal path associated with a first communication standard, or to a second signal path associated with a second communication standard responsive to a control signal provided by the controller. The at least one second switch connects the secondary coil of the balun to a first amplification path associated with the first communication standard, or to a second amplification path associated with the second communication standard responsive to a control signal provided by the controller. A common mixer is configured to provide upconverted signals to one of the signal paths depending on which communication standard has been selected.Type: GrantFiled: May 4, 2012Date of Patent: November 18, 2014Assignee: ST-Ericsson SAInventors: Ramkishore Ganti, Sanjeev Ranganathan, Srinath Sridharan
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Patent number: 8787588Abstract: Systems and methods for a low pin architecture to couple speakers with integrated circuits are disclosed herein. In an implementation, the low pin architecture facilitates in reducing the required pin interfaces to couple a low power speaker, a high power speaker, and earphone speakers with integrated circuits (ICs). For this, the high power speaker can be cross-coupled between the pin interfaces that are coupled to the low power speaker and the earphone speakers. These pin interfaces are driven by corresponding driver circuits. In said implementation, some of the driver circuits can be shared to drive multiple pin interfaces. These shared driver circuits include a combined cascode circuit having a first cascode circuit integrated with a second cascode circuit to reliably and selectively drive one or more of the pin interfaces.Type: GrantFiled: February 25, 2010Date of Patent: July 22, 2014Assignees: ST-Ericsson SA, ST-Ericsson PVT. Ltd.Inventors: Sanjeev Ranganathan, Shyam Somayajula, Srinath Sridharan, Arnold D'Souza, Ramkishore Ganti, Lionel Cimaz
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Publication number: 20130116005Abstract: A multi-standard transceiver comprises a common balun, a controller, at least one first switch, and at least one second switch. The common balun comprises a primary coil and a secondary coil. The at least one first switch connects the primary coil of the balun to a first signal path associated with a first communication standard, or to a second signal path associated with a second communication standard responsive to a control signal provided by the controller. The at least one second switch connects the secondary coil of the balun to a first amplification path associated with the first communication standard, or to a second amplification path associated with the second communication standard responsive to a control signal provided by the controller. A common mixer is configured to provide upconverted signals to one of the signal paths depending on which communication standard has been selected.Type: ApplicationFiled: May 4, 2012Publication date: May 9, 2013Inventors: Ramkishore Ganti, Sanjeev Ranganathan, Srinath Sridharan
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Publication number: 20120287969Abstract: A protection circuit protects a receiver from high-energy signals. In one exemplary embodiment, the protection circuit comprises a snapback transistor and a controller. The snapback transistor comprises a gate, a drain connected to an input of the receiver and a source connected to ground. The controller configured to connect the gate to a bias voltage to close the gate in a transmit mode, and to disconnect the gate from the bias voltage to open the gate in a receive mode. The snapback transistor is configured to enter into snapback responsive to a high energy signal at the drain to provide a current path from the drain to the source even when the gate is open and thus protect the receiver.Type: ApplicationFiled: April 6, 2012Publication date: November 15, 2012Inventors: Ramkishore Ganti, Sanjeev Ranganathan, Srinath Sridharan
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Patent number: 8184683Abstract: In one embodiment, the present invention includes a transceiver coupled to a baseband processor to receive digital control information that includes both event and schedule information, and which stores the digital control information in a storage of the transceiver. The transceiver may then be operated according to the event and schedule information.Type: GrantFiled: February 15, 2011Date of Patent: May 22, 2012Assignee: Silicon Laboratories Inc.Inventors: Brian D. Green, Srihari Adireddy, Lysander Lim, Ramkishore Ganti
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Patent number: 8085080Abstract: Systems and methods for generation of a low jitter clock signal for wireless circuits are disclosed. In an implementation, the system includes a wireless circuit powered by a first power supply and a low jitter clock (LJC) generator powered by a second power supply. The LJC generator provides at least one clock signal to the wireless circuit. The system further includes an LJC driver circuit including a clock buffer powered by the first power supply and a receive buffer powered by the second power supply.Type: GrantFiled: February 26, 2010Date of Patent: December 27, 2011Assignees: ST-Ericsson SA, ST-Ericsson India Pvt. Ltd.Inventors: Srinath Sridharan, Ramkishore Ganti, Patrick Guyard
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Publication number: 20110134974Abstract: In one embodiment, the present invention includes a transceiver coupled to a baseband processor to receive digital control information that includes both event and schedule information, and which stores the digital control information in a storage of the transceiver. The transceiver may then be operated according to the event and schedule information.Type: ApplicationFiled: February 15, 2011Publication date: June 9, 2011Inventors: Brian D. Green, Srihari Adireddy, Lysander Lim, Ramkishore Ganti
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Patent number: 7907657Abstract: In one embodiment, the present invention includes a transceiver coupled to a baseband processor to receive digital control information that includes both event and schedule information, and which stores the digital control information in a storage of the transceiver. The transceiver may then be operated according to the event and schedule information.Type: GrantFiled: June 30, 2006Date of Patent: March 15, 2011Assignee: Silicon Laboratories Inc.Inventors: Brian D. Green, Srihari Adireddy, Lysander Lim, Ramkishore Ganti
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Patent number: 7835706Abstract: An RF transmitter (104) includes a shared local oscillator circuit (126), transmit path circuitry (120, 122, 124), a divider (134), and a lowpass filter (322). The shared local oscillator circuit (126) generates a shared LO signal (116). The transmit path circuitry (120, 122, 124) mixes a baseband signal (107) and an IF mixing signal (116) to provide an IF signal (112), and converts the IF signal (112) to an RF transmit signal (105) at a desired frequency using an RF mixing signal received at a mixing input thereof. The divider (134) divides the shared LO signal (116) to provide an unfiltered RF mixing signal. The lowpass filter (322) has an input for receiving the unfiltered RF mixing signal, and an output coupled to the mixing input of the transmit path circuitry (120, 122, 124) for providing the RF mixing signal.Type: GrantFiled: September 12, 2005Date of Patent: November 16, 2010Assignee: Silicon Laboratories, Inc.Inventors: David R. Welland, Ramkishore Ganti, CaiYi Wang
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Publication number: 20100220868Abstract: Systems and methods for a low pin architecture to couple speakers with integrated circuits are disclosed herein. In an implementation, the low pin architecture facilitates in reducing the required pin interfaces to couple a low power speaker, a high power speaker, and earphone speakers with integrated circuits (ICs). For this, the high power speaker can be cross-coupled between the pin interfaces that are coupled to the low power speaker and the earphone speakers. These pin interfaces are driven by corresponding driver circuits. In said implementation, some of the driver circuits can be shared to drive multiple pin interfaces. These shared driver circuits include a combined cascode circuit having a first cascode circuit integrated with a second cascode circuit to reliably and selectively drive one or more of the pin interfaces.Type: ApplicationFiled: February 25, 2010Publication date: September 2, 2010Applicants: ST-Ericsson India Pvt. Ltd, ST-Ericsson SAInventors: Sanjeev Ranganathan, Shyam Somayajula, Srinath Sridharan, Arnold D'Souza, Ramkishore Ganti, Lionel Cimaz
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Publication number: 20100219871Abstract: Systems and methods for generation of a low jitter clock signal for wireless circuits are disclosed. In an implementation, the system includes a wireless circuit powered by a first power supply and a low jitter clock (LJC) generator powered by a second power supply. The LJC generator provides at least one clock signal to the wireless circuit. The system further includes an LJC driver circuit including a clock buffer powered by the first power supply and a receive buffer powered by the second power supply.Type: ApplicationFiled: February 26, 2010Publication date: September 2, 2010Applicants: ST-Ericsson India Pvt Ltd., ST-Ericsson SAInventors: Srinath Sridharan, Ramkishore Ganti, Patrick Guyard
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Patent number: 7772934Abstract: A technique includes selecting one out of a plurality of frequency bands and providing a voltage controlled oscillator to generate a mixing signal for the selected frequency band. The technique includes adjusting a frequency gain of the voltage controlled oscillator based on the selected frequency band.Type: GrantFiled: September 14, 2005Date of Patent: August 10, 2010Assignee: Silicon Laboratories Inc.Inventors: Peter Vancorenland, Ramkishore Ganti, Russell Croman
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Patent number: 7759915Abstract: An apparatus comprises a circuit having a power supply node and a linear regulator configured to provide a regulated voltage at the power supply node of the circuit. The apparatus further comprises a switching regulator configured to provide input power to the linear regulator from a power source such as a battery. In some implementations, the circuit is a transceiver circuit.Type: GrantFiled: February 27, 2006Date of Patent: July 20, 2010Assignee: ST-Ericsson SAInventors: Ramkishore Ganti, Caiyi Wang, Augusto M. Marques
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Patent number: 7583937Abstract: In one embodiment, the present invention includes a method for receiving at a transceiver from a baseband processor digital control information that includes both event and schedule information, storing the digital control information in a storage of the transceiver, and operating the transceiver according to the event and schedule information.Type: GrantFiled: December 13, 2005Date of Patent: September 1, 2009Assignee: Silicon Laboratories Inc.Inventors: Brian D. Green, Srihari Adireddy, Lysander Lim, Ramkishore Ganti
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Patent number: 7477879Abstract: A transceiver system including a common receiver and transmitter oscillator. The transceiver system may include transmitter circuitry, receiver circuitry, and a first oscillator. The first oscillator may provide a transmit frequency to a mixer in the transmitter circuitry to generate a transmitter RF signal. Furthermore, the first oscillator may also provide the transmit frequency to a first stage mixer in the receiver circuitry to down-convert a receiver RF signal from a receive frequency to an intermediate frequency (IF). The receiver circuitry may include a second oscillator and a second stage mixer. The second oscillator may provide an IF frequency to the second stage mixer to down-convert receiver signals at IF to a lower frequency. The receiver circuitry may filter out transmitter RF feedthrough signals without using a SAW filter. The transmitter circuitry, the receiver circuitry, and the first oscillator may be included in a single IC.Type: GrantFiled: June 30, 2005Date of Patent: January 13, 2009Assignee: Silicon Laboratories, Inc.Inventors: Ramkishore Ganti, Caiyi Wang
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Publication number: 20070200539Abstract: An apparatus comprises a circuit having a power supply node and a linear regulator configured to provide a regulated voltage at the power supply node of the circuit. The apparatus further comprises a switching regulator configured to provide input power to the linear regulator from a power source such as a battery. In some implementations, the circuit is a transceiver circuit.Type: ApplicationFiled: February 27, 2006Publication date: August 30, 2007Inventors: Ramkishore Ganti, Caiyi Wang, Augusto Marques
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Publication number: 20070060081Abstract: A technique includes selecting one out of a plurality of frequency bands and providing a voltage controlled oscillator to generate a mixing signal for the selected frequency band. The technique includes adjusting a frequency gain of the voltage controlled oscillator based on the selected frequency band.Type: ApplicationFiled: September 14, 2005Publication date: March 15, 2007Inventors: Peter Vancorenland, Ramkishore Ganti, Russell Croman
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Patent number: 7145936Abstract: A bandpass delta sigma truncator receives a series of first multi-bit digital signals each having a number of data bits, a first number of sign bits and sign extending means for sign extending each of the first multi-bit digital signals to a second multi-bit digital signal having the same number of data bits as the number of data bits in the first multi-bit digital signals, and a second number of sign bits. The truncator outputs from a series of third multi-bit digital signals a series of fourth multi-bit digital signals each having a selected number of the most significant data bits of the third multi-bit digital signals, and a series of fifth multi-bit digital signals each having the remaining number of the least significant data bits of the third multi-bit digital signals.Type: GrantFiled: December 23, 2002Date of Patent: December 5, 2006Assignee: International Business Machines CorporationInventors: Ramkishore Ganti, Aria Eshraghi
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Publication number: 20060245483Abstract: In one embodiment, the present invention includes a transceiver coupled to a baseband processor to receive digital control information that includes both event and schedule information, and which stores the digital control information in a storage of the transceiver. The transceiver may then be operated according to the event and schedule information.Type: ApplicationFiled: June 30, 2006Publication date: November 2, 2006Inventors: Brian Green, Srihari Adireddy, Lysander Lim, Ramkishore Ganti